projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| cc511b8d KK |
1 | /* |
| 2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
| 3 | * http://www.samsung.com | |
| 4 | * | |
| 5 | * Common Header for EXYNOS machines | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License version 2 as | |
| 9 | * published by the Free Software Foundation. | |
| 10 | */ | |
| 11 | ||
| 12 | #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
| 13 | #define __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
| 14 | ||
| 7b6d864b | 15 | #include <linux/reboot.h> |
| 6e6aac75 TA |
16 | #include <linux/of.h> |
| 17 | ||
| 034c097c | 18 | void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1); |
| 6e6aac75 | 19 | void exynos_init_time(void); |
| 92744274 | 20 | extern unsigned long xxti_f, xusbxti_f; |
| 906c789c | 21 | |
| 06853ae4 | 22 | struct map_desc; |
| 0e2238ec | 23 | void exynos_init_io(void); |
| 7b6d864b RH |
24 | void exynos4_restart(enum reboot_mode mode, const char *cmd); |
| 25 | void exynos5_restart(enum reboot_mode mode, const char *cmd); | |
| bb13fabc SG |
26 | void exynos_init_late(void); |
| 27 | ||
| 6e6aac75 | 28 | /* ToDo: remove these after migrating legacy exynos4 platforms to dt */ |
| 25e56eba | 29 | void exynos4_clk_init(struct device_node *np, int is_exynos4210, void __iomem *reg_base, unsigned long xom); |
| 6e6aac75 TA |
30 | void exynos4_clk_register_fixed_ext(unsigned long, unsigned long); |
| 31 | ||
| bca28f8f TF |
32 | void exynos_firmware_init(void); |
| 33 | ||
| 68a433f1 TF |
34 | void exynos_set_timer_source(u8 channels); |
| 35 | ||
| bb13fabc SG |
36 | #ifdef CONFIG_PM_GENERIC_DOMAINS |
| 37 | int exynos_pm_late_initcall(void); | |
| 38 | #else | |
| d0c2e4e4 | 39 | static inline int exynos_pm_late_initcall(void) { return 0; } |
| bb13fabc | 40 | #endif |
| cc511b8d | 41 | |
| a855039e | 42 | #ifdef CONFIG_ARCH_EXYNOS4 |
| cc511b8d KK |
43 | void exynos4_register_clocks(void); |
| 44 | void exynos4_setup_clocks(void); | |
| 45 | ||
| a855039e KK |
46 | #else |
| 47 | #define exynos4_register_clocks() | |
| 48 | #define exynos4_setup_clocks() | |
| a855039e KK |
49 | #endif |
| 50 | ||
| 94c7ca71 KK |
51 | #ifdef CONFIG_ARCH_EXYNOS5 |
| 52 | void exynos5_register_clocks(void); | |
| 53 | void exynos5_setup_clocks(void); | |
| 54 | ||
| 55 | #else | |
| 56 | #define exynos5_register_clocks() | |
| 57 | #define exynos5_setup_clocks() | |
| 58 | #endif | |
| 59 | ||
| 906c789c KK |
60 | #ifdef CONFIG_CPU_EXYNOS4210 |
| 61 | void exynos4210_register_clocks(void); | |
| 9eb48595 | 62 | |
| 906c789c KK |
63 | #else |
| 64 | #define exynos4210_register_clocks() | |
| 65 | #endif | |
| cc511b8d | 66 | |
| 906c789c KK |
67 | #ifdef CONFIG_SOC_EXYNOS4212 |
| 68 | void exynos4212_register_clocks(void); | |
| cc511b8d KK |
69 | |
| 70 | #else | |
| 906c789c | 71 | #define exynos4212_register_clocks() |
| cc511b8d KK |
72 | #endif |
| 73 | ||
| a900e5d9 | 74 | struct device_node; |
| 6761dcfe | 75 | void combiner_init(void __iomem *combiner_base, struct device_node *np, |
| 863a08dc | 76 | unsigned int max_nr, int irq_base); |
| a900e5d9 | 77 | |
| 06853ae4 MZ |
78 | extern struct smp_operations exynos_smp_ops; |
| 79 | ||
| 80 | extern void exynos_cpu_die(unsigned int cpu); | |
| 81 | ||
| ccd458c1 KK |
82 | /* PMU(Power Management Unit) support */ |
| 83 | ||
| 84 | #define PMU_TABLE_END NULL | |
| 85 | ||
| 86 | enum sys_powerdown { | |
| 87 | SYS_AFTR, | |
| 88 | SYS_LPA, | |
| 89 | SYS_SLEEP, | |
| 90 | NUM_SYS_POWERDOWN, | |
| 91 | }; | |
| 92 | ||
| 93 | extern unsigned long l2x0_regs_phys; | |
| 94 | struct exynos_pmu_conf { | |
| 95 | void __iomem *reg; | |
| 96 | unsigned int val[NUM_SYS_POWERDOWN]; | |
| 97 | }; | |
| 98 | ||
| 99 | extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); | |
| ccd458c1 | 100 | |
| cc511b8d | 101 | #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ |