Commit | Line | Data |
---|---|---|
cc511b8d KK |
1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
3 | * http://www.samsung.com | |
4 | * | |
5 | * Common Header for EXYNOS machines | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
13 | #define __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
14 | ||
6e6aac75 TA |
15 | #include <linux/of.h> |
16 | ||
034c097c | 17 | void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1); |
6e6aac75 | 18 | void exynos_init_time(void); |
92744274 | 19 | extern unsigned long xxti_f, xusbxti_f; |
906c789c | 20 | |
06853ae4 | 21 | struct map_desc; |
cc511b8d KK |
22 | void exynos_init_io(struct map_desc *mach_desc, int size); |
23 | void exynos4_init_irq(void); | |
94c7ca71 | 24 | void exynos5_init_irq(void); |
906c789c | 25 | void exynos4_restart(char mode, const char *cmd); |
94c7ca71 | 26 | void exynos5_restart(char mode, const char *cmd); |
bb13fabc SG |
27 | void exynos_init_late(void); |
28 | ||
6e6aac75 | 29 | /* ToDo: remove these after migrating legacy exynos4 platforms to dt */ |
25e56eba | 30 | void exynos4_clk_init(struct device_node *np, int is_exynos4210, void __iomem *reg_base, unsigned long xom); |
6e6aac75 TA |
31 | void exynos4_clk_register_fixed_ext(unsigned long, unsigned long); |
32 | ||
bca28f8f TF |
33 | void exynos_firmware_init(void); |
34 | ||
68a433f1 TF |
35 | void exynos_set_timer_source(u8 channels); |
36 | ||
bb13fabc SG |
37 | #ifdef CONFIG_PM_GENERIC_DOMAINS |
38 | int exynos_pm_late_initcall(void); | |
39 | #else | |
d0c2e4e4 | 40 | static inline int exynos_pm_late_initcall(void) { return 0; } |
bb13fabc | 41 | #endif |
cc511b8d | 42 | |
a855039e | 43 | #ifdef CONFIG_ARCH_EXYNOS4 |
cc511b8d KK |
44 | void exynos4_register_clocks(void); |
45 | void exynos4_setup_clocks(void); | |
46 | ||
a855039e KK |
47 | #else |
48 | #define exynos4_register_clocks() | |
49 | #define exynos4_setup_clocks() | |
a855039e KK |
50 | #endif |
51 | ||
94c7ca71 KK |
52 | #ifdef CONFIG_ARCH_EXYNOS5 |
53 | void exynos5_register_clocks(void); | |
54 | void exynos5_setup_clocks(void); | |
55 | ||
56 | #else | |
57 | #define exynos5_register_clocks() | |
58 | #define exynos5_setup_clocks() | |
59 | #endif | |
60 | ||
906c789c KK |
61 | #ifdef CONFIG_CPU_EXYNOS4210 |
62 | void exynos4210_register_clocks(void); | |
9eb48595 | 63 | |
906c789c KK |
64 | #else |
65 | #define exynos4210_register_clocks() | |
66 | #endif | |
cc511b8d | 67 | |
906c789c KK |
68 | #ifdef CONFIG_SOC_EXYNOS4212 |
69 | void exynos4212_register_clocks(void); | |
cc511b8d KK |
70 | |
71 | #else | |
906c789c | 72 | #define exynos4212_register_clocks() |
cc511b8d KK |
73 | #endif |
74 | ||
a900e5d9 | 75 | struct device_node; |
6761dcfe | 76 | void combiner_init(void __iomem *combiner_base, struct device_node *np, |
863a08dc | 77 | unsigned int max_nr, int irq_base); |
a900e5d9 | 78 | |
06853ae4 MZ |
79 | extern struct smp_operations exynos_smp_ops; |
80 | ||
81 | extern void exynos_cpu_die(unsigned int cpu); | |
82 | ||
ccd458c1 KK |
83 | /* PMU(Power Management Unit) support */ |
84 | ||
85 | #define PMU_TABLE_END NULL | |
86 | ||
87 | enum sys_powerdown { | |
88 | SYS_AFTR, | |
89 | SYS_LPA, | |
90 | SYS_SLEEP, | |
91 | NUM_SYS_POWERDOWN, | |
92 | }; | |
93 | ||
94 | extern unsigned long l2x0_regs_phys; | |
95 | struct exynos_pmu_conf { | |
96 | void __iomem *reg; | |
97 | unsigned int val[NUM_SYS_POWERDOWN]; | |
98 | }; | |
99 | ||
100 | extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); | |
101 | extern void s3c_cpu_resume(void); | |
102 | ||
cc511b8d | 103 | #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ |