projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| cc511b8d KK |
1 | /* |
| 2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
| 3 | * http://www.samsung.com | |
| 4 | * | |
| 5 | * Common Header for EXYNOS machines | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License version 2 as | |
| 9 | * published by the Free Software Foundation. | |
| 10 | */ | |
| 11 | ||
| 12 | #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
| 13 | #define __ARCH_ARM_MACH_EXYNOS_COMMON_H | |
| 14 | ||
| 6e6aac75 TA |
15 | #include <linux/of.h> |
| 16 | ||
| 9fbf0c85 | 17 | extern void mct_init(void); |
| 6e6aac75 | 18 | void exynos_init_time(void); |
| 92744274 | 19 | extern unsigned long xxti_f, xusbxti_f; |
| 906c789c | 20 | |
| 06853ae4 | 21 | struct map_desc; |
| cc511b8d KK |
22 | void exynos_init_io(struct map_desc *mach_desc, int size); |
| 23 | void exynos4_init_irq(void); | |
| 94c7ca71 | 24 | void exynos5_init_irq(void); |
| 906c789c | 25 | void exynos4_restart(char mode, const char *cmd); |
| 94c7ca71 | 26 | void exynos5_restart(char mode, const char *cmd); |
| bb13fabc SG |
27 | void exynos_init_late(void); |
| 28 | ||
| 6e6aac75 TA |
29 | /* ToDo: remove these after migrating legacy exynos4 platforms to dt */ |
| 30 | void exynos4_clk_init(struct device_node *np); | |
| 31 | void exynos4_clk_register_fixed_ext(unsigned long, unsigned long); | |
| 32 | ||
| bb13fabc SG |
33 | #ifdef CONFIG_PM_GENERIC_DOMAINS |
| 34 | int exynos_pm_late_initcall(void); | |
| 35 | #else | |
| d0c2e4e4 | 36 | static inline int exynos_pm_late_initcall(void) { return 0; } |
| bb13fabc | 37 | #endif |
| cc511b8d | 38 | |
| a855039e | 39 | #ifdef CONFIG_ARCH_EXYNOS4 |
| cc511b8d KK |
40 | void exynos4_register_clocks(void); |
| 41 | void exynos4_setup_clocks(void); | |
| 42 | ||
| a855039e KK |
43 | #else |
| 44 | #define exynos4_register_clocks() | |
| 45 | #define exynos4_setup_clocks() | |
| a855039e KK |
46 | #endif |
| 47 | ||
| 94c7ca71 KK |
48 | #ifdef CONFIG_ARCH_EXYNOS5 |
| 49 | void exynos5_register_clocks(void); | |
| 50 | void exynos5_setup_clocks(void); | |
| 51 | ||
| 52 | #else | |
| 53 | #define exynos5_register_clocks() | |
| 54 | #define exynos5_setup_clocks() | |
| 55 | #endif | |
| 56 | ||
| 906c789c KK |
57 | #ifdef CONFIG_CPU_EXYNOS4210 |
| 58 | void exynos4210_register_clocks(void); | |
| 9eb48595 | 59 | |
| 906c789c KK |
60 | #else |
| 61 | #define exynos4210_register_clocks() | |
| 62 | #endif | |
| cc511b8d | 63 | |
| 906c789c KK |
64 | #ifdef CONFIG_SOC_EXYNOS4212 |
| 65 | void exynos4212_register_clocks(void); | |
| cc511b8d KK |
66 | |
| 67 | #else | |
| 906c789c | 68 | #define exynos4212_register_clocks() |
| cc511b8d KK |
69 | #endif |
| 70 | ||
| a900e5d9 RH |
71 | struct device_node; |
| 72 | void combiner_init(void __iomem *combiner_base, struct device_node *np); | |
| 73 | ||
| 06853ae4 MZ |
74 | extern struct smp_operations exynos_smp_ops; |
| 75 | ||
| 76 | extern void exynos_cpu_die(unsigned int cpu); | |
| 77 | ||
| ccd458c1 KK |
78 | /* PMU(Power Management Unit) support */ |
| 79 | ||
| 80 | #define PMU_TABLE_END NULL | |
| 81 | ||
| 82 | enum sys_powerdown { | |
| 83 | SYS_AFTR, | |
| 84 | SYS_LPA, | |
| 85 | SYS_SLEEP, | |
| 86 | NUM_SYS_POWERDOWN, | |
| 87 | }; | |
| 88 | ||
| 89 | extern unsigned long l2x0_regs_phys; | |
| 90 | struct exynos_pmu_conf { | |
| 91 | void __iomem *reg; | |
| 92 | unsigned int val[NUM_SYS_POWERDOWN]; | |
| 93 | }; | |
| 94 | ||
| 95 | extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); | |
| 96 | extern void s3c_cpu_resume(void); | |
| 97 | ||
| cc511b8d | 98 | #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ |