Merge branch 'next/cleanup-samsung' into next/cleanup-samsung-2
[deliverable/linux.git] / arch / arm / mach-exynos / dev-audio.c
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1/* linux/arch/arm/mach-exynos4/dev-audio.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
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5 *
6 * Copyright (c) 2010 Samsung Electronics Co. Ltd
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17
18#include <plat/gpio-cfg.h>
436d42c6 19#include <linux/platform_data/asoc-s3c.h>
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20
21#include <mach/map.h>
22#include <mach/dma.h>
23#include <mach/irqs.h>
2839cc1e 24#include <mach/regs-audss.h>
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25
26static const char *rclksrc[] = {
27 [0] = "busclk",
28 [1] = "i2sclk",
29};
30
3db3ae5e 31static int exynos4_cfg_i2s(struct platform_device *pdev)
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32{
33 /* configure GPIO for i2s port */
34 switch (pdev->id) {
35 case 0:
3db3ae5e 36 s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 7, S3C_GPIO_SFN(2));
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37 break;
38 case 1:
3db3ae5e 39 s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(2));
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40 break;
41 case 2:
3db3ae5e 42 s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(4));
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43 break;
44 default:
45 printk(KERN_ERR "Invalid Device %d\n", pdev->id);
46 return -EINVAL;
47 }
48
49 return 0;
50}
51
52static struct s3c_audio_pdata i2sv5_pdata = {
3db3ae5e 53 .cfg_gpio = exynos4_cfg_i2s,
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54 .type = {
55 .i2s = {
56 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
57 | QUIRK_NEED_RSTCLR,
58 .src_clk = rclksrc,
2839cc1e 59 .idma_addr = EXYNOS4_AUDSS_INT_MEM,
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60 },
61 },
62};
63
3db3ae5e 64static struct resource exynos4_i2s0_resource[] = {
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65 [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S0, SZ_256),
66 [1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
67 [2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
68 [3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),
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69};
70
3db3ae5e 71struct platform_device exynos4_device_i2s0 = {
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72 .name = "samsung-i2s",
73 .id = 0,
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74 .num_resources = ARRAY_SIZE(exynos4_i2s0_resource),
75 .resource = exynos4_i2s0_resource,
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76 .dev = {
77 .platform_data = &i2sv5_pdata,
78 },
79};
80
81static const char *rclksrc_v3[] = {
82 [0] = "sclk_i2s",
83 [1] = "no_such_clock",
84};
85
86static struct s3c_audio_pdata i2sv3_pdata = {
3db3ae5e 87 .cfg_gpio = exynos4_cfg_i2s,
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88 .type = {
89 .i2s = {
90 .quirks = QUIRK_NO_MUXPSR,
91 .src_clk = rclksrc_v3,
92 },
93 },
94};
95
3db3ae5e 96static struct resource exynos4_i2s1_resource[] = {
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97 [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S1, SZ_256),
98 [1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
99 [2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
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100};
101
3db3ae5e 102struct platform_device exynos4_device_i2s1 = {
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103 .name = "samsung-i2s",
104 .id = 1,
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105 .num_resources = ARRAY_SIZE(exynos4_i2s1_resource),
106 .resource = exynos4_i2s1_resource,
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107 .dev = {
108 .platform_data = &i2sv3_pdata,
109 },
110};
111
3db3ae5e 112static struct resource exynos4_i2s2_resource[] = {
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113 [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S2, SZ_256),
114 [1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
115 [2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
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116};
117
3db3ae5e 118struct platform_device exynos4_device_i2s2 = {
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119 .name = "samsung-i2s",
120 .id = 2,
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121 .num_resources = ARRAY_SIZE(exynos4_i2s2_resource),
122 .resource = exynos4_i2s2_resource,
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123 .dev = {
124 .platform_data = &i2sv3_pdata,
125 },
126};
127
128/* PCM Controller platform_devices */
129
3db3ae5e 130static int exynos4_pcm_cfg_gpio(struct platform_device *pdev)
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131{
132 switch (pdev->id) {
133 case 0:
3db3ae5e 134 s3c_gpio_cfgpin_range(EXYNOS4_GPZ(0), 5, S3C_GPIO_SFN(3));
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135 break;
136 case 1:
3db3ae5e 137 s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(3));
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138 break;
139 case 2:
3db3ae5e 140 s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 5, S3C_GPIO_SFN(3));
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141 break;
142 default:
143 printk(KERN_DEBUG "Invalid PCM Controller number!");
144 return -EINVAL;
145 }
146
147 return 0;
148}
149
150static struct s3c_audio_pdata s3c_pcm_pdata = {
3db3ae5e 151 .cfg_gpio = exynos4_pcm_cfg_gpio,
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152};
153
3db3ae5e 154static struct resource exynos4_pcm0_resource[] = {
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155 [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM0, SZ_256),
156 [1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
157 [2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
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158};
159
3db3ae5e 160struct platform_device exynos4_device_pcm0 = {
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161 .name = "samsung-pcm",
162 .id = 0,
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163 .num_resources = ARRAY_SIZE(exynos4_pcm0_resource),
164 .resource = exynos4_pcm0_resource,
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165 .dev = {
166 .platform_data = &s3c_pcm_pdata,
167 },
168};
169
3db3ae5e 170static struct resource exynos4_pcm1_resource[] = {
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171 [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM1, SZ_256),
172 [1] = DEFINE_RES_DMA(DMACH_PCM1_TX),
173 [2] = DEFINE_RES_DMA(DMACH_PCM1_RX),
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174};
175
3db3ae5e 176struct platform_device exynos4_device_pcm1 = {
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177 .name = "samsung-pcm",
178 .id = 1,
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179 .num_resources = ARRAY_SIZE(exynos4_pcm1_resource),
180 .resource = exynos4_pcm1_resource,
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181 .dev = {
182 .platform_data = &s3c_pcm_pdata,
183 },
184};
185
3db3ae5e 186static struct resource exynos4_pcm2_resource[] = {
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187 [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM2, SZ_256),
188 [1] = DEFINE_RES_DMA(DMACH_PCM2_TX),
189 [2] = DEFINE_RES_DMA(DMACH_PCM2_RX),
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190};
191
3db3ae5e 192struct platform_device exynos4_device_pcm2 = {
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193 .name = "samsung-pcm",
194 .id = 2,
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195 .num_resources = ARRAY_SIZE(exynos4_pcm2_resource),
196 .resource = exynos4_pcm2_resource,
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197 .dev = {
198 .platform_data = &s3c_pcm_pdata,
199 },
200};
201
202/* AC97 Controller platform devices */
203
3db3ae5e 204static int exynos4_ac97_cfg_gpio(struct platform_device *pdev)
460ed699 205{
3db3ae5e 206 return s3c_gpio_cfgpin_range(EXYNOS4_GPC0(0), 5, S3C_GPIO_SFN(4));
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207}
208
3db3ae5e 209static struct resource exynos4_ac97_resource[] = {
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210 [0] = DEFINE_RES_MEM(EXYNOS4_PA_AC97, SZ_256),
211 [1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),
212 [2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),
213 [3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),
214 [4] = DEFINE_RES_IRQ(EXYNOS4_IRQ_AC97),
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215};
216
217static struct s3c_audio_pdata s3c_ac97_pdata = {
3db3ae5e 218 .cfg_gpio = exynos4_ac97_cfg_gpio,
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219};
220
3db3ae5e 221static u64 exynos4_ac97_dmamask = DMA_BIT_MASK(32);
460ed699 222
3db3ae5e 223struct platform_device exynos4_device_ac97 = {
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224 .name = "samsung-ac97",
225 .id = -1,
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226 .num_resources = ARRAY_SIZE(exynos4_ac97_resource),
227 .resource = exynos4_ac97_resource,
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228 .dev = {
229 .platform_data = &s3c_ac97_pdata,
3db3ae5e 230 .dma_mask = &exynos4_ac97_dmamask,
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231 .coherent_dma_mask = DMA_BIT_MASK(32),
232 },
233};
234
235/* S/PDIF Controller platform_device */
236
3db3ae5e 237static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
460ed699 238{
a3df1d48 239 s3c_gpio_cfgpin_range(EXYNOS4_GPC1(0), 2, S3C_GPIO_SFN(4));
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240
241 return 0;
242}
243
3db3ae5e 244static struct resource exynos4_spdif_resource[] = {
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245 [0] = DEFINE_RES_MEM(EXYNOS4_PA_SPDIF, SZ_256),
246 [1] = DEFINE_RES_DMA(DMACH_SPDIF),
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247};
248
249static struct s3c_audio_pdata samsung_spdif_pdata = {
3db3ae5e 250 .cfg_gpio = exynos4_spdif_cfg_gpio,
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251};
252
3db3ae5e 253static u64 exynos4_spdif_dmamask = DMA_BIT_MASK(32);
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3db3ae5e 255struct platform_device exynos4_device_spdif = {
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256 .name = "samsung-spdif",
257 .id = -1,
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258 .num_resources = ARRAY_SIZE(exynos4_spdif_resource),
259 .resource = exynos4_spdif_resource,
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260 .dev = {
261 .platform_data = &samsung_spdif_pdata,
3db3ae5e 262 .dma_mask = &exynos4_spdif_dmamask,
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263 .coherent_dma_mask = DMA_BIT_MASK(32),
264 },
265};
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