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Merge tag 'v3.8-rc1' into staging/for_v3.9
[deliverable/linux.git] / arch / arm / mach-exynos / mach-exynos5-dt.c
CommitLineData
b3e68fb1
KK		 1/*
2 * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/of_platform.h>
5b7897db 13#include <linux/of_fdt.h>
b3e68fb1 14#include <linux/serial_core.h>
2eae613b 15#include <linux/memblock.h>
7000fe8c 16#include <linux/io.h>
b3e68fb1
KK		 17
18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h>
20#include <mach/map.h>
7000fe8c 21#include <mach/regs-pmu.h>
b3e68fb1
KK		 22
23#include <plat/cpu.h>
24#include <plat/regs-serial.h>
2eae613b 25#include <plat/mfc.h>
b3e68fb1
KK		 26
27#include "common.h"
28
29/*
30 * The following lookup table is used to override device names when devices
31 * are registered from device tree. This is temporarily added to enable
32 * device tree support addition for the EXYNOS5 architecture.
33 *
34 * For drivers that require platform data to be provided from the machine
35 * file, a platform data pointer can also be supplied along with the
36 * devices names. Usually, the platform data elements that cannot be parsed
37 * from the device tree by the drivers (example: function pointers) are
38 * supplied. But it should be noted that this is a temporary mechanism and
39 * at some point, the drivers should be capable of parsing all the platform
40 * data from the device tree.
41 */
42static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
43 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
44 "exynos4210-uart.0", NULL),
45 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
46 "exynos4210-uart.1", NULL),
47 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
48 "exynos4210-uart.2", NULL),
49 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
50 "exynos4210-uart.3", NULL),
380c3a54
TA		 51 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),
52 "s3c2440-i2c.0", NULL),
53 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
54 "s3c2440-i2c.1", NULL),
62a1f83f
RS		 55 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
56 "s3c2440-i2c.2", NULL),
f5298e07
OJ		 57 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3),
58 "s3c2440-i2c.3", NULL),
59 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4),
60 "s3c2440-i2c.4", NULL),
61 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5),
62 "s3c2440-i2c.5", NULL),
63 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6),
64 "s3c2440-i2c.6", NULL),
65 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7),
66 "s3c2440-i2c.7", NULL),
3e3e9ce4
RS		 67 OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
68 "s3c2440-hdmiphy-i2c", NULL),
a5c17773
TA		 69 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
70 "dw_mmc.0", NULL),
71 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
72 "dw_mmc.1", NULL),
73 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2,
74 "dw_mmc.2", NULL),
75 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3,
76 "dw_mmc.3", NULL),
b0b27815
TA		 77 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
78 "exynos4210-spi.0", NULL),
79 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
80 "exynos4210-spi.1", NULL),
81 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
82 "exynos4210-spi.2", NULL),
c47d244a
VA		 83 OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
84 "exynos5-sata", NULL),
85 OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000,
86 "exynos5-sata-phy", NULL),
87 OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
88 "exynos5-sata-phy-i2c", NULL),
b3e68fb1
KK		 89 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
90 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
60806225 91 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
1128658a
SAB		 92 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC0,
93 "exynos-gsc.0", NULL),
94 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC1,
95 "exynos-gsc.1", NULL),
96 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC2,
97 "exynos-gsc.2", NULL),
98 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
99 "exynos-gsc.3", NULL),
566cf8ee
RS		 100 OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
101 "exynos5-hdmi", NULL),
5af0d8a3
RS		 102 OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
103 "exynos5-mixer", NULL),
2eae613b 104 OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
ef405e04
ADK		 105 OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000,
106 "exynos-tmu", NULL),
b3e68fb1
KK		 107 {},
108};
109
2edb36c4
KK		 110static const struct of_dev_auxdata exynos5440_auxdata_lookup[] __initconst = {
111 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5440_PA_UART0,
112 "exynos4210-uart.0", NULL),
113 {},
114};
115
116static void __init exynos5_dt_map_io(void)
b3e68fb1 117{
5b7897db
DA		 118 unsigned long root = of_get_flat_dt_root();
119
b3e68fb1 120 exynos_init_io(NULL, 0);
2edb36c4 121
5b7897db 122 if (of_flat_dt_is_compatible(root, "samsung,exynos5250"))
2edb36c4 123 s3c24xx_init_clocks(24000000);
b3e68fb1
KK		 124}
125
2edb36c4 126static void __init exynos5_dt_machine_init(void)
b3e68fb1 127{
7000fe8c
AK		 128 struct device_node *i2c_np;
129 const char *i2c_compat = "samsung,s3c2440-i2c";
130 unsigned int tmp;
131
132 /*
133 * Exynos5's legacy i2c controller and new high speed i2c
134 * controller have muxed interrupt sources. By default the
135 * interrupts for 4-channel HS-I2C controller are enabled.
136 * If node for first four channels of legacy i2c controller
137 * are available then re-configure the interrupts via the
138 * system register.
139 */
140 for_each_compatible_node(i2c_np, NULL, i2c_compat) {
141 if (of_device_is_available(i2c_np)) {
142 if (of_alias_get_id(i2c_np, "i2c") < 4) {
143 tmp = readl(EXYNOS5_SYS_I2C_CFG);
144 writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
145 EXYNOS5_SYS_I2C_CFG);
146 }
147 }
148 }
149
2edb36c4
KK		 150 if (of_machine_is_compatible("samsung,exynos5250"))
151 of_platform_populate(NULL, of_default_bus_match_table,
152 exynos5250_auxdata_lookup, NULL);
153 else if (of_machine_is_compatible("samsung,exynos5440"))
154 of_platform_populate(NULL, of_default_bus_match_table,
155 exynos5440_auxdata_lookup, NULL);
b3e68fb1
KK		 156}
157
2edb36c4 158static char const *exynos5_dt_compat[] __initdata = {
b3e68fb1 159 "samsung,exynos5250",
2edb36c4 160 "samsung,exynos5440",
b3e68fb1
KK		 161 NULL
162};
163
2eae613b
AK		 164static void __init exynos5_reserve(void)
165{
ade7ffbb 166#ifdef CONFIG_S5P_DEV_MFC
2eae613b
AK		 167 struct s5p_mfc_dt_meminfo mfc_mem;
168
169 /* Reserve memory for MFC only if it's available */
170 mfc_mem.compatible = "samsung,mfc-v6";
171 if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
172 s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
173 mfc_mem.lsize);
ade7ffbb 174#endif
2eae613b
AK		 175}
176
b3e68fb1
KK		 177DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
178 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
179 .init_irq = exynos5_init_irq,
06853ae4 180 .smp = smp_ops(exynos_smp_ops),
2edb36c4 181 .map_io = exynos5_dt_map_io,
b3e68fb1 182 .handle_irq = gic_handle_irq,
2edb36c4 183 .init_machine = exynos5_dt_machine_init,
bb13fabc 184 .init_late = exynos_init_late,
b3e68fb1 185 .timer = &exynos4_timer,
2edb36c4 186 .dt_compat = exynos5_dt_compat,
b3e68fb1 187 .restart = exynos5_restart,
2eae613b 188 .reserve = exynos5_reserve,
b3e68fb1 189MACHINE_END
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