Merge tag 'v3.8-rc1' into staging/for_v3.9
[deliverable/linux.git] / arch / arm / mach-exynos / mach-origen.c
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1/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
29e7d587 12#include <linux/leds.h>
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13#include <linux/gpio.h>
14#include <linux/mmc/host.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/input.h>
4d8cc596 18#include <linux/pwm.h>
9edff0f7 19#include <linux/pwm_backlight.h>
c86cfdd0 20#include <linux/gpio_keys.h>
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21#include <linux/i2c.h>
22#include <linux/regulator/machine.h>
23#include <linux/mfd/max8997.h>
9421a76d 24#include <linux/lcd.h>
62d30f86 25#include <linux/rfkill-gpio.h>
f034d85e 26#include <linux/platform_data/i2c-s3c2410.h>
9c278d52 27#include <linux/platform_data/s3c-hsotg.h>
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28#include <linux/platform_data/usb-ehci-s5p.h>
29#include <linux/platform_data/usb-exynos.h>
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30
31#include <asm/mach/arch.h>
4e44d2cb 32#include <asm/hardware/gic.h>
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33#include <asm/mach-types.h>
34
9421a76d 35#include <video/platform_lcd.h>
5a213a55 36#include <video/samsung_fimd.h>
9421a76d 37
699efdd2 38#include <plat/regs-serial.h>
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39#include <plat/cpu.h>
40#include <plat/devs.h>
41#include <plat/sdhci.h>
24f9e1f3 42#include <plat/clock.h>
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43#include <plat/gpio-cfg.h>
44#include <plat/backlight.h>
9421a76d 45#include <plat/fb.h>
df74a28c 46#include <plat/mfc.h>
ccc61fd4 47#include <plat/hdmi.h>
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48
49#include <mach/map.h>
50
84e6aef0 51#include <drm/exynos_drm.h>
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52#include "common.h"
53
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54/* Following are default values for UCON, ULCON and UFCON UART registers */
55#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
56 S3C2410_UCON_RXILEVEL | \
57 S3C2410_UCON_TXIRQMODE | \
58 S3C2410_UCON_RXIRQMODE | \
59 S3C2410_UCON_RXFIFO_TOI | \
60 S3C2443_UCON_RXERR_IRQEN)
61
62#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
63
64#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
65 S5PV210_UFCON_TXTRIG4 | \
66 S5PV210_UFCON_RXTRIG4)
67
68static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
69 [0] = {
70 .hwport = 0,
71 .flags = 0,
72 .ucon = ORIGEN_UCON_DEFAULT,
73 .ulcon = ORIGEN_ULCON_DEFAULT,
74 .ufcon = ORIGEN_UFCON_DEFAULT,
75 },
76 [1] = {
77 .hwport = 1,
78 .flags = 0,
79 .ucon = ORIGEN_UCON_DEFAULT,
80 .ulcon = ORIGEN_ULCON_DEFAULT,
81 .ufcon = ORIGEN_UFCON_DEFAULT,
82 },
83 [2] = {
84 .hwport = 2,
85 .flags = 0,
86 .ucon = ORIGEN_UCON_DEFAULT,
87 .ulcon = ORIGEN_ULCON_DEFAULT,
88 .ufcon = ORIGEN_UFCON_DEFAULT,
89 },
90 [3] = {
91 .hwport = 3,
92 .flags = 0,
93 .ucon = ORIGEN_UCON_DEFAULT,
94 .ulcon = ORIGEN_ULCON_DEFAULT,
95 .ufcon = ORIGEN_UFCON_DEFAULT,
96 },
97};
98
6e01280f 99static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
c421a1e4 100 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
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101 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
102 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
75e56c98 103 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* OTG */
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104};
105static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
c421a1e4 106 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
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107};
108static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
109 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
110};
111static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
112 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
5dfb1aa5 113 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
75e56c98 114 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* OTG */
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115};
116static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
117 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
118};
119static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
120 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
121};
122static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
123 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
124};
125static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
126 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
127};
128static struct regulator_consumer_supply __initdata buck1_consumer[] = {
129 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
130};
131static struct regulator_consumer_supply __initdata buck2_consumer[] = {
132 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
133};
134static struct regulator_consumer_supply __initdata buck3_consumer[] = {
135 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
136};
137static struct regulator_consumer_supply __initdata buck7_consumer[] = {
138 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
139};
140
141static struct regulator_init_data __initdata max8997_ldo1_data = {
142 .constraints = {
143 .name = "VDD_ABB_3.3V",
144 .min_uV = 3300000,
145 .max_uV = 3300000,
146 .apply_uV = 1,
147 .state_mem = {
148 .disabled = 1,
149 },
150 },
151};
152
153static struct regulator_init_data __initdata max8997_ldo2_data = {
154 .constraints = {
155 .name = "VDD_ALIVE_1.1V",
156 .min_uV = 1100000,
157 .max_uV = 1100000,
158 .apply_uV = 1,
159 .always_on = 1,
160 .state_mem = {
161 .enabled = 1,
162 },
163 },
164};
165
166static struct regulator_init_data __initdata max8997_ldo3_data = {
167 .constraints = {
168 .name = "VMIPI_1.1V",
169 .min_uV = 1100000,
170 .max_uV = 1100000,
171 .apply_uV = 1,
172 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
173 .state_mem = {
174 .disabled = 1,
175 },
176 },
177 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
178 .consumer_supplies = ldo3_consumer,
179};
180
181static struct regulator_init_data __initdata max8997_ldo4_data = {
182 .constraints = {
183 .name = "VDD_RTC_1.8V",
184 .min_uV = 1800000,
185 .max_uV = 1800000,
186 .apply_uV = 1,
187 .always_on = 1,
188 .state_mem = {
189 .disabled = 1,
190 },
191 },
192};
193
194static struct regulator_init_data __initdata max8997_ldo6_data = {
195 .constraints = {
196 .name = "VMIPI_1.8V",
197 .min_uV = 1800000,
198 .max_uV = 1800000,
199 .apply_uV = 1,
200 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
201 .state_mem = {
202 .disabled = 1,
203 },
204 },
205 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
206 .consumer_supplies = ldo6_consumer,
207};
208
209static struct regulator_init_data __initdata max8997_ldo7_data = {
210 .constraints = {
211 .name = "VDD_AUD_1.8V",
212 .min_uV = 1800000,
213 .max_uV = 1800000,
214 .apply_uV = 1,
215 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
216 .state_mem = {
217 .disabled = 1,
218 },
219 },
220 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
221 .consumer_supplies = ldo7_consumer,
222};
223
224static struct regulator_init_data __initdata max8997_ldo8_data = {
225 .constraints = {
226 .name = "VADC_3.3V",
227 .min_uV = 3300000,
228 .max_uV = 3300000,
229 .apply_uV = 1,
230 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
231 .state_mem = {
232 .disabled = 1,
233 },
234 },
235 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
236 .consumer_supplies = ldo8_consumer,
237};
238
239static struct regulator_init_data __initdata max8997_ldo9_data = {
240 .constraints = {
241 .name = "DVDD_SWB_2.8V",
242 .min_uV = 2800000,
243 .max_uV = 2800000,
244 .apply_uV = 1,
62d30f86 245 .always_on = 1,
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246 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
247 .state_mem = {
248 .disabled = 1,
249 },
250 },
251 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
252 .consumer_supplies = ldo9_consumer,
253};
254
255static struct regulator_init_data __initdata max8997_ldo10_data = {
256 .constraints = {
257 .name = "VDD_PLL_1.1V",
258 .min_uV = 1100000,
259 .max_uV = 1100000,
260 .apply_uV = 1,
261 .always_on = 1,
262 .state_mem = {
263 .disabled = 1,
264 },
265 },
266};
267
268static struct regulator_init_data __initdata max8997_ldo11_data = {
269 .constraints = {
270 .name = "VDD_AUD_3V",
271 .min_uV = 3000000,
272 .max_uV = 3000000,
273 .apply_uV = 1,
274 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
275 .state_mem = {
276 .disabled = 1,
277 },
278 },
279 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
280 .consumer_supplies = ldo11_consumer,
281};
282
283static struct regulator_init_data __initdata max8997_ldo14_data = {
284 .constraints = {
285 .name = "AVDD18_SWB_1.8V",
286 .min_uV = 1800000,
287 .max_uV = 1800000,
288 .apply_uV = 1,
62d30f86 289 .always_on = 1,
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290 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
291 .state_mem = {
292 .disabled = 1,
293 },
294 },
295 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
296 .consumer_supplies = ldo14_consumer,
297};
298
299static struct regulator_init_data __initdata max8997_ldo17_data = {
300 .constraints = {
301 .name = "VDD_SWB_3.3V",
302 .min_uV = 3300000,
303 .max_uV = 3300000,
304 .apply_uV = 1,
62d30f86 305 .always_on = 1,
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306 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
307 .state_mem = {
308 .disabled = 1,
309 },
310 },
311 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
312 .consumer_supplies = ldo17_consumer,
313};
314
315static struct regulator_init_data __initdata max8997_ldo21_data = {
316 .constraints = {
317 .name = "VDD_MIF_1.2V",
318 .min_uV = 1200000,
319 .max_uV = 1200000,
320 .apply_uV = 1,
321 .always_on = 1,
322 .state_mem = {
323 .disabled = 1,
324 },
325 },
326};
327
328static struct regulator_init_data __initdata max8997_buck1_data = {
329 .constraints = {
330 .name = "VDD_ARM_1.2V",
331 .min_uV = 950000,
332 .max_uV = 1350000,
333 .always_on = 1,
334 .boot_on = 1,
335 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
336 .state_mem = {
337 .disabled = 1,
338 },
339 },
340 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
341 .consumer_supplies = buck1_consumer,
342};
343
344static struct regulator_init_data __initdata max8997_buck2_data = {
345 .constraints = {
346 .name = "VDD_INT_1.1V",
347 .min_uV = 900000,
348 .max_uV = 1100000,
349 .always_on = 1,
350 .boot_on = 1,
351 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
352 .state_mem = {
353 .disabled = 1,
354 },
355 },
356 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
357 .consumer_supplies = buck2_consumer,
358};
359
360static struct regulator_init_data __initdata max8997_buck3_data = {
361 .constraints = {
362 .name = "VDD_G3D_1.1V",
363 .min_uV = 900000,
364 .max_uV = 1100000,
365 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
366 REGULATOR_CHANGE_STATUS,
367 .state_mem = {
368 .disabled = 1,
369 },
370 },
371 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
372 .consumer_supplies = buck3_consumer,
373};
374
375static struct regulator_init_data __initdata max8997_buck5_data = {
376 .constraints = {
377 .name = "VDDQ_M1M2_1.2V",
378 .min_uV = 1200000,
379 .max_uV = 1200000,
380 .apply_uV = 1,
381 .always_on = 1,
382 .state_mem = {
383 .disabled = 1,
384 },
385 },
386};
387
388static struct regulator_init_data __initdata max8997_buck7_data = {
389 .constraints = {
390 .name = "VDD_LCD_3.3V",
391 .min_uV = 3300000,
392 .max_uV = 3300000,
393 .boot_on = 1,
394 .apply_uV = 1,
395 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
396 .state_mem = {
397 .disabled = 1
398 },
399 },
400 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
401 .consumer_supplies = buck7_consumer,
402};
403
404static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
405 { MAX8997_LDO1, &max8997_ldo1_data },
406 { MAX8997_LDO2, &max8997_ldo2_data },
407 { MAX8997_LDO3, &max8997_ldo3_data },
408 { MAX8997_LDO4, &max8997_ldo4_data },
409 { MAX8997_LDO6, &max8997_ldo6_data },
410 { MAX8997_LDO7, &max8997_ldo7_data },
411 { MAX8997_LDO8, &max8997_ldo8_data },
412 { MAX8997_LDO9, &max8997_ldo9_data },
413 { MAX8997_LDO10, &max8997_ldo10_data },
414 { MAX8997_LDO11, &max8997_ldo11_data },
415 { MAX8997_LDO14, &max8997_ldo14_data },
416 { MAX8997_LDO17, &max8997_ldo17_data },
417 { MAX8997_LDO21, &max8997_ldo21_data },
418 { MAX8997_BUCK1, &max8997_buck1_data },
419 { MAX8997_BUCK2, &max8997_buck2_data },
420 { MAX8997_BUCK3, &max8997_buck3_data },
421 { MAX8997_BUCK5, &max8997_buck5_data },
422 { MAX8997_BUCK7, &max8997_buck7_data },
423};
424
e745e06f 425static struct max8997_platform_data __initdata origen_max8997_pdata = {
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426 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
427 .regulators = origen_max8997_regulators,
428
429 .wakeup = true,
430 .buck1_gpiodvs = false,
431 .buck2_gpiodvs = false,
432 .buck5_gpiodvs = false,
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433
434 .ignore_gpiodvs_side_effect = true,
435 .buck125_default_idx = 0x0,
436
437 .buck125_gpios[0] = EXYNOS4_GPX0(0),
438 .buck125_gpios[1] = EXYNOS4_GPX0(1),
439 .buck125_gpios[2] = EXYNOS4_GPX0(2),
440
441 .buck1_voltage[0] = 1350000,
442 .buck1_voltage[1] = 1300000,
443 .buck1_voltage[2] = 1250000,
444 .buck1_voltage[3] = 1200000,
445 .buck1_voltage[4] = 1150000,
446 .buck1_voltage[5] = 1100000,
447 .buck1_voltage[6] = 1000000,
448 .buck1_voltage[7] = 950000,
449
450 .buck2_voltage[0] = 1100000,
451 .buck2_voltage[1] = 1100000,
452 .buck2_voltage[2] = 1100000,
453 .buck2_voltage[3] = 1100000,
454 .buck2_voltage[4] = 1000000,
455 .buck2_voltage[5] = 1000000,
456 .buck2_voltage[6] = 1000000,
457 .buck2_voltage[7] = 1000000,
458
459 .buck5_voltage[0] = 1200000,
460 .buck5_voltage[1] = 1200000,
461 .buck5_voltage[2] = 1200000,
462 .buck5_voltage[3] = 1200000,
463 .buck5_voltage[4] = 1200000,
464 .buck5_voltage[5] = 1200000,
465 .buck5_voltage[6] = 1200000,
466 .buck5_voltage[7] = 1200000,
467};
468
469/* I2C0 */
470static struct i2c_board_info i2c0_devs[] __initdata = {
471 {
472 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
473 .platform_data = &origen_max8997_pdata,
474 .irq = IRQ_EINT(4),
475 },
476};
477
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478static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
479 .cd_type = S3C_SDHCI_CD_INTERNAL,
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480};
481
699efdd2 482static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
92e41efd 483 .cd_type = S3C_SDHCI_CD_INTERNAL,
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484};
485
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486/* USB EHCI */
487static struct s5p_ehci_platdata origen_ehci_pdata;
488
489static void __init origen_ehci_init(void)
490{
491 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
492
493 s5p_ehci_set_platdata(pdata);
494}
495
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496/* USB OHCI */
497static struct exynos4_ohci_platdata origen_ohci_pdata;
498
499static void __init origen_ohci_init(void)
500{
501 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
502
503 exynos4_ohci_set_platdata(pdata);
504}
505
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506/* USB OTG */
507static struct s3c_hsotg_plat origen_hsotg_pdata;
508
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509static struct gpio_led origen_gpio_leds[] = {
510 {
511 .name = "origen::status1",
512 .default_trigger = "heartbeat",
513 .gpio = EXYNOS4_GPX1(3),
514 .active_low = 1,
515 },
516 {
517 .name = "origen::status2",
518 .default_trigger = "mmc0",
519 .gpio = EXYNOS4_GPX1(4),
520 .active_low = 1,
521 },
522};
523
524static struct gpio_led_platform_data origen_gpio_led_info = {
525 .leds = origen_gpio_leds,
526 .num_leds = ARRAY_SIZE(origen_gpio_leds),
527};
528
529static struct platform_device origen_leds_gpio = {
530 .name = "leds-gpio",
531 .id = -1,
532 .dev = {
533 .platform_data = &origen_gpio_led_info,
534 },
535};
536
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537static struct gpio_keys_button origen_gpio_keys_table[] = {
538 {
539 .code = KEY_MENU,
540 .gpio = EXYNOS4_GPX1(5),
541 .desc = "gpio-keys: KEY_MENU",
542 .type = EV_KEY,
543 .active_low = 1,
544 .wakeup = 1,
545 .debounce_interval = 1,
546 }, {
547 .code = KEY_HOME,
548 .gpio = EXYNOS4_GPX1(6),
549 .desc = "gpio-keys: KEY_HOME",
550 .type = EV_KEY,
551 .active_low = 1,
552 .wakeup = 1,
553 .debounce_interval = 1,
554 }, {
555 .code = KEY_BACK,
556 .gpio = EXYNOS4_GPX1(7),
557 .desc = "gpio-keys: KEY_BACK",
558 .type = EV_KEY,
559 .active_low = 1,
560 .wakeup = 1,
561 .debounce_interval = 1,
562 }, {
563 .code = KEY_UP,
564 .gpio = EXYNOS4_GPX2(0),
565 .desc = "gpio-keys: KEY_UP",
566 .type = EV_KEY,
567 .active_low = 1,
568 .wakeup = 1,
569 .debounce_interval = 1,
570 }, {
571 .code = KEY_DOWN,
572 .gpio = EXYNOS4_GPX2(1),
573 .desc = "gpio-keys: KEY_DOWN",
574 .type = EV_KEY,
575 .active_low = 1,
576 .wakeup = 1,
577 .debounce_interval = 1,
578 },
579};
580
581static struct gpio_keys_platform_data origen_gpio_keys_data = {
582 .buttons = origen_gpio_keys_table,
583 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
584};
585
586static struct platform_device origen_device_gpiokeys = {
587 .name = "gpio-keys",
588 .dev = {
589 .platform_data = &origen_gpio_keys_data,
590 },
591};
592
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593static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
594{
595 int ret;
596
597 if (power)
598 ret = gpio_request_one(EXYNOS4_GPE3(4),
599 GPIOF_OUT_INIT_HIGH, "GPE3_4");
600 else
601 ret = gpio_request_one(EXYNOS4_GPE3(4),
602 GPIOF_OUT_INIT_LOW, "GPE3_4");
603
604 gpio_free(EXYNOS4_GPE3(4));
605
606 if (ret)
607 pr_err("failed to request gpio for LCD power: %d\n", ret);
608}
609
610static struct plat_lcd_data origen_lcd_hv070wsa_data = {
611 .set_power = lcd_hv070wsa_set_power,
612};
613
614static struct platform_device origen_lcd_hv070wsa = {
615 .name = "platform-lcd",
616 .dev.parent = &s5p_device_fimd0.dev,
617 .dev.platform_data = &origen_lcd_hv070wsa_data,
618};
619
4d8cc596
TB
620static struct pwm_lookup origen_pwm_lookup[] = {
621 PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
622};
623
479dda22 624#ifdef CONFIG_DRM_EXYNOS_FIMD
84e6aef0
SK
625static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
626 .panel = {
627 .timing = {
628 .left_margin = 64,
629 .right_margin = 16,
630 .upper_margin = 64,
631 .lower_margin = 16,
632 .hsync_len = 48,
633 .vsync_len = 3,
634 .xres = 1024,
635 .yres = 600,
636 },
637 },
638 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
639 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
640 VIDCON1_INV_VCLK,
641 .default_win = 0,
642 .bpp = 32,
643};
644#else
9421a76d 645static struct s3c_fb_pd_win origen_fb_win0 = {
79d3c41a
TA
646 .xres = 1024,
647 .yres = 600,
9421a76d
TB
648 .max_bpp = 32,
649 .default_bpp = 24,
384b1049
TB
650 .virtual_x = 1024,
651 .virtual_y = 2 * 600,
9421a76d
TB
652};
653
79d3c41a
TA
654static struct fb_videomode origen_lcd_timing = {
655 .left_margin = 64,
656 .right_margin = 16,
657 .upper_margin = 64,
658 .lower_margin = 16,
659 .hsync_len = 48,
660 .vsync_len = 3,
661 .xres = 1024,
662 .yres = 600,
663};
664
9421a76d
TB
665static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
666 .win[0] = &origen_fb_win0,
79d3c41a 667 .vtiming = &origen_lcd_timing,
9421a76d 668 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
815ed6fc
TB
669 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
670 VIDCON1_INV_VCLK,
9421a76d
TB
671 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
672};
84e6aef0 673#endif
9421a76d 674
62d30f86 675/* Bluetooth rfkill gpio platform data */
023c9ff6 676static struct rfkill_gpio_platform_data origen_bt_pdata = {
62d30f86
SL
677 .reset_gpio = EXYNOS4_GPX2(2),
678 .shutdown_gpio = -1,
679 .type = RFKILL_TYPE_BLUETOOTH,
680 .name = "origen-bt",
681};
682
683/* Bluetooth Platform device */
684static struct platform_device origen_device_bluetooth = {
685 .name = "rfkill_gpio",
686 .id = -1,
687 .dev = {
688 .platform_data = &origen_bt_pdata,
689 },
690};
691
699efdd2
JK
692static struct platform_device *origen_devices[] __initdata = {
693 &s3c_device_hsmmc2,
cf1dad9d 694 &s3c_device_hsmmc0,
9421a76d 695 &s3c_device_i2c0,
699efdd2 696 &s3c_device_rtc,
9c278d52 697 &s3c_device_usb_hsotg,
699efdd2 698 &s3c_device_wdt,
24f9e1f3 699 &s5p_device_ehci,
6f8eb324
SK
700 &s5p_device_fimc0,
701 &s5p_device_fimc1,
702 &s5p_device_fimc2,
703 &s5p_device_fimc3,
26e14514 704 &s5p_device_fimc_md,
9421a76d 705 &s5p_device_fimd0,
84207d83 706 &s5p_device_g2d,
6ca3f8bd
SK
707 &s5p_device_hdmi,
708 &s5p_device_i2c_hdmiphy,
965a330d 709 &s5p_device_jpeg,
df74a28c
SK
710 &s5p_device_mfc,
711 &s5p_device_mfc_l,
712 &s5p_device_mfc_r,
6ca3f8bd 713 &s5p_device_mixer,
95de77d4 714 &exynos4_device_ohci,
c86cfdd0 715 &origen_device_gpiokeys,
9421a76d 716 &origen_lcd_hv070wsa,
29e7d587 717 &origen_leds_gpio,
62d30f86 718 &origen_device_bluetooth,
699efdd2
JK
719};
720
9edff0f7
GM
721/* LCD Backlight data */
722static struct samsung_bl_gpio_info origen_bl_gpio_info = {
6e01280f
IS
723 .no = EXYNOS4_GPD0(0),
724 .func = S3C_GPIO_SFN(2),
9edff0f7
GM
725};
726
727static struct platform_pwm_backlight_data origen_bl_data = {
6e01280f
IS
728 .pwm_id = 0,
729 .pwm_period_ns = 1000,
9edff0f7
GM
730};
731
62d30f86
SL
732static void __init origen_bt_setup(void)
733{
734 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
735 /* 4 UART Pins configuration */
736 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
737 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
738 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
739 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
740}
741
ccc61fd4
TB
742/* I2C module and id for HDMIPHY */
743static struct i2c_board_info hdmiphy_info = {
744 I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
745};
746
3c766699
SK
747static void s5p_tv_setup(void)
748{
749 /* Direct HPD to HDMI chip */
750 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
751 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
752 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
753}
754
699efdd2
JK
755static void __init origen_map_io(void)
756{
cc511b8d 757 exynos_init_io(NULL, 0);
2e27437a 758 s3c24xx_init_clocks(clk_xusbxti.rate);
699efdd2
JK
759 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
760}
761
6e01280f
IS
762static void __init origen_power_init(void)
763{
764 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
765 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
766 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
767}
768
df74a28c
SK
769static void __init origen_reserve(void)
770{
771 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
772}
773
699efdd2
JK
774static void __init origen_machine_init(void)
775{
6e01280f
IS
776 origen_power_init();
777
778 s3c_i2c0_set_platdata(NULL);
779 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
780
cf1dad9d
TB
781 /*
782 * Since sdhci instance 2 can contain a bootable media,
783 * sdhci instance 0 is registered after instance 2.
784 */
699efdd2 785 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
cf1dad9d 786 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
24f9e1f3
SK
787
788 origen_ehci_init();
95de77d4 789 origen_ohci_init();
9c278d52 790 s3c_hsotg_set_platdata(&origen_hsotg_pdata);
24f9e1f3 791
3c766699 792 s5p_tv_setup();
6ca3f8bd 793 s5p_i2c_hdmiphy_set_platdata(NULL);
ccc61fd4 794 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
6ca3f8bd 795
479dda22 796#ifdef CONFIG_DRM_EXYNOS_FIMD
84e6aef0
SK
797 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
798 exynos4_fimd0_gpio_setup_24bpp();
799#else
9421a76d 800 s5p_fimd0_set_platdata(&origen_lcd_pdata);
84e6aef0 801#endif
9421a76d 802
699efdd2 803 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
df74a28c 804
4d8cc596 805 pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup));
9edff0f7 806 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
62d30f86
SL
807
808 origen_bt_setup();
699efdd2
JK
809}
810
811MACHINE_START(ORIGEN, "ORIGEN")
812 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
1abd328e 813 .atag_offset = 0x100,
06853ae4 814 .smp = smp_ops(exynos_smp_ops),
699efdd2
JK
815 .init_irq = exynos4_init_irq,
816 .map_io = origen_map_io,
4e44d2cb 817 .handle_irq = gic_handle_irq,
699efdd2 818 .init_machine = origen_machine_init,
bb13fabc 819 .init_late = exynos_init_late,
699efdd2 820 .timer = &exynos4_timer,
df74a28c 821 .reserve = &origen_reserve,
9eb48595 822 .restart = exynos4_restart,
699efdd2 823MACHINE_END
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