Merge branch 'next/cleanup-samsung' into next/cleanup-samsung-2
[deliverable/linux.git] / arch / arm / mach-exynos / mach-origen.c
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1/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
29e7d587 12#include <linux/leds.h>
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13#include <linux/gpio.h>
14#include <linux/mmc/host.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/input.h>
4d8cc596 18#include <linux/pwm.h>
9edff0f7 19#include <linux/pwm_backlight.h>
c86cfdd0 20#include <linux/gpio_keys.h>
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21#include <linux/i2c.h>
22#include <linux/regulator/machine.h>
23#include <linux/mfd/max8997.h>
9421a76d 24#include <linux/lcd.h>
62d30f86 25#include <linux/rfkill-gpio.h>
9c278d52 26#include <linux/platform_data/s3c-hsotg.h>
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27
28#include <asm/mach/arch.h>
4e44d2cb 29#include <asm/hardware/gic.h>
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30#include <asm/mach-types.h>
31
9421a76d 32#include <video/platform_lcd.h>
5a213a55 33#include <video/samsung_fimd.h>
9421a76d 34
699efdd2 35#include <plat/regs-serial.h>
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36#include <plat/cpu.h>
37#include <plat/devs.h>
38#include <plat/sdhci.h>
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39#include <linux/platform_data/i2c-s3c2410.h>
40#include <linux/platform_data/usb-ehci-s5p.h>
24f9e1f3 41#include <plat/clock.h>
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42#include <plat/gpio-cfg.h>
43#include <plat/backlight.h>
9421a76d 44#include <plat/fb.h>
df74a28c 45#include <plat/mfc.h>
ccc61fd4 46#include <plat/hdmi.h>
699efdd2 47
436d42c6 48#include <linux/platform_data/usb-exynos.h>
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49#include <mach/map.h>
50
84e6aef0 51#include <drm/exynos_drm.h>
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52#include "common.h"
53
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54/* Following are default values for UCON, ULCON and UFCON UART registers */
55#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
56 S3C2410_UCON_RXILEVEL | \
57 S3C2410_UCON_TXIRQMODE | \
58 S3C2410_UCON_RXIRQMODE | \
59 S3C2410_UCON_RXFIFO_TOI | \
60 S3C2443_UCON_RXERR_IRQEN)
61
62#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
63
64#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
65 S5PV210_UFCON_TXTRIG4 | \
66 S5PV210_UFCON_RXTRIG4)
67
68static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
69 [0] = {
70 .hwport = 0,
71 .flags = 0,
72 .ucon = ORIGEN_UCON_DEFAULT,
73 .ulcon = ORIGEN_ULCON_DEFAULT,
74 .ufcon = ORIGEN_UFCON_DEFAULT,
75 },
76 [1] = {
77 .hwport = 1,
78 .flags = 0,
79 .ucon = ORIGEN_UCON_DEFAULT,
80 .ulcon = ORIGEN_ULCON_DEFAULT,
81 .ufcon = ORIGEN_UFCON_DEFAULT,
82 },
83 [2] = {
84 .hwport = 2,
85 .flags = 0,
86 .ucon = ORIGEN_UCON_DEFAULT,
87 .ulcon = ORIGEN_ULCON_DEFAULT,
88 .ufcon = ORIGEN_UFCON_DEFAULT,
89 },
90 [3] = {
91 .hwport = 3,
92 .flags = 0,
93 .ucon = ORIGEN_UCON_DEFAULT,
94 .ulcon = ORIGEN_ULCON_DEFAULT,
95 .ufcon = ORIGEN_UFCON_DEFAULT,
96 },
97};
98
6e01280f 99static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
c421a1e4 100 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
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101 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
102 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
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103};
104static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
c421a1e4 105 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
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106};
107static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
108 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
109};
110static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
111 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
5dfb1aa5 112 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
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113};
114static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
115 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
116};
117static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
118 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
119};
120static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
121 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
122};
123static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
124 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
125};
126static struct regulator_consumer_supply __initdata buck1_consumer[] = {
127 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
128};
129static struct regulator_consumer_supply __initdata buck2_consumer[] = {
130 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
131};
132static struct regulator_consumer_supply __initdata buck3_consumer[] = {
133 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
134};
135static struct regulator_consumer_supply __initdata buck7_consumer[] = {
136 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
137};
138
139static struct regulator_init_data __initdata max8997_ldo1_data = {
140 .constraints = {
141 .name = "VDD_ABB_3.3V",
142 .min_uV = 3300000,
143 .max_uV = 3300000,
144 .apply_uV = 1,
145 .state_mem = {
146 .disabled = 1,
147 },
148 },
149};
150
151static struct regulator_init_data __initdata max8997_ldo2_data = {
152 .constraints = {
153 .name = "VDD_ALIVE_1.1V",
154 .min_uV = 1100000,
155 .max_uV = 1100000,
156 .apply_uV = 1,
157 .always_on = 1,
158 .state_mem = {
159 .enabled = 1,
160 },
161 },
162};
163
164static struct regulator_init_data __initdata max8997_ldo3_data = {
165 .constraints = {
166 .name = "VMIPI_1.1V",
167 .min_uV = 1100000,
168 .max_uV = 1100000,
169 .apply_uV = 1,
170 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
171 .state_mem = {
172 .disabled = 1,
173 },
174 },
175 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
176 .consumer_supplies = ldo3_consumer,
177};
178
179static struct regulator_init_data __initdata max8997_ldo4_data = {
180 .constraints = {
181 .name = "VDD_RTC_1.8V",
182 .min_uV = 1800000,
183 .max_uV = 1800000,
184 .apply_uV = 1,
185 .always_on = 1,
186 .state_mem = {
187 .disabled = 1,
188 },
189 },
190};
191
192static struct regulator_init_data __initdata max8997_ldo6_data = {
193 .constraints = {
194 .name = "VMIPI_1.8V",
195 .min_uV = 1800000,
196 .max_uV = 1800000,
197 .apply_uV = 1,
198 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
199 .state_mem = {
200 .disabled = 1,
201 },
202 },
203 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
204 .consumer_supplies = ldo6_consumer,
205};
206
207static struct regulator_init_data __initdata max8997_ldo7_data = {
208 .constraints = {
209 .name = "VDD_AUD_1.8V",
210 .min_uV = 1800000,
211 .max_uV = 1800000,
212 .apply_uV = 1,
213 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
214 .state_mem = {
215 .disabled = 1,
216 },
217 },
218 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
219 .consumer_supplies = ldo7_consumer,
220};
221
222static struct regulator_init_data __initdata max8997_ldo8_data = {
223 .constraints = {
224 .name = "VADC_3.3V",
225 .min_uV = 3300000,
226 .max_uV = 3300000,
227 .apply_uV = 1,
228 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
229 .state_mem = {
230 .disabled = 1,
231 },
232 },
233 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
234 .consumer_supplies = ldo8_consumer,
235};
236
237static struct regulator_init_data __initdata max8997_ldo9_data = {
238 .constraints = {
239 .name = "DVDD_SWB_2.8V",
240 .min_uV = 2800000,
241 .max_uV = 2800000,
242 .apply_uV = 1,
62d30f86 243 .always_on = 1,
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244 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
245 .state_mem = {
246 .disabled = 1,
247 },
248 },
249 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
250 .consumer_supplies = ldo9_consumer,
251};
252
253static struct regulator_init_data __initdata max8997_ldo10_data = {
254 .constraints = {
255 .name = "VDD_PLL_1.1V",
256 .min_uV = 1100000,
257 .max_uV = 1100000,
258 .apply_uV = 1,
259 .always_on = 1,
260 .state_mem = {
261 .disabled = 1,
262 },
263 },
264};
265
266static struct regulator_init_data __initdata max8997_ldo11_data = {
267 .constraints = {
268 .name = "VDD_AUD_3V",
269 .min_uV = 3000000,
270 .max_uV = 3000000,
271 .apply_uV = 1,
272 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
273 .state_mem = {
274 .disabled = 1,
275 },
276 },
277 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
278 .consumer_supplies = ldo11_consumer,
279};
280
281static struct regulator_init_data __initdata max8997_ldo14_data = {
282 .constraints = {
283 .name = "AVDD18_SWB_1.8V",
284 .min_uV = 1800000,
285 .max_uV = 1800000,
286 .apply_uV = 1,
62d30f86 287 .always_on = 1,
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288 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
289 .state_mem = {
290 .disabled = 1,
291 },
292 },
293 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
294 .consumer_supplies = ldo14_consumer,
295};
296
297static struct regulator_init_data __initdata max8997_ldo17_data = {
298 .constraints = {
299 .name = "VDD_SWB_3.3V",
300 .min_uV = 3300000,
301 .max_uV = 3300000,
302 .apply_uV = 1,
62d30f86 303 .always_on = 1,
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304 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
305 .state_mem = {
306 .disabled = 1,
307 },
308 },
309 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
310 .consumer_supplies = ldo17_consumer,
311};
312
313static struct regulator_init_data __initdata max8997_ldo21_data = {
314 .constraints = {
315 .name = "VDD_MIF_1.2V",
316 .min_uV = 1200000,
317 .max_uV = 1200000,
318 .apply_uV = 1,
319 .always_on = 1,
320 .state_mem = {
321 .disabled = 1,
322 },
323 },
324};
325
326static struct regulator_init_data __initdata max8997_buck1_data = {
327 .constraints = {
328 .name = "VDD_ARM_1.2V",
329 .min_uV = 950000,
330 .max_uV = 1350000,
331 .always_on = 1,
332 .boot_on = 1,
333 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
334 .state_mem = {
335 .disabled = 1,
336 },
337 },
338 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
339 .consumer_supplies = buck1_consumer,
340};
341
342static struct regulator_init_data __initdata max8997_buck2_data = {
343 .constraints = {
344 .name = "VDD_INT_1.1V",
345 .min_uV = 900000,
346 .max_uV = 1100000,
347 .always_on = 1,
348 .boot_on = 1,
349 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
350 .state_mem = {
351 .disabled = 1,
352 },
353 },
354 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
355 .consumer_supplies = buck2_consumer,
356};
357
358static struct regulator_init_data __initdata max8997_buck3_data = {
359 .constraints = {
360 .name = "VDD_G3D_1.1V",
361 .min_uV = 900000,
362 .max_uV = 1100000,
363 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
364 REGULATOR_CHANGE_STATUS,
365 .state_mem = {
366 .disabled = 1,
367 },
368 },
369 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
370 .consumer_supplies = buck3_consumer,
371};
372
373static struct regulator_init_data __initdata max8997_buck5_data = {
374 .constraints = {
375 .name = "VDDQ_M1M2_1.2V",
376 .min_uV = 1200000,
377 .max_uV = 1200000,
378 .apply_uV = 1,
379 .always_on = 1,
380 .state_mem = {
381 .disabled = 1,
382 },
383 },
384};
385
386static struct regulator_init_data __initdata max8997_buck7_data = {
387 .constraints = {
388 .name = "VDD_LCD_3.3V",
389 .min_uV = 3300000,
390 .max_uV = 3300000,
391 .boot_on = 1,
392 .apply_uV = 1,
393 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
394 .state_mem = {
395 .disabled = 1
396 },
397 },
398 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
399 .consumer_supplies = buck7_consumer,
400};
401
402static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
403 { MAX8997_LDO1, &max8997_ldo1_data },
404 { MAX8997_LDO2, &max8997_ldo2_data },
405 { MAX8997_LDO3, &max8997_ldo3_data },
406 { MAX8997_LDO4, &max8997_ldo4_data },
407 { MAX8997_LDO6, &max8997_ldo6_data },
408 { MAX8997_LDO7, &max8997_ldo7_data },
409 { MAX8997_LDO8, &max8997_ldo8_data },
410 { MAX8997_LDO9, &max8997_ldo9_data },
411 { MAX8997_LDO10, &max8997_ldo10_data },
412 { MAX8997_LDO11, &max8997_ldo11_data },
413 { MAX8997_LDO14, &max8997_ldo14_data },
414 { MAX8997_LDO17, &max8997_ldo17_data },
415 { MAX8997_LDO21, &max8997_ldo21_data },
416 { MAX8997_BUCK1, &max8997_buck1_data },
417 { MAX8997_BUCK2, &max8997_buck2_data },
418 { MAX8997_BUCK3, &max8997_buck3_data },
419 { MAX8997_BUCK5, &max8997_buck5_data },
420 { MAX8997_BUCK7, &max8997_buck7_data },
421};
422
e745e06f 423static struct max8997_platform_data __initdata origen_max8997_pdata = {
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424 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
425 .regulators = origen_max8997_regulators,
426
427 .wakeup = true,
428 .buck1_gpiodvs = false,
429 .buck2_gpiodvs = false,
430 .buck5_gpiodvs = false,
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431
432 .ignore_gpiodvs_side_effect = true,
433 .buck125_default_idx = 0x0,
434
435 .buck125_gpios[0] = EXYNOS4_GPX0(0),
436 .buck125_gpios[1] = EXYNOS4_GPX0(1),
437 .buck125_gpios[2] = EXYNOS4_GPX0(2),
438
439 .buck1_voltage[0] = 1350000,
440 .buck1_voltage[1] = 1300000,
441 .buck1_voltage[2] = 1250000,
442 .buck1_voltage[3] = 1200000,
443 .buck1_voltage[4] = 1150000,
444 .buck1_voltage[5] = 1100000,
445 .buck1_voltage[6] = 1000000,
446 .buck1_voltage[7] = 950000,
447
448 .buck2_voltage[0] = 1100000,
449 .buck2_voltage[1] = 1100000,
450 .buck2_voltage[2] = 1100000,
451 .buck2_voltage[3] = 1100000,
452 .buck2_voltage[4] = 1000000,
453 .buck2_voltage[5] = 1000000,
454 .buck2_voltage[6] = 1000000,
455 .buck2_voltage[7] = 1000000,
456
457 .buck5_voltage[0] = 1200000,
458 .buck5_voltage[1] = 1200000,
459 .buck5_voltage[2] = 1200000,
460 .buck5_voltage[3] = 1200000,
461 .buck5_voltage[4] = 1200000,
462 .buck5_voltage[5] = 1200000,
463 .buck5_voltage[6] = 1200000,
464 .buck5_voltage[7] = 1200000,
465};
466
467/* I2C0 */
468static struct i2c_board_info i2c0_devs[] __initdata = {
469 {
470 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
471 .platform_data = &origen_max8997_pdata,
472 .irq = IRQ_EINT(4),
473 },
474};
475
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476static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
477 .cd_type = S3C_SDHCI_CD_INTERNAL,
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478};
479
699efdd2 480static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
92e41efd 481 .cd_type = S3C_SDHCI_CD_INTERNAL,
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482};
483
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484/* USB EHCI */
485static struct s5p_ehci_platdata origen_ehci_pdata;
486
487static void __init origen_ehci_init(void)
488{
489 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
490
491 s5p_ehci_set_platdata(pdata);
492}
493
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494/* USB OHCI */
495static struct exynos4_ohci_platdata origen_ohci_pdata;
496
497static void __init origen_ohci_init(void)
498{
499 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
500
501 exynos4_ohci_set_platdata(pdata);
502}
503
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504/* USB OTG */
505static struct s3c_hsotg_plat origen_hsotg_pdata;
506
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507static struct gpio_led origen_gpio_leds[] = {
508 {
509 .name = "origen::status1",
510 .default_trigger = "heartbeat",
511 .gpio = EXYNOS4_GPX1(3),
512 .active_low = 1,
513 },
514 {
515 .name = "origen::status2",
516 .default_trigger = "mmc0",
517 .gpio = EXYNOS4_GPX1(4),
518 .active_low = 1,
519 },
520};
521
522static struct gpio_led_platform_data origen_gpio_led_info = {
523 .leds = origen_gpio_leds,
524 .num_leds = ARRAY_SIZE(origen_gpio_leds),
525};
526
527static struct platform_device origen_leds_gpio = {
528 .name = "leds-gpio",
529 .id = -1,
530 .dev = {
531 .platform_data = &origen_gpio_led_info,
532 },
533};
534
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535static struct gpio_keys_button origen_gpio_keys_table[] = {
536 {
537 .code = KEY_MENU,
538 .gpio = EXYNOS4_GPX1(5),
539 .desc = "gpio-keys: KEY_MENU",
540 .type = EV_KEY,
541 .active_low = 1,
542 .wakeup = 1,
543 .debounce_interval = 1,
544 }, {
545 .code = KEY_HOME,
546 .gpio = EXYNOS4_GPX1(6),
547 .desc = "gpio-keys: KEY_HOME",
548 .type = EV_KEY,
549 .active_low = 1,
550 .wakeup = 1,
551 .debounce_interval = 1,
552 }, {
553 .code = KEY_BACK,
554 .gpio = EXYNOS4_GPX1(7),
555 .desc = "gpio-keys: KEY_BACK",
556 .type = EV_KEY,
557 .active_low = 1,
558 .wakeup = 1,
559 .debounce_interval = 1,
560 }, {
561 .code = KEY_UP,
562 .gpio = EXYNOS4_GPX2(0),
563 .desc = "gpio-keys: KEY_UP",
564 .type = EV_KEY,
565 .active_low = 1,
566 .wakeup = 1,
567 .debounce_interval = 1,
568 }, {
569 .code = KEY_DOWN,
570 .gpio = EXYNOS4_GPX2(1),
571 .desc = "gpio-keys: KEY_DOWN",
572 .type = EV_KEY,
573 .active_low = 1,
574 .wakeup = 1,
575 .debounce_interval = 1,
576 },
577};
578
579static struct gpio_keys_platform_data origen_gpio_keys_data = {
580 .buttons = origen_gpio_keys_table,
581 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
582};
583
584static struct platform_device origen_device_gpiokeys = {
585 .name = "gpio-keys",
586 .dev = {
587 .platform_data = &origen_gpio_keys_data,
588 },
589};
590
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591static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
592{
593 int ret;
594
595 if (power)
596 ret = gpio_request_one(EXYNOS4_GPE3(4),
597 GPIOF_OUT_INIT_HIGH, "GPE3_4");
598 else
599 ret = gpio_request_one(EXYNOS4_GPE3(4),
600 GPIOF_OUT_INIT_LOW, "GPE3_4");
601
602 gpio_free(EXYNOS4_GPE3(4));
603
604 if (ret)
605 pr_err("failed to request gpio for LCD power: %d\n", ret);
606}
607
608static struct plat_lcd_data origen_lcd_hv070wsa_data = {
609 .set_power = lcd_hv070wsa_set_power,
610};
611
612static struct platform_device origen_lcd_hv070wsa = {
613 .name = "platform-lcd",
614 .dev.parent = &s5p_device_fimd0.dev,
615 .dev.platform_data = &origen_lcd_hv070wsa_data,
616};
617
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618static struct pwm_lookup origen_pwm_lookup[] = {
619 PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
620};
621
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SK
622#ifdef CONFIG_DRM_EXYNOS
623static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
624 .panel = {
625 .timing = {
626 .left_margin = 64,
627 .right_margin = 16,
628 .upper_margin = 64,
629 .lower_margin = 16,
630 .hsync_len = 48,
631 .vsync_len = 3,
632 .xres = 1024,
633 .yres = 600,
634 },
635 },
636 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
637 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
638 VIDCON1_INV_VCLK,
639 .default_win = 0,
640 .bpp = 32,
641};
642#else
9421a76d 643static struct s3c_fb_pd_win origen_fb_win0 = {
79d3c41a
TA
644 .xres = 1024,
645 .yres = 600,
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646 .max_bpp = 32,
647 .default_bpp = 24,
384b1049
TB
648 .virtual_x = 1024,
649 .virtual_y = 2 * 600,
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TB
650};
651
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652static struct fb_videomode origen_lcd_timing = {
653 .left_margin = 64,
654 .right_margin = 16,
655 .upper_margin = 64,
656 .lower_margin = 16,
657 .hsync_len = 48,
658 .vsync_len = 3,
659 .xres = 1024,
660 .yres = 600,
661};
662
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663static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
664 .win[0] = &origen_fb_win0,
79d3c41a 665 .vtiming = &origen_lcd_timing,
9421a76d 666 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
815ed6fc
TB
667 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
668 VIDCON1_INV_VCLK,
9421a76d
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669 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
670};
84e6aef0 671#endif
9421a76d 672
62d30f86 673/* Bluetooth rfkill gpio platform data */
023c9ff6 674static struct rfkill_gpio_platform_data origen_bt_pdata = {
62d30f86
SL
675 .reset_gpio = EXYNOS4_GPX2(2),
676 .shutdown_gpio = -1,
677 .type = RFKILL_TYPE_BLUETOOTH,
678 .name = "origen-bt",
679};
680
681/* Bluetooth Platform device */
682static struct platform_device origen_device_bluetooth = {
683 .name = "rfkill_gpio",
684 .id = -1,
685 .dev = {
686 .platform_data = &origen_bt_pdata,
687 },
688};
689
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690static struct platform_device *origen_devices[] __initdata = {
691 &s3c_device_hsmmc2,
cf1dad9d 692 &s3c_device_hsmmc0,
9421a76d 693 &s3c_device_i2c0,
699efdd2 694 &s3c_device_rtc,
9c278d52 695 &s3c_device_usb_hsotg,
699efdd2 696 &s3c_device_wdt,
24f9e1f3 697 &s5p_device_ehci,
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SK
698 &s5p_device_fimc0,
699 &s5p_device_fimc1,
700 &s5p_device_fimc2,
701 &s5p_device_fimc3,
26e14514 702 &s5p_device_fimc_md,
9421a76d 703 &s5p_device_fimd0,
84207d83 704 &s5p_device_g2d,
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SK
705 &s5p_device_hdmi,
706 &s5p_device_i2c_hdmiphy,
965a330d 707 &s5p_device_jpeg,
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SK
708 &s5p_device_mfc,
709 &s5p_device_mfc_l,
710 &s5p_device_mfc_r,
6ca3f8bd 711 &s5p_device_mixer,
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SK
712#ifdef CONFIG_DRM_EXYNOS
713 &exynos_device_drm,
714#endif
95de77d4 715 &exynos4_device_ohci,
c86cfdd0 716 &origen_device_gpiokeys,
9421a76d 717 &origen_lcd_hv070wsa,
29e7d587 718 &origen_leds_gpio,
62d30f86 719 &origen_device_bluetooth,
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720};
721
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GM
722/* LCD Backlight data */
723static struct samsung_bl_gpio_info origen_bl_gpio_info = {
6e01280f
IS
724 .no = EXYNOS4_GPD0(0),
725 .func = S3C_GPIO_SFN(2),
9edff0f7
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726};
727
728static struct platform_pwm_backlight_data origen_bl_data = {
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IS
729 .pwm_id = 0,
730 .pwm_period_ns = 1000,
9edff0f7
GM
731};
732
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SL
733static void __init origen_bt_setup(void)
734{
735 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
736 /* 4 UART Pins configuration */
737 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
738 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
739 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
740 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
741}
742
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743/* I2C module and id for HDMIPHY */
744static struct i2c_board_info hdmiphy_info = {
745 I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
746};
747
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SK
748static void s5p_tv_setup(void)
749{
750 /* Direct HPD to HDMI chip */
751 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
752 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
753 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
754}
755
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756static void __init origen_map_io(void)
757{
cc511b8d 758 exynos_init_io(NULL, 0);
2e27437a 759 s3c24xx_init_clocks(clk_xusbxti.rate);
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760 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
761}
762
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763static void __init origen_power_init(void)
764{
765 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
766 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
767 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
768}
769
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SK
770static void __init origen_reserve(void)
771{
772 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
773}
774
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775static void __init origen_machine_init(void)
776{
6e01280f
IS
777 origen_power_init();
778
779 s3c_i2c0_set_platdata(NULL);
780 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
781
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TB
782 /*
783 * Since sdhci instance 2 can contain a bootable media,
784 * sdhci instance 0 is registered after instance 2.
785 */
699efdd2 786 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
cf1dad9d 787 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
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SK
788
789 origen_ehci_init();
95de77d4 790 origen_ohci_init();
9c278d52 791 s3c_hsotg_set_platdata(&origen_hsotg_pdata);
24f9e1f3 792
3c766699 793 s5p_tv_setup();
6ca3f8bd 794 s5p_i2c_hdmiphy_set_platdata(NULL);
ccc61fd4 795 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
6ca3f8bd 796
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SK
797#ifdef CONFIG_DRM_EXYNOS
798 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
799 exynos4_fimd0_gpio_setup_24bpp();
800#else
9421a76d 801 s5p_fimd0_set_platdata(&origen_lcd_pdata);
84e6aef0 802#endif
9421a76d 803
699efdd2 804 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
df74a28c 805
4d8cc596 806 pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup));
9edff0f7 807 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
62d30f86
SL
808
809 origen_bt_setup();
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810}
811
812MACHINE_START(ORIGEN, "ORIGEN")
813 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
1abd328e 814 .atag_offset = 0x100,
06853ae4 815 .smp = smp_ops(exynos_smp_ops),
699efdd2
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816 .init_irq = exynos4_init_irq,
817 .map_io = origen_map_io,
4e44d2cb 818 .handle_irq = gic_handle_irq,
699efdd2 819 .init_machine = origen_machine_init,
bb13fabc 820 .init_late = exynos_init_late,
699efdd2 821 .timer = &exynos4_timer,
df74a28c 822 .reserve = &origen_reserve,
9eb48595 823 .restart = exynos4_restart,
699efdd2 824MACHINE_END
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