ARM: EXYNOS4: convert MCT to percpu interrupt API
[deliverable/linux.git] / arch / arm / mach-exynos4 / mach-smdk4x12.c
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be4ab361 1/*
31451afd 2 * linux/arch/arm/mach-exynos4/mach-smdk4x12.c
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3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/gpio.h>
13#include <linux/i2c.h>
14#include <linux/input.h>
15#include <linux/io.h>
16#include <linux/mfd/max8997.h>
17#include <linux/mmc/host.h>
18#include <linux/platform_device.h>
19#include <linux/pwm_backlight.h>
20#include <linux/regulator/machine.h>
21#include <linux/serial_core.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach-types.h>
25
26#include <plat/backlight.h>
27#include <plat/clock.h>
28#include <plat/cpu.h>
29#include <plat/devs.h>
30#include <plat/exynos4.h>
31#include <plat/gpio-cfg.h>
32#include <plat/iic.h>
33#include <plat/keypad.h>
34#include <plat/regs-serial.h>
35#include <plat/sdhci.h>
36
37#include <mach/map.h>
38
39/* Following are default values for UCON, ULCON and UFCON UART registers */
31451afd 40#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
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41 S3C2410_UCON_RXILEVEL | \
42 S3C2410_UCON_TXIRQMODE | \
43 S3C2410_UCON_RXIRQMODE | \
44 S3C2410_UCON_RXFIFO_TOI | \
45 S3C2443_UCON_RXERR_IRQEN)
46
31451afd 47#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8
be4ab361 48
31451afd 49#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
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50 S5PV210_UFCON_TXTRIG4 | \
51 S5PV210_UFCON_RXTRIG4)
52
31451afd 53static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
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54 [0] = {
55 .hwport = 0,
56 .flags = 0,
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57 .ucon = SMDK4X12_UCON_DEFAULT,
58 .ulcon = SMDK4X12_ULCON_DEFAULT,
59 .ufcon = SMDK4X12_UFCON_DEFAULT,
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60 },
61 [1] = {
62 .hwport = 1,
63 .flags = 0,
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64 .ucon = SMDK4X12_UCON_DEFAULT,
65 .ulcon = SMDK4X12_ULCON_DEFAULT,
66 .ufcon = SMDK4X12_UFCON_DEFAULT,
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67 },
68 [2] = {
69 .hwport = 2,
70 .flags = 0,
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71 .ucon = SMDK4X12_UCON_DEFAULT,
72 .ulcon = SMDK4X12_ULCON_DEFAULT,
73 .ufcon = SMDK4X12_UFCON_DEFAULT,
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74 },
75 [3] = {
76 .hwport = 3,
77 .flags = 0,
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78 .ucon = SMDK4X12_UCON_DEFAULT,
79 .ulcon = SMDK4X12_ULCON_DEFAULT,
80 .ufcon = SMDK4X12_UFCON_DEFAULT,
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81 },
82};
83
31451afd 84static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
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85 .cd_type = S3C_SDHCI_CD_INTERNAL,
86 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
87#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
88 .max_width = 8,
89 .host_caps = MMC_CAP_8_BIT_DATA,
90#endif
91};
92
31451afd 93static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
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94 .cd_type = S3C_SDHCI_CD_INTERNAL,
95 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
96};
97
98static struct regulator_consumer_supply max8997_buck1 =
99 REGULATOR_SUPPLY("vdd_arm", NULL);
100
101static struct regulator_consumer_supply max8997_buck2 =
102 REGULATOR_SUPPLY("vdd_int", NULL);
103
104static struct regulator_consumer_supply max8997_buck3 =
105 REGULATOR_SUPPLY("vdd_g3d", NULL);
106
107static struct regulator_init_data max8997_buck1_data = {
108 .constraints = {
31451afd 109 .name = "VDD_ARM_SMDK4X12",
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110 .min_uV = 925000,
111 .max_uV = 1350000,
112 .always_on = 1,
113 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
114 .state_mem = {
115 .disabled = 1,
116 },
117 },
118 .num_consumer_supplies = 1,
119 .consumer_supplies = &max8997_buck1,
120};
121
122static struct regulator_init_data max8997_buck2_data = {
123 .constraints = {
31451afd 124 .name = "VDD_INT_SMDK4X12",
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125 .min_uV = 950000,
126 .max_uV = 1150000,
127 .always_on = 1,
128 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
129 .state_mem = {
130 .disabled = 1,
131 },
132 },
133 .num_consumer_supplies = 1,
134 .consumer_supplies = &max8997_buck2,
135};
136
137static struct regulator_init_data max8997_buck3_data = {
138 .constraints = {
31451afd 139 .name = "VDD_G3D_SMDK4X12",
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140 .min_uV = 950000,
141 .max_uV = 1150000,
142 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
143 REGULATOR_CHANGE_STATUS,
144 .state_mem = {
145 .disabled = 1,
146 },
147 },
148 .num_consumer_supplies = 1,
149 .consumer_supplies = &max8997_buck3,
150};
151
31451afd 152static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
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153 { MAX8997_BUCK1, &max8997_buck1_data },
154 { MAX8997_BUCK2, &max8997_buck2_data },
155 { MAX8997_BUCK3, &max8997_buck3_data },
156};
157
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158static struct max8997_platform_data smdk4x12_max8997_pdata = {
159 .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
160 .regulators = smdk4x12_max8997_regulators,
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161
162 .buck1_voltage[0] = 1100000, /* 1.1V */
163 .buck1_voltage[1] = 1100000, /* 1.1V */
164 .buck1_voltage[2] = 1100000, /* 1.1V */
165 .buck1_voltage[3] = 1100000, /* 1.1V */
166 .buck1_voltage[4] = 1100000, /* 1.1V */
167 .buck1_voltage[5] = 1100000, /* 1.1V */
168 .buck1_voltage[6] = 1000000, /* 1.0V */
169 .buck1_voltage[7] = 950000, /* 0.95V */
170
171 .buck2_voltage[0] = 1100000, /* 1.1V */
172 .buck2_voltage[1] = 1000000, /* 1.0V */
173 .buck2_voltage[2] = 950000, /* 0.95V */
174 .buck2_voltage[3] = 900000, /* 0.9V */
175 .buck2_voltage[4] = 1100000, /* 1.1V */
176 .buck2_voltage[5] = 1000000, /* 1.0V */
177 .buck2_voltage[6] = 950000, /* 0.95V */
178 .buck2_voltage[7] = 900000, /* 0.9V */
179
180 .buck5_voltage[0] = 1100000, /* 1.1V */
181 .buck5_voltage[1] = 1100000, /* 1.1V */
182 .buck5_voltage[2] = 1100000, /* 1.1V */
183 .buck5_voltage[3] = 1100000, /* 1.1V */
184 .buck5_voltage[4] = 1100000, /* 1.1V */
185 .buck5_voltage[5] = 1100000, /* 1.1V */
186 .buck5_voltage[6] = 1100000, /* 1.1V */
187 .buck5_voltage[7] = 1100000, /* 1.1V */
188};
189
31451afd 190static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
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191 {
192 I2C_BOARD_INFO("max8997", 0x66),
31451afd 193 .platform_data = &smdk4x12_max8997_pdata,
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194 }
195};
196
31451afd 197static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
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198 { I2C_BOARD_INFO("wm8994", 0x1a), }
199};
200
31451afd 201static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
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202 /* nothing here yet */
203};
204
31451afd 205static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
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206 /* nothing here yet */
207};
208
31451afd 209static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
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210 .no = EXYNOS4_GPD0(1),
211 .func = S3C_GPIO_SFN(2),
212};
213
31451afd 214static struct platform_pwm_backlight_data smdk4x12_bl_data = {
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215 .pwm_id = 1,
216 .pwm_period_ns = 1000,
217};
218
31451afd 219static uint32_t smdk4x12_keymap[] __initdata = {
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220 /* KEY(row, col, keycode) */
221 KEY(1, 0, KEY_D), KEY(1, 1, KEY_A), KEY(1, 2, KEY_B),
222 KEY(1, 3, KEY_E), KEY(1, 4, KEY_C)
223};
224
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225static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
226 .keymap = smdk4x12_keymap,
227 .keymap_size = ARRAY_SIZE(smdk4x12_keymap),
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228};
229
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230static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
231 .keymap_data = &smdk4x12_keymap_data,
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232 .rows = 2,
233 .cols = 5,
234};
235
31451afd 236static struct platform_device *smdk4x12_devices[] __initdata = {
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237 &s3c_device_hsmmc2,
238 &s3c_device_hsmmc3,
239 &s3c_device_i2c0,
240 &s3c_device_i2c1,
241 &s3c_device_i2c3,
242 &s3c_device_i2c7,
243 &s3c_device_rtc,
244 &s3c_device_wdt,
245 &samsung_device_keypad,
246};
247
31451afd 248static void __init smdk4x12_map_io(void)
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249{
250 clk_xusbxti.rate = 24000000;
251
252 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
253 s3c24xx_init_clocks(clk_xusbxti.rate);
31451afd 254 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
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255}
256
31451afd 257static void __init smdk4x12_machine_init(void)
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258{
259 s3c_i2c0_set_platdata(NULL);
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260 i2c_register_board_info(0, smdk4x12_i2c_devs0,
261 ARRAY_SIZE(smdk4x12_i2c_devs0));
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262
263 s3c_i2c1_set_platdata(NULL);
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264 i2c_register_board_info(1, smdk4x12_i2c_devs1,
265 ARRAY_SIZE(smdk4x12_i2c_devs1));
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266
267 s3c_i2c3_set_platdata(NULL);
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268 i2c_register_board_info(3, smdk4x12_i2c_devs3,
269 ARRAY_SIZE(smdk4x12_i2c_devs3));
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270
271 s3c_i2c7_set_platdata(NULL);
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272 i2c_register_board_info(7, smdk4x12_i2c_devs7,
273 ARRAY_SIZE(smdk4x12_i2c_devs7));
be4ab361 274
31451afd 275 samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
be4ab361 276
31451afd 277 samsung_keypad_set_platdata(&smdk4x12_keypad_data);
be4ab361 278
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279 s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
280 s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
be4ab361 281
31451afd 282 platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
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283}
284
285MACHINE_START(SMDK4212, "SMDK4212")
286 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
31451afd 287 .atag_offset = 0x100,
be4ab361 288 .init_irq = exynos4_init_irq,
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289 .map_io = smdk4x12_map_io,
290 .init_machine = smdk4x12_machine_init,
291 .timer = &exynos4_timer,
292MACHINE_END
293
294MACHINE_START(SMDK4412, "SMDK4412")
295 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
296 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
297 .atag_offset = 0x100,
298 .init_irq = exynos4_init_irq,
299 .map_io = smdk4x12_map_io,
300 .init_machine = smdk4x12_machine_init,
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301 .timer = &exynos4_timer,
302MACHINE_END
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