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d11135ca | 1 | /* linux/arch/arm/mach-exynos4/mach-universal_c210.c |
516607d6 KP |
2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | */ | |
9 | ||
34d79315 | 10 | #include <linux/platform_device.h> |
516607d6 | 11 | #include <linux/serial_core.h> |
34d79315 | 12 | #include <linux/input.h> |
3b7998f5 | 13 | #include <linux/i2c.h> |
34d79315 KP |
14 | #include <linux/gpio_keys.h> |
15 | #include <linux/gpio.h> | |
4d838ec0 | 16 | #include <linux/mfd/max8998.h> |
a8928ce7 KP |
17 | #include <linux/regulator/machine.h> |
18 | #include <linux/regulator/fixed.h> | |
4d838ec0 | 19 | #include <linux/regulator/max8952.h> |
a8928ce7 | 20 | #include <linux/mmc/host.h> |
b908af44 MS |
21 | #include <linux/i2c-gpio.h> |
22 | #include <linux/i2c/mcs.h> | |
516607d6 KP |
23 | |
24 | #include <asm/mach/arch.h> | |
25 | #include <asm/mach-types.h> | |
516607d6 KP |
26 | |
27 | #include <plat/regs-serial.h> | |
d11135ca | 28 | #include <plat/exynos4.h> |
516607d6 | 29 | #include <plat/cpu.h> |
acf5eda9 | 30 | #include <plat/devs.h> |
4d838ec0 | 31 | #include <plat/iic.h> |
a8928ce7 | 32 | #include <plat/sdhci.h> |
516607d6 KP |
33 | |
34 | #include <mach/map.h> | |
35 | ||
36 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | |
37 | #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | |
38 | S3C2410_UCON_RXILEVEL | \ | |
39 | S3C2410_UCON_TXIRQMODE | \ | |
40 | S3C2410_UCON_RXIRQMODE | \ | |
41 | S3C2410_UCON_RXFIFO_TOI | \ | |
42 | S3C2443_UCON_RXERR_IRQEN) | |
43 | ||
44 | #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8 | |
45 | ||
46 | #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | |
47 | S5PV210_UFCON_TXTRIG256 | \ | |
48 | S5PV210_UFCON_RXTRIG256) | |
49 | ||
50 | static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = { | |
51 | [0] = { | |
52 | .hwport = 0, | |
53 | .ucon = UNIVERSAL_UCON_DEFAULT, | |
54 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | |
55 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | |
56 | }, | |
57 | [1] = { | |
58 | .hwport = 1, | |
59 | .ucon = UNIVERSAL_UCON_DEFAULT, | |
60 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | |
61 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | |
62 | }, | |
63 | [2] = { | |
64 | .hwport = 2, | |
65 | .ucon = UNIVERSAL_UCON_DEFAULT, | |
66 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | |
67 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | |
68 | }, | |
69 | [3] = { | |
70 | .hwport = 3, | |
71 | .ucon = UNIVERSAL_UCON_DEFAULT, | |
72 | .ulcon = UNIVERSAL_ULCON_DEFAULT, | |
73 | .ufcon = UNIVERSAL_UFCON_DEFAULT, | |
74 | }, | |
75 | }; | |
76 | ||
4d838ec0 MS |
77 | static struct regulator_consumer_supply max8952_consumer = |
78 | REGULATOR_SUPPLY("vddarm", NULL); | |
79 | ||
80 | static struct max8952_platform_data universal_max8952_pdata __initdata = { | |
81 | .gpio_vid0 = EXYNOS4_GPX0(3), | |
82 | .gpio_vid1 = EXYNOS4_GPX0(4), | |
83 | .gpio_en = -1, /* Not controllable, set "Always High" */ | |
84 | .default_mode = 0, /* vid0 = 0, vid1 = 0 */ | |
85 | .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */ | |
86 | .sync_freq = 0, /* default: fastest */ | |
87 | .ramp_speed = 0, /* default: fastest */ | |
88 | ||
89 | .reg_data = { | |
90 | .constraints = { | |
91 | .name = "VARM_1.2V", | |
92 | .min_uV = 770000, | |
93 | .max_uV = 1400000, | |
94 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
95 | .always_on = 1, | |
96 | .boot_on = 1, | |
97 | }, | |
98 | .num_consumer_supplies = 1, | |
99 | .consumer_supplies = &max8952_consumer, | |
100 | }, | |
101 | }; | |
102 | ||
103 | static struct regulator_consumer_supply lp3974_buck1_consumer = | |
104 | REGULATOR_SUPPLY("vddint", NULL); | |
105 | ||
106 | static struct regulator_consumer_supply lp3974_buck2_consumer = | |
107 | REGULATOR_SUPPLY("vddg3d", NULL); | |
108 | ||
109 | static struct regulator_init_data lp3974_buck1_data = { | |
110 | .constraints = { | |
111 | .name = "VINT_1.1V", | |
112 | .min_uV = 750000, | |
113 | .max_uV = 1500000, | |
114 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
115 | REGULATOR_CHANGE_STATUS, | |
116 | .boot_on = 1, | |
117 | .state_mem = { | |
118 | .disabled = 1, | |
119 | }, | |
120 | }, | |
121 | .num_consumer_supplies = 1, | |
122 | .consumer_supplies = &lp3974_buck1_consumer, | |
123 | }; | |
124 | ||
125 | static struct regulator_init_data lp3974_buck2_data = { | |
126 | .constraints = { | |
127 | .name = "VG3D_1.1V", | |
128 | .min_uV = 750000, | |
129 | .max_uV = 1500000, | |
130 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
131 | REGULATOR_CHANGE_STATUS, | |
132 | .boot_on = 1, | |
133 | .state_mem = { | |
134 | .disabled = 1, | |
135 | }, | |
136 | }, | |
137 | .num_consumer_supplies = 1, | |
138 | .consumer_supplies = &lp3974_buck2_consumer, | |
139 | }; | |
140 | ||
141 | static struct regulator_init_data lp3974_buck3_data = { | |
142 | .constraints = { | |
143 | .name = "VCC_1.8V", | |
144 | .min_uV = 1800000, | |
145 | .max_uV = 1800000, | |
146 | .apply_uV = 1, | |
147 | .always_on = 1, | |
148 | .state_mem = { | |
149 | .enabled = 1, | |
150 | }, | |
151 | }, | |
152 | }; | |
153 | ||
154 | static struct regulator_init_data lp3974_buck4_data = { | |
155 | .constraints = { | |
156 | .name = "VMEM_1.2V", | |
157 | .min_uV = 1200000, | |
158 | .max_uV = 1200000, | |
159 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
160 | .apply_uV = 1, | |
161 | .state_mem = { | |
162 | .disabled = 1, | |
163 | }, | |
164 | }, | |
165 | }; | |
166 | ||
167 | static struct regulator_init_data lp3974_ldo2_data = { | |
168 | .constraints = { | |
169 | .name = "VALIVE_1.2V", | |
170 | .min_uV = 1200000, | |
171 | .max_uV = 1200000, | |
172 | .apply_uV = 1, | |
173 | .always_on = 1, | |
174 | .state_mem = { | |
175 | .enabled = 1, | |
176 | }, | |
177 | }, | |
178 | }; | |
179 | ||
180 | static struct regulator_init_data lp3974_ldo3_data = { | |
181 | .constraints = { | |
182 | .name = "VUSB+MIPI_1.1V", | |
183 | .min_uV = 1100000, | |
184 | .max_uV = 1100000, | |
185 | .apply_uV = 1, | |
186 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
187 | .state_mem = { | |
188 | .disabled = 1, | |
189 | }, | |
190 | }, | |
191 | }; | |
192 | ||
193 | static struct regulator_init_data lp3974_ldo4_data = { | |
194 | .constraints = { | |
195 | .name = "VADC_3.3V", | |
196 | .min_uV = 3300000, | |
197 | .max_uV = 3300000, | |
198 | .apply_uV = 1, | |
199 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
200 | .state_mem = { | |
201 | .disabled = 1, | |
202 | }, | |
203 | }, | |
204 | }; | |
205 | ||
206 | static struct regulator_init_data lp3974_ldo5_data = { | |
207 | .constraints = { | |
208 | .name = "VTF_2.8V", | |
209 | .min_uV = 2800000, | |
210 | .max_uV = 2800000, | |
211 | .apply_uV = 1, | |
212 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
213 | .state_mem = { | |
214 | .disabled = 1, | |
215 | }, | |
216 | }, | |
217 | }; | |
218 | ||
219 | static struct regulator_init_data lp3974_ldo6_data = { | |
220 | .constraints = { | |
221 | .name = "LDO6", | |
222 | .min_uV = 2000000, | |
223 | .max_uV = 2000000, | |
224 | .apply_uV = 1, | |
225 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
226 | .state_mem = { | |
227 | .disabled = 1, | |
228 | }, | |
229 | }, | |
230 | }; | |
231 | ||
232 | static struct regulator_init_data lp3974_ldo7_data = { | |
233 | .constraints = { | |
234 | .name = "VLCD+VMIPI_1.8V", | |
235 | .min_uV = 1800000, | |
236 | .max_uV = 1800000, | |
237 | .apply_uV = 1, | |
238 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
239 | .state_mem = { | |
240 | .disabled = 1, | |
241 | }, | |
242 | }, | |
243 | }; | |
244 | ||
245 | static struct regulator_init_data lp3974_ldo8_data = { | |
246 | .constraints = { | |
247 | .name = "VUSB+VDAC_3.3V", | |
248 | .min_uV = 3300000, | |
249 | .max_uV = 3300000, | |
250 | .apply_uV = 1, | |
251 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
252 | .state_mem = { | |
253 | .disabled = 1, | |
254 | }, | |
255 | }, | |
256 | }; | |
257 | ||
258 | static struct regulator_init_data lp3974_ldo9_data = { | |
259 | .constraints = { | |
260 | .name = "VCC_2.8V", | |
261 | .min_uV = 2800000, | |
262 | .max_uV = 2800000, | |
263 | .apply_uV = 1, | |
264 | .always_on = 1, | |
265 | .state_mem = { | |
266 | .enabled = 1, | |
267 | }, | |
268 | }, | |
269 | }; | |
270 | ||
271 | static struct regulator_init_data lp3974_ldo10_data = { | |
272 | .constraints = { | |
273 | .name = "VPLL_1.1V", | |
274 | .min_uV = 1100000, | |
275 | .max_uV = 1100000, | |
276 | .boot_on = 1, | |
277 | .apply_uV = 1, | |
278 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
279 | .state_mem = { | |
280 | .disabled = 1, | |
281 | }, | |
282 | }, | |
283 | }; | |
284 | ||
285 | static struct regulator_init_data lp3974_ldo11_data = { | |
286 | .constraints = { | |
287 | .name = "CAM_AF_3.3V", | |
288 | .min_uV = 3300000, | |
289 | .max_uV = 3300000, | |
290 | .apply_uV = 1, | |
291 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
292 | .state_mem = { | |
293 | .disabled = 1, | |
294 | }, | |
295 | }, | |
296 | }; | |
297 | ||
298 | static struct regulator_init_data lp3974_ldo12_data = { | |
299 | .constraints = { | |
300 | .name = "PS_2.8V", | |
301 | .min_uV = 2800000, | |
302 | .max_uV = 2800000, | |
303 | .apply_uV = 1, | |
304 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
305 | .state_mem = { | |
306 | .disabled = 1, | |
307 | }, | |
308 | }, | |
309 | }; | |
310 | ||
311 | static struct regulator_init_data lp3974_ldo13_data = { | |
312 | .constraints = { | |
313 | .name = "VHIC_1.2V", | |
314 | .min_uV = 1200000, | |
315 | .max_uV = 1200000, | |
316 | .apply_uV = 1, | |
317 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
318 | .state_mem = { | |
319 | .disabled = 1, | |
320 | }, | |
321 | }, | |
322 | }; | |
323 | ||
324 | static struct regulator_init_data lp3974_ldo14_data = { | |
325 | .constraints = { | |
326 | .name = "CAM_I_HOST_1.8V", | |
327 | .min_uV = 1800000, | |
328 | .max_uV = 1800000, | |
329 | .apply_uV = 1, | |
330 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
331 | .state_mem = { | |
332 | .disabled = 1, | |
333 | }, | |
334 | }, | |
335 | }; | |
336 | ||
337 | static struct regulator_init_data lp3974_ldo15_data = { | |
338 | .constraints = { | |
339 | .name = "CAM_S_DIG+FM33_CORE_1.2V", | |
340 | .min_uV = 1200000, | |
341 | .max_uV = 1200000, | |
342 | .apply_uV = 1, | |
343 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
344 | .state_mem = { | |
345 | .disabled = 1, | |
346 | }, | |
347 | }, | |
348 | }; | |
349 | ||
350 | static struct regulator_init_data lp3974_ldo16_data = { | |
351 | .constraints = { | |
352 | .name = "CAM_S_ANA_2.8V", | |
353 | .min_uV = 2800000, | |
354 | .max_uV = 2800000, | |
355 | .apply_uV = 1, | |
356 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
357 | .state_mem = { | |
358 | .disabled = 1, | |
359 | }, | |
360 | }, | |
361 | }; | |
362 | ||
363 | static struct regulator_init_data lp3974_ldo17_data = { | |
364 | .constraints = { | |
365 | .name = "VCC_3.0V_LCD", | |
366 | .min_uV = 3000000, | |
367 | .max_uV = 3000000, | |
368 | .apply_uV = 1, | |
369 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
370 | .boot_on = 1, | |
371 | .state_mem = { | |
372 | .disabled = 1, | |
373 | }, | |
374 | }, | |
375 | }; | |
376 | ||
377 | static struct regulator_init_data lp3974_32khz_ap_data = { | |
378 | .constraints = { | |
379 | .name = "32KHz AP", | |
380 | .always_on = 1, | |
381 | .state_mem = { | |
382 | .enabled = 1, | |
383 | }, | |
384 | }, | |
385 | }; | |
386 | ||
387 | static struct regulator_init_data lp3974_32khz_cp_data = { | |
388 | .constraints = { | |
389 | .name = "32KHz CP", | |
390 | .state_mem = { | |
391 | .disabled = 1, | |
392 | }, | |
393 | }, | |
394 | }; | |
395 | ||
396 | static struct regulator_init_data lp3974_vichg_data = { | |
397 | .constraints = { | |
398 | .name = "VICHG", | |
399 | .state_mem = { | |
400 | .disabled = 1, | |
401 | }, | |
402 | }, | |
403 | }; | |
404 | ||
405 | static struct regulator_init_data lp3974_esafeout1_data = { | |
406 | .constraints = { | |
407 | .name = "SAFEOUT1", | |
408 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
409 | .state_mem = { | |
410 | .enabled = 1, | |
411 | }, | |
412 | }, | |
413 | }; | |
414 | ||
415 | static struct regulator_init_data lp3974_esafeout2_data = { | |
416 | .constraints = { | |
417 | .name = "SAFEOUT2", | |
418 | .boot_on = 1, | |
419 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
420 | .state_mem = { | |
421 | .enabled = 1, | |
422 | }, | |
423 | }, | |
424 | }; | |
425 | ||
426 | static struct max8998_regulator_data lp3974_regulators[] = { | |
427 | { MAX8998_LDO2, &lp3974_ldo2_data }, | |
428 | { MAX8998_LDO3, &lp3974_ldo3_data }, | |
429 | { MAX8998_LDO4, &lp3974_ldo4_data }, | |
430 | { MAX8998_LDO5, &lp3974_ldo5_data }, | |
431 | { MAX8998_LDO6, &lp3974_ldo6_data }, | |
432 | { MAX8998_LDO7, &lp3974_ldo7_data }, | |
433 | { MAX8998_LDO8, &lp3974_ldo8_data }, | |
434 | { MAX8998_LDO9, &lp3974_ldo9_data }, | |
435 | { MAX8998_LDO10, &lp3974_ldo10_data }, | |
436 | { MAX8998_LDO11, &lp3974_ldo11_data }, | |
437 | { MAX8998_LDO12, &lp3974_ldo12_data }, | |
438 | { MAX8998_LDO13, &lp3974_ldo13_data }, | |
439 | { MAX8998_LDO14, &lp3974_ldo14_data }, | |
440 | { MAX8998_LDO15, &lp3974_ldo15_data }, | |
441 | { MAX8998_LDO16, &lp3974_ldo16_data }, | |
442 | { MAX8998_LDO17, &lp3974_ldo17_data }, | |
443 | { MAX8998_BUCK1, &lp3974_buck1_data }, | |
444 | { MAX8998_BUCK2, &lp3974_buck2_data }, | |
445 | { MAX8998_BUCK3, &lp3974_buck3_data }, | |
446 | { MAX8998_BUCK4, &lp3974_buck4_data }, | |
447 | { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data }, | |
448 | { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data }, | |
449 | { MAX8998_ENVICHG, &lp3974_vichg_data }, | |
450 | { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data }, | |
451 | { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data }, | |
452 | }; | |
453 | ||
454 | static struct max8998_platform_data universal_lp3974_pdata = { | |
455 | .num_regulators = ARRAY_SIZE(lp3974_regulators), | |
456 | .regulators = lp3974_regulators, | |
457 | .buck1_voltage1 = 1100000, /* INT */ | |
458 | .buck1_voltage2 = 1000000, | |
459 | .buck1_voltage3 = 1100000, | |
460 | .buck1_voltage4 = 1000000, | |
461 | .buck1_set1 = EXYNOS4_GPX0(5), | |
462 | .buck1_set2 = EXYNOS4_GPX0(6), | |
463 | .buck2_voltage1 = 1200000, /* G3D */ | |
464 | .buck2_voltage2 = 1100000, | |
465 | .buck1_default_idx = 0, | |
466 | .buck2_set3 = EXYNOS4_GPE2(0), | |
467 | .buck2_default_idx = 0, | |
468 | .wakeup = true, | |
469 | }; | |
470 | ||
471 | /* GPIO I2C 5 (PMIC) */ | |
472 | static struct i2c_board_info i2c5_devs[] __initdata = { | |
473 | { | |
474 | I2C_BOARD_INFO("max8952", 0xC0 >> 1), | |
475 | .platform_data = &universal_max8952_pdata, | |
476 | }, { | |
477 | I2C_BOARD_INFO("lp3974", 0xCC >> 1), | |
478 | .platform_data = &universal_lp3974_pdata, | |
479 | }, | |
480 | }; | |
481 | ||
b908af44 MS |
482 | /* GPIO I2C 12 (3 Touchkey) */ |
483 | static uint32_t touchkey_keymap[] = { | |
484 | /* MCS_KEY_MAP(value, keycode) */ | |
485 | MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */ | |
486 | MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */ | |
487 | }; | |
488 | ||
489 | static struct mcs_platform_data touchkey_data = { | |
490 | .keymap = touchkey_keymap, | |
491 | .keymap_size = ARRAY_SIZE(touchkey_keymap), | |
492 | .key_maxval = 2, | |
493 | }; | |
494 | ||
495 | /* GPIO I2C 3_TOUCH 2.8V */ | |
496 | #define I2C_GPIO_BUS_12 12 | |
497 | static struct i2c_gpio_platform_data i2c_gpio12_data = { | |
498 | .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */ | |
499 | .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */ | |
500 | }; | |
501 | ||
502 | static struct platform_device i2c_gpio12 = { | |
503 | .name = "i2c-gpio", | |
504 | .id = I2C_GPIO_BUS_12, | |
505 | .dev = { | |
506 | .platform_data = &i2c_gpio12_data, | |
507 | }, | |
508 | }; | |
509 | ||
510 | static struct i2c_board_info i2c_gpio12_devs[] __initdata = { | |
511 | { | |
512 | I2C_BOARD_INFO("mcs5080_touchkey", 0x20), | |
513 | .platform_data = &touchkey_data, | |
514 | }, | |
515 | }; | |
516 | ||
517 | static void __init universal_touchkey_init(void) | |
518 | { | |
519 | int gpio; | |
520 | ||
521 | gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */ | |
522 | gpio_request(gpio, "3_TOUCH_INT"); | |
523 | s5p_register_gpio_interrupt(gpio); | |
524 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); | |
525 | i2c_gpio12_devs[0].irq = gpio_to_irq(gpio); | |
526 | ||
527 | gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */ | |
528 | gpio_request(gpio, "3_TOUCH_EN"); | |
529 | gpio_direction_output(gpio, 1); | |
530 | } | |
531 | ||
4d838ec0 | 532 | /* GPIO KEYS */ |
34d79315 KP |
533 | static struct gpio_keys_button universal_gpio_keys_tables[] = { |
534 | { | |
535 | .code = KEY_VOLUMEUP, | |
d11135ca | 536 | .gpio = EXYNOS4_GPX2(0), /* XEINT16 */ |
34d79315 KP |
537 | .desc = "gpio-keys: KEY_VOLUMEUP", |
538 | .type = EV_KEY, | |
539 | .active_low = 1, | |
540 | .debounce_interval = 1, | |
541 | }, { | |
542 | .code = KEY_VOLUMEDOWN, | |
d11135ca | 543 | .gpio = EXYNOS4_GPX2(1), /* XEINT17 */ |
34d79315 KP |
544 | .desc = "gpio-keys: KEY_VOLUMEDOWN", |
545 | .type = EV_KEY, | |
546 | .active_low = 1, | |
547 | .debounce_interval = 1, | |
548 | }, { | |
549 | .code = KEY_CONFIG, | |
d11135ca | 550 | .gpio = EXYNOS4_GPX2(2), /* XEINT18 */ |
34d79315 KP |
551 | .desc = "gpio-keys: KEY_CONFIG", |
552 | .type = EV_KEY, | |
553 | .active_low = 1, | |
554 | .debounce_interval = 1, | |
555 | }, { | |
556 | .code = KEY_CAMERA, | |
d11135ca | 557 | .gpio = EXYNOS4_GPX2(3), /* XEINT19 */ |
34d79315 KP |
558 | .desc = "gpio-keys: KEY_CAMERA", |
559 | .type = EV_KEY, | |
560 | .active_low = 1, | |
561 | .debounce_interval = 1, | |
562 | }, { | |
563 | .code = KEY_OK, | |
d11135ca | 564 | .gpio = EXYNOS4_GPX3(5), /* XEINT29 */ |
34d79315 KP |
565 | .desc = "gpio-keys: KEY_OK", |
566 | .type = EV_KEY, | |
567 | .active_low = 1, | |
568 | .debounce_interval = 1, | |
569 | }, | |
570 | }; | |
571 | ||
572 | static struct gpio_keys_platform_data universal_gpio_keys_data = { | |
573 | .buttons = universal_gpio_keys_tables, | |
574 | .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables), | |
575 | }; | |
576 | ||
577 | static struct platform_device universal_gpio_keys = { | |
578 | .name = "gpio-keys", | |
579 | .dev = { | |
580 | .platform_data = &universal_gpio_keys_data, | |
581 | }, | |
582 | }; | |
583 | ||
a8928ce7 KP |
584 | /* eMMC */ |
585 | static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = { | |
586 | .max_width = 8, | |
587 | .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | | |
588 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | | |
589 | MMC_CAP_DISABLE), | |
590 | .cd_type = S3C_SDHCI_CD_PERMANENT, | |
591 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | |
592 | }; | |
593 | ||
594 | static struct regulator_consumer_supply mmc0_supplies[] = { | |
595 | REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), | |
596 | }; | |
597 | ||
598 | static struct regulator_init_data mmc0_fixed_voltage_init_data = { | |
599 | .constraints = { | |
600 | .name = "VMEM_VDD_2.8V", | |
601 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
602 | }, | |
603 | .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies), | |
604 | .consumer_supplies = mmc0_supplies, | |
605 | }; | |
606 | ||
607 | static struct fixed_voltage_config mmc0_fixed_voltage_config = { | |
608 | .supply_name = "MASSMEMORY_EN", | |
609 | .microvolts = 2800000, | |
d11135ca | 610 | .gpio = EXYNOS4_GPE1(3), |
a8928ce7 KP |
611 | .enable_high = true, |
612 | .init_data = &mmc0_fixed_voltage_init_data, | |
613 | }; | |
614 | ||
615 | static struct platform_device mmc0_fixed_voltage = { | |
616 | .name = "reg-fixed-voltage", | |
617 | .id = 0, | |
618 | .dev = { | |
619 | .platform_data = &mmc0_fixed_voltage_config, | |
620 | }, | |
621 | }; | |
622 | ||
623 | /* SD */ | |
624 | static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = { | |
625 | .max_width = 4, | |
626 | .host_caps = MMC_CAP_4_BIT_DATA | | |
627 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | | |
628 | MMC_CAP_DISABLE, | |
d11135ca | 629 | .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */ |
a8928ce7 KP |
630 | .ext_cd_gpio_invert = 1, |
631 | .cd_type = S3C_SDHCI_CD_GPIO, | |
632 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | |
633 | }; | |
634 | ||
635 | /* WiFi */ | |
636 | static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = { | |
637 | .max_width = 4, | |
638 | .host_caps = MMC_CAP_4_BIT_DATA | | |
639 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | | |
640 | MMC_CAP_DISABLE, | |
641 | .cd_type = S3C_SDHCI_CD_EXTERNAL, | |
642 | }; | |
643 | ||
644 | static void __init universal_sdhci_init(void) | |
645 | { | |
646 | s3c_sdhci0_set_platdata(&universal_hsmmc0_data); | |
647 | s3c_sdhci2_set_platdata(&universal_hsmmc2_data); | |
648 | s3c_sdhci3_set_platdata(&universal_hsmmc3_data); | |
649 | } | |
650 | ||
3b7998f5 KP |
651 | /* I2C0 */ |
652 | static struct i2c_board_info i2c0_devs[] __initdata = { | |
653 | /* Camera, To be updated */ | |
654 | }; | |
655 | ||
656 | /* I2C1 */ | |
657 | static struct i2c_board_info i2c1_devs[] __initdata = { | |
658 | /* Gyro, To be updated */ | |
659 | }; | |
660 | ||
34d79315 | 661 | static struct platform_device *universal_devices[] __initdata = { |
a8928ce7 | 662 | /* Samsung Platform Devices */ |
edd967b8 MS |
663 | &s5p_device_fimc0, |
664 | &s5p_device_fimc1, | |
665 | &s5p_device_fimc2, | |
666 | &s5p_device_fimc3, | |
a8928ce7 KP |
667 | &mmc0_fixed_voltage, |
668 | &s3c_device_hsmmc0, | |
669 | &s3c_device_hsmmc2, | |
670 | &s3c_device_hsmmc3, | |
4d838ec0 | 671 | &s3c_device_i2c5, |
a8928ce7 KP |
672 | |
673 | /* Universal Devices */ | |
b908af44 | 674 | &i2c_gpio12, |
34d79315 | 675 | &universal_gpio_keys, |
acf5eda9 | 676 | &s5p_device_onenand, |
34d79315 KP |
677 | }; |
678 | ||
516607d6 KP |
679 | static void __init universal_map_io(void) |
680 | { | |
681 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | |
682 | s3c24xx_init_clocks(24000000); | |
683 | s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs)); | |
684 | } | |
685 | ||
686 | static void __init universal_machine_init(void) | |
687 | { | |
a8928ce7 KP |
688 | universal_sdhci_init(); |
689 | ||
3b7998f5 KP |
690 | i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs)); |
691 | i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); | |
692 | ||
4d838ec0 MS |
693 | s3c_i2c5_set_platdata(NULL); |
694 | i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); | |
695 | ||
b908af44 MS |
696 | universal_touchkey_init(); |
697 | i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs, | |
698 | ARRAY_SIZE(i2c_gpio12_devs)); | |
699 | ||
34d79315 KP |
700 | /* Last */ |
701 | platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices)); | |
516607d6 KP |
702 | } |
703 | ||
704 | MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210") | |
705 | /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */ | |
516607d6 | 706 | .boot_params = S5P_PA_SDRAM + 0x100, |
d11135ca | 707 | .init_irq = exynos4_init_irq, |
516607d6 KP |
708 | .map_io = universal_map_io, |
709 | .init_machine = universal_machine_init, | |
d11135ca | 710 | .timer = &exynos4_timer, |
516607d6 | 711 | MACHINE_END |