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67388457 RH |
1 | /* |
2 | * Copyright 2010-2011 Calxeda, Inc. | |
3 | * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | #include <linux/init.h> | |
18 | #include <linux/smp.h> | |
19 | #include <linux/io.h> | |
20 | ||
21 | #include <asm/smp_scu.h> | |
22 | #include <asm/hardware/gic.h> | |
23 | ||
24 | #include "core.h" | |
25 | ||
26 | extern void secondary_startup(void); | |
27 | ||
7ad71b61 | 28 | static void __cpuinit highbank_secondary_init(unsigned int cpu) |
67388457 RH |
29 | { |
30 | gic_secondary_init(0); | |
31 | } | |
32 | ||
7ad71b61 | 33 | static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) |
67388457 RH |
34 | { |
35 | gic_raise_softirq(cpumask_of(cpu), 0); | |
36 | return 0; | |
37 | } | |
38 | ||
39 | /* | |
40 | * Initialise the CPU possible map early - this describes the CPUs | |
41 | * which may be present or become present in the system. | |
42 | */ | |
7ad71b61 | 43 | static void __init highbank_smp_init_cpus(void) |
67388457 | 44 | { |
7a2848d3 | 45 | unsigned int i, ncores = 4; |
67388457 RH |
46 | |
47 | /* sanity check */ | |
48 | if (ncores > NR_CPUS) { | |
49 | printk(KERN_WARNING | |
50 | "highbank: no. of cores (%d) greater than configured " | |
51 | "maximum of %d - clipping\n", | |
52 | ncores, NR_CPUS); | |
53 | ncores = NR_CPUS; | |
54 | } | |
55 | ||
56 | for (i = 0; i < ncores; i++) | |
57 | set_cpu_possible(i, true); | |
58 | ||
59 | set_smp_cross_call(gic_raise_softirq); | |
60 | } | |
61 | ||
7ad71b61 | 62 | static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) |
67388457 RH |
63 | { |
64 | int i; | |
65 | ||
7a2848d3 RH |
66 | if (scu_base_addr) |
67 | scu_enable(scu_base_addr); | |
67388457 RH |
68 | |
69 | /* | |
70 | * Write the address of secondary startup into the jump table | |
71 | * The cores are in wfi and wait until they receive a soft interrupt | |
72 | * and a non-zero value to jump to. Then the secondary CPU branches | |
73 | * to this address. | |
74 | */ | |
75 | for (i = 1; i < max_cpus; i++) | |
76 | highbank_set_cpu_jump(i, secondary_startup); | |
77 | } | |
7ad71b61 MZ |
78 | |
79 | struct smp_operations highbank_smp_ops __initdata = { | |
80 | .smp_init_cpus = highbank_smp_init_cpus, | |
81 | .smp_prepare_cpus = highbank_smp_prepare_cpus, | |
82 | .smp_secondary_init = highbank_secondary_init, | |
83 | .smp_boot_secondary = highbank_boot_secondary, | |
84 | #ifdef CONFIG_HOTPLUG_CPU | |
85 | .cpu_die = highbank_cpu_die, | |
86 | #endif | |
87 | }; |