Commit | Line | Data |
---|---|---|
6c7b0685 SH |
1 | #ifndef __MACH_IMX_CLK_H |
2 | #define __MACH_IMX_CLK_H | |
3 | ||
4 | #include <linux/spinlock.h> | |
5 | #include <linux/clk-provider.h> | |
3a84d17b SH |
6 | |
7 | extern spinlock_t imx_ccm_lock; | |
6c7b0685 | 8 | |
2af9e6db | 9 | struct clk *imx_clk_pllv1(const char *name, const char *parent, |
6c7b0685 SH |
10 | void __iomem *base); |
11 | ||
a547b816 SH |
12 | struct clk *imx_clk_pllv2(const char *name, const char *parent, |
13 | void __iomem *base); | |
14 | ||
a3f6b9db SG |
15 | enum imx_pllv3_type { |
16 | IMX_PLLV3_GENERIC, | |
17 | IMX_PLLV3_SYS, | |
18 | IMX_PLLV3_USB, | |
19 | IMX_PLLV3_AV, | |
20 | IMX_PLLV3_ENET, | |
a3f6b9db SG |
21 | }; |
22 | ||
23 | struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, | |
2b254693 | 24 | const char *parent_name, void __iomem *base, u32 div_mask); |
a3f6b9db | 25 | |
b75c0151 SH |
26 | struct clk *clk_register_gate2(struct device *dev, const char *name, |
27 | const char *parent_name, unsigned long flags, | |
28 | void __iomem *reg, u8 bit_idx, | |
29 | u8 clk_gate_flags, spinlock_t *lock); | |
30 | ||
75f83d06 MF |
31 | struct clk * imx_obtain_fixed_clock( |
32 | const char *name, unsigned long rate); | |
33 | ||
b75c0151 SH |
34 | static inline struct clk *imx_clk_gate2(const char *name, const char *parent, |
35 | void __iomem *reg, u8 shift) | |
36 | { | |
37 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, | |
38 | shift, 0, &imx_ccm_lock); | |
39 | } | |
40 | ||
a10bd67f SG |
41 | struct clk *imx_clk_pfd(const char *name, const char *parent_name, |
42 | void __iomem *reg, u8 idx); | |
43 | ||
32af7a83 SG |
44 | struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, |
45 | void __iomem *reg, u8 shift, u8 width, | |
46 | void __iomem *busy_reg, u8 busy_shift); | |
47 | ||
48 | struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, | |
49 | u8 width, void __iomem *busy_reg, u8 busy_shift, | |
50 | const char **parent_names, int num_parents); | |
51 | ||
6c7b0685 SH |
52 | static inline struct clk *imx_clk_fixed(const char *name, int rate) |
53 | { | |
54 | return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); | |
55 | } | |
56 | ||
57 | static inline struct clk *imx_clk_divider(const char *name, const char *parent, | |
58 | void __iomem *reg, u8 shift, u8 width) | |
59 | { | |
60 | return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, | |
61 | reg, shift, width, 0, &imx_ccm_lock); | |
62 | } | |
63 | ||
3ce92170 PZ |
64 | static inline struct clk *imx_clk_divider_flags(const char *name, |
65 | const char *parent, void __iomem *reg, u8 shift, u8 width, | |
66 | unsigned long flags) | |
67 | { | |
68 | return clk_register_divider(NULL, name, parent, flags, | |
69 | reg, shift, width, 0, &imx_ccm_lock); | |
70 | } | |
71 | ||
6c7b0685 SH |
72 | static inline struct clk *imx_clk_gate(const char *name, const char *parent, |
73 | void __iomem *reg, u8 shift) | |
74 | { | |
75 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, | |
76 | shift, 0, &imx_ccm_lock); | |
77 | } | |
78 | ||
79 | static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, | |
80 | u8 shift, u8 width, const char **parents, int num_parents) | |
81 | { | |
82 | return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift, | |
83 | width, 0, &imx_ccm_lock); | |
84 | } | |
85 | ||
3ce92170 PZ |
86 | static inline struct clk *imx_clk_mux_flags(const char *name, |
87 | void __iomem *reg, u8 shift, u8 width, const char **parents, | |
88 | int num_parents, unsigned long flags) | |
89 | { | |
90 | return clk_register_mux(NULL, name, parents, num_parents, | |
91 | flags, reg, shift, width, 0, | |
92 | &imx_ccm_lock); | |
93 | } | |
94 | ||
6c7b0685 SH |
95 | static inline struct clk *imx_clk_fixed_factor(const char *name, |
96 | const char *parent, unsigned int mult, unsigned int div) | |
97 | { | |
98 | return clk_register_fixed_factor(NULL, name, parent, | |
99 | CLK_SET_RATE_PARENT, mult, div); | |
100 | } | |
101 | ||
102 | #endif |