Commit | Line | Data |
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6c7b0685 SH |
1 | #ifndef __MACH_IMX_CLK_H |
2 | #define __MACH_IMX_CLK_H | |
3 | ||
4 | #include <linux/spinlock.h> | |
5 | #include <linux/clk-provider.h> | |
3a84d17b SH |
6 | |
7 | extern spinlock_t imx_ccm_lock; | |
6c7b0685 | 8 | |
2af9e6db | 9 | struct clk *imx_clk_pllv1(const char *name, const char *parent, |
6c7b0685 SH |
10 | void __iomem *base); |
11 | ||
a547b816 SH |
12 | struct clk *imx_clk_pllv2(const char *name, const char *parent, |
13 | void __iomem *base); | |
14 | ||
a3f6b9db SG |
15 | enum imx_pllv3_type { |
16 | IMX_PLLV3_GENERIC, | |
17 | IMX_PLLV3_SYS, | |
18 | IMX_PLLV3_USB, | |
19 | IMX_PLLV3_AV, | |
20 | IMX_PLLV3_ENET, | |
21 | IMX_PLLV3_MLB, | |
22 | }; | |
23 | ||
24 | struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, | |
25 | const char *parent_name, void __iomem *base, u32 gate_mask, | |
26 | u32 div_mask); | |
27 | ||
b75c0151 SH |
28 | struct clk *clk_register_gate2(struct device *dev, const char *name, |
29 | const char *parent_name, unsigned long flags, | |
30 | void __iomem *reg, u8 bit_idx, | |
31 | u8 clk_gate_flags, spinlock_t *lock); | |
32 | ||
33 | static inline struct clk *imx_clk_gate2(const char *name, const char *parent, | |
34 | void __iomem *reg, u8 shift) | |
35 | { | |
36 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, | |
37 | shift, 0, &imx_ccm_lock); | |
38 | } | |
39 | ||
a10bd67f SG |
40 | struct clk *imx_clk_pfd(const char *name, const char *parent_name, |
41 | void __iomem *reg, u8 idx); | |
42 | ||
32af7a83 SG |
43 | struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, |
44 | void __iomem *reg, u8 shift, u8 width, | |
45 | void __iomem *busy_reg, u8 busy_shift); | |
46 | ||
47 | struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, | |
48 | u8 width, void __iomem *busy_reg, u8 busy_shift, | |
49 | const char **parent_names, int num_parents); | |
50 | ||
6c7b0685 SH |
51 | static inline struct clk *imx_clk_fixed(const char *name, int rate) |
52 | { | |
53 | return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); | |
54 | } | |
55 | ||
56 | static inline struct clk *imx_clk_divider(const char *name, const char *parent, | |
57 | void __iomem *reg, u8 shift, u8 width) | |
58 | { | |
59 | return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, | |
60 | reg, shift, width, 0, &imx_ccm_lock); | |
61 | } | |
62 | ||
63 | static inline struct clk *imx_clk_gate(const char *name, const char *parent, | |
64 | void __iomem *reg, u8 shift) | |
65 | { | |
66 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, | |
67 | shift, 0, &imx_ccm_lock); | |
68 | } | |
69 | ||
70 | static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, | |
71 | u8 shift, u8 width, const char **parents, int num_parents) | |
72 | { | |
73 | return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift, | |
74 | width, 0, &imx_ccm_lock); | |
75 | } | |
76 | ||
77 | static inline struct clk *imx_clk_fixed_factor(const char *name, | |
78 | const char *parent, unsigned int mult, unsigned int div) | |
79 | { | |
80 | return clk_register_fixed_factor(NULL, name, parent, | |
81 | CLK_SET_RATE_PARENT, mult, div); | |
82 | } | |
83 | ||
84 | #endif |