Merge tag 'pm+acpi-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[deliverable/linux.git] / arch / arm / mach-imx / common.h
CommitLineData
52c543f9 1/*
df595746 2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
52c543f9
QJ
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_COMMON_H__
12#define __ASM_ARCH_MXC_COMMON_H__
13
7b6d864b
RH
14#include <linux/reboot.h>
15
d48866fe 16struct irq_data;
282b13d0 17struct platform_device;
009e63f8 18struct pt_regs;
30c730f8 19struct clk;
876292d6 20struct device_node;
a1f1c7ef 21enum mxc_cpu_pwr_mode;
282b13d0 22
803648db
SG
23void mx1_map_io(void);
24void mx21_map_io(void);
25void mx25_map_io(void);
26void mx27_map_io(void);
27void mx31_map_io(void);
28void mx35_map_io(void);
29void mx51_map_io(void);
30void mx53_map_io(void);
31void imx1_init_early(void);
32void imx21_init_early(void);
33void imx25_init_early(void);
34void imx27_init_early(void);
35void imx31_init_early(void);
36void imx35_init_early(void);
37void imx51_init_early(void);
38void imx53_init_early(void);
39void mxc_init_irq(void __iomem *);
40void tzic_init_irq(void __iomem *);
41void mx1_init_irq(void);
42void mx21_init_irq(void);
43void mx25_init_irq(void);
44void mx27_init_irq(void);
45void mx31_init_irq(void);
46void mx35_init_irq(void);
47void mx51_init_irq(void);
48void mx53_init_irq(void);
49void imx1_soc_init(void);
50void imx21_soc_init(void);
51void imx25_soc_init(void);
52void imx27_soc_init(void);
53void imx31_soc_init(void);
54void imx35_soc_init(void);
55void imx51_soc_init(void);
56void imx51_init_late(void);
57void imx53_init_late(void);
58void epit_timer_init(void __iomem *base, int irq);
59void mxc_timer_init(void __iomem *, int);
876292d6 60void mxc_timer_init_dt(struct device_node *);
803648db
SG
61int mx1_clocks_init(unsigned long fref);
62int mx21_clocks_init(unsigned long lref, unsigned long fref);
63int mx25_clocks_init(void);
64int mx27_clocks_init(unsigned long fref);
65int mx31_clocks_init(unsigned long fref);
66int mx35_clocks_init(void);
67int mx51_clocks_init(unsigned long ckil, unsigned long osc,
a329b48c 68 unsigned long ckih1, unsigned long ckih2);
803648db
SG
69int mx25_clocks_init_dt(void);
70int mx27_clocks_init_dt(void);
71int mx31_clocks_init_dt(void);
72struct platform_device *mxc_register_gpio(char *name, int id,
b78d8e59 73 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
803648db
SG
74void mxc_set_cpu_type(unsigned int type);
75void mxc_restart(enum reboot_mode, const char *);
76void mxc_arch_reset_init(void __iomem *);
77void mxc_arch_reset_init_dt(void);
78int mx53_revision(void);
79void imx_set_aips(void __iomem *);
80int mxc_device_init(void);
bfefdff8
SG
81void imx_set_soc_revision(unsigned int rev);
82unsigned int imx_get_soc_revision(void);
f1c6f314 83void imx_init_revision_from_anatop(void);
a2887546 84struct device *imx_soc_device_init(void);
73d2b4cd 85
41e7daf2
SG
86enum mxc_cpu_pwr_mode {
87 WAIT_CLOCKED, /* wfi only */
88 WAIT_UNCLOCKED, /* WAIT */
89 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
90 STOP_POWER_ON, /* just STOP */
91 STOP_POWER_OFF, /* STOP + SRPG */
92};
93
3ac804e3
FE
94enum mx3_cpu_pwr_mode {
95 MX3_RUN,
96 MX3_WAIT,
97 MX3_DOZE,
98 MX3_SLEEP,
99};
100
803648db
SG
101void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
102void imx_print_silicon_rev(const char *cpu, int srev);
b6de943b 103
803648db
SG
104void imx_enable_cpu(int cpu, bool enable);
105void imx_set_cpu_jump(int cpu, void *jump_addr);
106u32 imx_get_cpu_arg(int cpu);
107void imx_set_cpu_arg(int cpu, u32 arg);
69c31b7a 108#ifdef CONFIG_SMP
803648db
SG
109void v7_secondary_startup(void);
110void imx_scu_map_io(void);
111void imx_smp_prepare(void);
112void imx_scu_standby_enable(void);
13eed989
SG
113#else
114static inline void imx_scu_map_io(void) {}
a1f1c7ef 115static inline void imx_smp_prepare(void) {}
e5f9dec8 116static inline void imx_scu_standby_enable(void) {}
69c31b7a 117#endif
803648db 118void imx_src_init(void);
803648db
SG
119void imx_gpc_init(void);
120void imx_gpc_pre_suspend(void);
121void imx_gpc_post_resume(void);
122void imx_gpc_mask_all(void);
123void imx_gpc_restore_all(void);
d48866fe
SG
124void imx_gpc_irq_mask(struct irq_data *d);
125void imx_gpc_irq_unmask(struct irq_data *d);
803648db
SG
126void imx_anatop_init(void);
127void imx_anatop_pre_suspend(void);
128void imx_anatop_post_resume(void);
129int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
fa6be65e 130void imx6q_set_int_mem_clk_lpm(void);
751f7e99 131void imx6sl_set_wait_clk(bool enter);
803648db
SG
132
133void imx_cpu_die(unsigned int cpu);
134int imx_cpu_kill(unsigned int cpu);
e4f2d979 135
c356bdb4
SG
136#ifdef CONFIG_SUSPEND
137void v7_cpu_resume(void);
df595746 138void imx6_suspend(void __iomem *ocram_vbase);
c356bdb4
SG
139#else
140static inline void v7_cpu_resume(void) {}
141static inline void imx6_suspend(void __iomem *ocram_vbase) {}
142#endif
143
803648db 144void imx6q_pm_init(void);
df595746
AH
145void imx6dl_pm_init(void);
146void imx6sl_pm_init(void);
9e8147bb 147void imx6q_pm_set_ccm_base(void __iomem *base);
df595746 148
28a9f3b0 149#ifdef CONFIG_PM
803648db 150void imx5_pm_init(void);
46ec1b26 151#else
547dd1e0 152static inline void imx5_pm_init(void) {}
46ec1b26
EM
153#endif
154
8321b758 155#ifdef CONFIG_NEON
803648db 156int mx51_neon_fixup(void);
8321b758
SG
157#else
158static inline int mx51_neon_fixup(void) { return 0; }
159#endif
160
e6a07569 161#ifdef CONFIG_CACHE_L2X0
803648db 162void imx_init_l2cache(void);
e6a07569
SG
163#else
164static inline void imx_init_l2cache(void) {}
165#endif
166
e4f2d979
MZ
167extern struct smp_operations imx_smp_ops;
168
52c543f9 169#endif
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