projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| f31405cc JB |
1 | /* |
| 2 | * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
| 3 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or | |
| 6 | * modify it under the terms of the GNU General Public License | |
| 7 | * as published by the Free Software Foundation; either version 2 | |
| 8 | * of the License, or (at your option) any later version. | |
| 9 | * This program is distributed in the hope that it will be useful, | |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | * GNU General Public License for more details. | |
| 13 | * | |
| 14 | * You should have received a copy of the GNU General Public License | |
| 15 | * along with this program; if not, write to the Free Software | |
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
| 17 | * MA 02110-1301, USA. | |
| 18 | */ | |
| 19 | ||
| 20 | /* | |
| 21 | * i.MX27 specific CPU detection code | |
| 22 | */ | |
| 23 | ||
| 24 | #include <linux/io.h> | |
| 25 | #include <linux/module.h> | |
| 26 | ||
| 50f2de61 | 27 | #include "hardware.h" |
| f31405cc | 28 | |
| 3f5492c5 JL |
29 | static int mx27_cpu_rev = -1; |
| 30 | static int mx27_cpu_partnumber; | |
| f31405cc | 31 | |
| edfcea80 SH |
32 | #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ |
| 33 | ||
| 3f5492c5 | 34 | static int mx27_read_cpu_rev(void) |
| f31405cc JB |
35 | { |
| 36 | u32 val; | |
| 37 | /* | |
| 38 | * now we have access to the IO registers. As we need | |
| 39 | * the silicon revision very early we read it here to | |
| 40 | * avoid any further hooks | |
| 41 | */ | |
| c553138f | 42 | val = imx_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR + SYS_CHIP_ID)); |
| f31405cc | 43 | |
| 3f5492c5 JL |
44 | mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF); |
| 45 | ||
| 9ab4650f DN |
46 | switch (val >> 28) { |
| 47 | case 0: | |
| 3f5492c5 | 48 | return IMX_CHIP_REVISION_1_0; |
| 9ab4650f | 49 | case 1: |
| 3f5492c5 | 50 | return IMX_CHIP_REVISION_2_0; |
| 9ab4650f | 51 | case 2: |
| 3f5492c5 | 52 | return IMX_CHIP_REVISION_2_1; |
| 9ab4650f | 53 | default: |
| 3f5492c5 | 54 | return IMX_CHIP_REVISION_UNKNOWN; |
| 9ab4650f | 55 | } |
| f31405cc JB |
56 | } |
| 57 | ||
| 58 | /* | |
| 59 | * Returns: | |
| 60 | * the silicon revision of the cpu | |
| 61 | * -EINVAL - not a mx27 | |
| 62 | */ | |
| 63 | int mx27_revision(void) | |
| 64 | { | |
| 3f5492c5 JL |
65 | if (mx27_cpu_rev == -1) |
| 66 | mx27_cpu_rev = mx27_read_cpu_rev(); | |
| f31405cc | 67 | |
| 3f5492c5 | 68 | if (mx27_cpu_partnumber != 0x8821) |
| f31405cc JB |
69 | return -EINVAL; |
| 70 | ||
| 3f5492c5 | 71 | return mx27_cpu_rev; |
| f31405cc JB |
72 | } |
| 73 | EXPORT_SYMBOL(mx27_revision); |