[deliverable/linux.git] / arch / arm / mach-imx / eukrea_mbimxsd35-baseboard.c

/*
 * Copyright (C) 2010 Eric Benard - eric@eukrea.com
 *
 * Based on pcm970-baseboard.c which is :
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/types.h>
#include <linux/init.h>

#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <video/platform_lcd.h>
#include <linux/i2c.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>

#include "common.h"
#include "devices-imx35.h"
#include "hardware.h"
#include "iomux-mx35.h"

static const struct fb_videomode fb_modedb[] = {
	{
		.name		= "CMO-QVGA",
		.refresh	= 60,
		.xres		= 320,
		.yres		= 240,
		.pixclock	= KHZ2PICOS(6500),
		.left_margin	= 68,
		.right_margin	= 20,
		.upper_margin	= 15,
		.lower_margin	= 4,
		.hsync_len	= 30,
		.vsync_len	= 3,
		.sync		= 0,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	},
	{
		.name		= "DVI-VGA",
		.refresh	= 60,
		.xres		= 640,
		.yres		= 480,
		.pixclock	= 32000,
		.left_margin	= 100,
		.right_margin	= 100,
		.upper_margin	= 7,
		.lower_margin	= 100,
		.hsync_len	= 7,
		.vsync_len	= 7,
		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
				  FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	},
	{
		.name		= "DVI-SVGA",
		.refresh	= 60,
		.xres		= 800,
		.yres		= 600,
		.pixclock	= 25000,
		.left_margin	= 75,
		.right_margin	= 75,
		.upper_margin	= 7,
		.lower_margin	= 75,
		.hsync_len	= 7,
		.vsync_len	= 7,
		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
				  FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	},
};

static struct mx3fb_platform_data mx3fb_pdata __initdata = {
	.name		= "CMO-QVGA",
	.mode		= fb_modedb,
	.num_modes	= ARRAY_SIZE(fb_modedb),
};

static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
	/* LCD */
	MX35_PAD_LD0__IPU_DISPB_DAT_0,
	MX35_PAD_LD1__IPU_DISPB_DAT_1,
	MX35_PAD_LD2__IPU_DISPB_DAT_2,
	MX35_PAD_LD3__IPU_DISPB_DAT_3,
	MX35_PAD_LD4__IPU_DISPB_DAT_4,
	MX35_PAD_LD5__IPU_DISPB_DAT_5,
	MX35_PAD_LD6__IPU_DISPB_DAT_6,
	MX35_PAD_LD7__IPU_DISPB_DAT_7,
	MX35_PAD_LD8__IPU_DISPB_DAT_8,
	MX35_PAD_LD9__IPU_DISPB_DAT_9,
	MX35_PAD_LD10__IPU_DISPB_DAT_10,
	MX35_PAD_LD11__IPU_DISPB_DAT_11,
	MX35_PAD_LD12__IPU_DISPB_DAT_12,
	MX35_PAD_LD13__IPU_DISPB_DAT_13,
	MX35_PAD_LD14__IPU_DISPB_DAT_14,
	MX35_PAD_LD15__IPU_DISPB_DAT_15,
	MX35_PAD_LD16__IPU_DISPB_DAT_16,
	MX35_PAD_LD17__IPU_DISPB_DAT_17,
	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
	/* Backlight */
	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
	/* LCD_PWR */
	MX35_PAD_D3_CLS__GPIO1_4,
	/* LED */
	MX35_PAD_LD23__GPIO3_29,
	/* SWITCH */
	MX35_PAD_LD19__GPIO3_25,
	/* UART2 */
	MX35_PAD_CTS2__UART2_CTS,
	MX35_PAD_RTS2__UART2_RTS,
	MX35_PAD_TXD2__UART2_TXD_MUX,
	MX35_PAD_RXD2__UART2_RXD_MUX,
	/* I2S */
	MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
	MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
	MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
	MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
	/* CAN2 */
	MX35_PAD_TX5_RX0__CAN2_TXCAN,
	MX35_PAD_TX4_RX1__CAN2_RXCAN,
	/* SDCARD */
	MX35_PAD_SD1_CMD__ESDHC1_CMD,
	MX35_PAD_SD1_CLK__ESDHC1_CLK,
	MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
	MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
	MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
	MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
	/* SD1 CD */
	MX35_PAD_LD18__GPIO3_24,
	/* SPI */
	MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,
	MX35_PAD_CSPI1_MISO__CSPI1_MISO,
	MX35_PAD_CSPI1_SS0__GPIO1_18,
	MX35_PAD_CSPI1_SS1__GPIO1_19,
	MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,
	MX35_PAD_CSPI1_SPI_RDY__GPIO3_5,
};

#define GPIO_LED1	IMX_GPIO_NR(3, 29)
#define GPIO_SWITCH1	IMX_GPIO_NR(3, 25)
#define GPIO_LCDPWR	IMX_GPIO_NR(1, 4)
#define GPIO_SD1CD	IMX_GPIO_NR(3, 24)
#define	GPIO_SPI1_SS0	IMX_GPIO_NR(1, 18)
#define	GPIO_SPI1_SS1	IMX_GPIO_NR(1, 19)
#define	GPIO_SPI1_IRQ	IMX_GPIO_NR(3, 5)

static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
				   unsigned int power)
{
	if (power)
		gpio_direction_output(GPIO_LCDPWR, 1);
	else
		gpio_direction_output(GPIO_LCDPWR, 0);
}

static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
	.set_power		= eukrea_mbimxsd_lcd_power_set,
};

static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
	.name			= "platform-lcd",
	.dev.platform_data	= &eukrea_mbimxsd_lcd_power_data,
};

static struct gpio_led eukrea_mbimxsd_leds[] = {
	{
		.name			= "led1",
		.default_trigger	= "heartbeat",
		.active_low		= 1,
		.gpio			= GPIO_LED1,
	},
};

static const struct gpio_led_platform_data
		eukrea_mbimxsd_led_info __initconst = {
	.leds		= eukrea_mbimxsd_leds,
	.num_leds	= ARRAY_SIZE(eukrea_mbimxsd_leds),
};

static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
	{
		.gpio		= GPIO_SWITCH1,
		.code		= BTN_0,
		.desc		= "BP1",
		.active_low	= 1,
		.wakeup		= 1,
	},
};

static const struct gpio_keys_platform_data
		eukrea_mbimxsd_button_data __initconst = {
	.buttons	= eukrea_mbimxsd_gpio_buttons,
	.nbuttons	= ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
};

static struct platform_device *platform_devices[] __initdata = {
	&eukrea_mbimxsd_lcd_powerdev,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
	{
		I2C_BOARD_INFO("tlv320aic23", 0x1a),
	},
};

static const
struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
	.flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
};

static struct esdhc_platform_data sd1_pdata = {
	.cd_gpio = GPIO_SD1CD,
	.cd_type = ESDHC_CD_GPIO,
	.wp_type = ESDHC_WP_NONE,
};

static struct spi_board_info eukrea_mbimxsd35_spi_board_info[] __initdata = {
	{
		.modalias = "spidev",
		.max_speed_hz = 20000000,
		.bus_num = 0,
		.chip_select = 0,
		.mode = SPI_MODE_0,
	},
	{
		.modalias = "spidev",
		.max_speed_hz = 20000000,
		.bus_num = 0,
		.chip_select = 1,
		.mode = SPI_MODE_0,
	},
};

static int eukrea_mbimxsd35_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};

static const struct spi_imx_master eukrea_mbimxsd35_spi0_data __initconst = {
	.chipselect     = eukrea_mbimxsd35_spi_cs,
	.num_chipselect = ARRAY_SIZE(eukrea_mbimxsd35_spi_cs),
};

/*
 * system init for baseboard usage. Will be called by cpuimx35 init.
 *
 * Add platform devices present on this baseboard and init
 * them from CPU side as far as required to use them later on
 */
void __init eukrea_mbimxsd35_baseboard_init(void)
{
	if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
			ARRAY_SIZE(eukrea_mbimxsd_pads)))
		printk(KERN_ERR "error setting mbimxsd pads !\n");

	imx35_add_imx_uart1(&uart_pdata);
	imx35_add_ipu_core();
	imx35_add_mx3_sdc_fb(&mx3fb_pdata);

	imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);

	imx35_add_flexcan1();
	imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);

	gpio_request(GPIO_LED1, "LED1");
	gpio_direction_output(GPIO_LED1, 1);
	gpio_free(GPIO_LED1);

	gpio_request(GPIO_SWITCH1, "SWITCH1");
	gpio_direction_input(GPIO_SWITCH1);
	gpio_free(GPIO_SWITCH1);

	gpio_request(GPIO_LCDPWR, "LCDPWR");
	gpio_direction_output(GPIO_LCDPWR, 1);

	i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
				ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));

	gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");
	gpio_direction_input(GPIO_SPI1_IRQ);
	gpio_free(GPIO_SPI1_IRQ);
	imx35_add_spi_imx0(&eukrea_mbimxsd35_spi0_data);
	spi_register_board_info(eukrea_mbimxsd35_spi_board_info,
		ARRAY_SIZE(eukrea_mbimxsd35_spi_board_info));

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
	imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
	imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
}
Commit	Line	Data
21744f19 EB	1	/*
	2	* Copyright (C) 2010 Eric Benard - eric@eukrea.com
	3	*
	4	* Based on pcm970-baseboard.c which is :
	5	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* as published by the Free Software Foundation; either version 2
	10	* of the License, or (at your option) any later version.
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	19	* MA 02110-1301, USA.
	20	*/
	21
	22	#include <linux/types.h>
	23	#include <linux/init.h>
	24
	25	#include <linux/gpio.h>
	26	#include <linux/interrupt.h>
	27	#include <linux/leds.h>
	28	#include <linux/platform_device.h>
21744f19	29	#include <linux/input.h>
0e189858	30	#include <linux/spi/spi.h>
21744f19 EB	31	#include <video/platform_lcd.h>
	32	#include <linux/i2c.h>
	33
	34	#include <asm/mach-types.h>
	35	#include <asm/mach/arch.h>
	36	#include <asm/mach/time.h>
	37	#include <asm/mach/map.h>
	38
e3372474	39	#include "common.h"
2dcf78c0	40	#include "devices-imx35.h"
50f2de61	41	#include "hardware.h"
267dd34c	42	#include "iomux-mx35.h"
21744f19 EB	43
	44	static const struct fb_videomode fb_modedb[] = {
	45	{
c0550c4b	46	.name = "CMO-QVGA",
21744f19 EB	47	.refresh = 60,
	48	.xres = 320,
	49	.yres = 240,
	50	.pixclock = KHZ2PICOS(6500),
	51	.left_margin = 68,
	52	.right_margin = 20,
	53	.upper_margin = 15,
	54	.lower_margin = 4,
	55	.hsync_len = 30,
	56	.vsync_len = 3,
	57	.sync = 0,
	58	.vmode = FB_VMODE_NONINTERLACED,
	59	.flag = 0,
	60	},
c0550c4b EB	61	{
	62	.name = "DVI-VGA",
	63	.refresh = 60,
	64	.xres = 640,
	65	.yres = 480,
	66	.pixclock = 32000,
	67	.left_margin = 100,
	68	.right_margin = 100,
	69	.upper_margin = 7,
	70	.lower_margin = 100,
	71	.hsync_len = 7,
	72	.vsync_len = 7,
	73	.sync = FB_SYNC_VERT_HIGH_ACT \| FB_SYNC_HOR_HIGH_ACT \|
	74	FB_SYNC_OE_ACT_HIGH \| FB_SYNC_CLK_INVERT,
	75	.vmode = FB_VMODE_NONINTERLACED,
	76	.flag = 0,
	77	},
	78	{
	79	.name = "DVI-SVGA",
	80	.refresh = 60,
	81	.xres = 800,
	82	.yres = 600,
	83	.pixclock = 25000,
	84	.left_margin = 75,
	85	.right_margin = 75,
	86	.upper_margin = 7,
	87	.lower_margin = 75,
	88	.hsync_len = 7,
	89	.vsync_len = 7,
	90	.sync = FB_SYNC_VERT_HIGH_ACT \| FB_SYNC_HOR_HIGH_ACT \|
	91	FB_SYNC_OE_ACT_HIGH \| FB_SYNC_CLK_INVERT,
	92	.vmode = FB_VMODE_NONINTERLACED,
	93	.flag = 0,
	94	},
21744f19 EB	95	};
21744f19 EB	96
afa77ef3	97	static struct mx3fb_platform_data mx3fb_pdata __initdata = {
c0550c4b	98	.name = "CMO-QVGA",
21744f19 EB	99	.mode = fb_modedb,
	100	.num_modes = ARRAY_SIZE(fb_modedb),
	101	};
	102
8f5260c8	103	static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
21744f19 EB	104	/* LCD */
	105	MX35_PAD_LD0__IPU_DISPB_DAT_0,
	106	MX35_PAD_LD1__IPU_DISPB_DAT_1,
	107	MX35_PAD_LD2__IPU_DISPB_DAT_2,
	108	MX35_PAD_LD3__IPU_DISPB_DAT_3,
	109	MX35_PAD_LD4__IPU_DISPB_DAT_4,
	110	MX35_PAD_LD5__IPU_DISPB_DAT_5,
	111	MX35_PAD_LD6__IPU_DISPB_DAT_6,
	112	MX35_PAD_LD7__IPU_DISPB_DAT_7,
	113	MX35_PAD_LD8__IPU_DISPB_DAT_8,
	114	MX35_PAD_LD9__IPU_DISPB_DAT_9,
	115	MX35_PAD_LD10__IPU_DISPB_DAT_10,
	116	MX35_PAD_LD11__IPU_DISPB_DAT_11,
	117	MX35_PAD_LD12__IPU_DISPB_DAT_12,
	118	MX35_PAD_LD13__IPU_DISPB_DAT_13,
	119	MX35_PAD_LD14__IPU_DISPB_DAT_14,
	120	MX35_PAD_LD15__IPU_DISPB_DAT_15,
	121	MX35_PAD_LD16__IPU_DISPB_DAT_16,
	122	MX35_PAD_LD17__IPU_DISPB_DAT_17,
	123	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
	124	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
	125	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
	126	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
	127	/* Backlight */
	128	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
	129	/* LCD_PWR */
	130	MX35_PAD_D3_CLS__GPIO1_4,
	131	/* LED */
	132	MX35_PAD_LD23__GPIO3_29,
	133	/* SWITCH */
	134	MX35_PAD_LD19__GPIO3_25,
	135	/* UART2 */
	136	MX35_PAD_CTS2__UART2_CTS,
	137	MX35_PAD_RTS2__UART2_RTS,
	138	MX35_PAD_TXD2__UART2_TXD_MUX,
	139	MX35_PAD_RXD2__UART2_RXD_MUX,
	140	/* I2S */
	141	MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
	142	MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
	143	MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
	144	MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
438a4d66 EB	145	/* CAN2 */
	146	MX35_PAD_TX5_RX0__CAN2_TXCAN,
	147	MX35_PAD_TX4_RX1__CAN2_RXCAN,
	148	/* SDCARD */
	149	MX35_PAD_SD1_CMD__ESDHC1_CMD,
	150	MX35_PAD_SD1_CLK__ESDHC1_CLK,
	151	MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
	152	MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
	153	MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
	154	MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
d335cf97 EB	155	/* SD1 CD */
d335cf97 EB	156	MX35_PAD_LD18__GPIO3_24,
0e189858 EB	157	/* SPI */
	158	MX35_PAD_CSPI1_MOSI__CSPI1_MOSI,
	159	MX35_PAD_CSPI1_MISO__CSPI1_MISO,
	160	MX35_PAD_CSPI1_SS0__GPIO1_18,
	161	MX35_PAD_CSPI1_SS1__GPIO1_19,
	162	MX35_PAD_CSPI1_SCLK__CSPI1_SCLK,
	163	MX35_PAD_CSPI1_SPI_RDY__GPIO3_5,
21744f19 EB	164	};
21744f19 EB	165
d4abe933 WS	166	#define GPIO_LED1 IMX_GPIO_NR(3, 29)
d4abe933 WS	167	#define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)
da8db3aa	168	#define GPIO_LCDPWR IMX_GPIO_NR(1, 4)
d335cf97	169	#define GPIO_SD1CD IMX_GPIO_NR(3, 24)
0e189858 EB	170	#define GPIO_SPI1_SS0 IMX_GPIO_NR(1, 18)
	171	#define GPIO_SPI1_SS1 IMX_GPIO_NR(1, 19)
	172	#define GPIO_SPI1_IRQ IMX_GPIO_NR(3, 5)
21744f19 EB	173
	174	static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
	175	unsigned int power)
	176	{
	177	if (power)
	178	gpio_direction_output(GPIO_LCDPWR, 1);
	179	else
	180	gpio_direction_output(GPIO_LCDPWR, 0);
	181	}
	182
	183	static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
	184	.set_power = eukrea_mbimxsd_lcd_power_set,
	185	};
	186
	187	static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
	188	.name = "platform-lcd",
	189	.dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
	190	};
	191
	192	static struct gpio_led eukrea_mbimxsd_leds[] = {
	193	{
	194	.name = "led1",
	195	.default_trigger = "heartbeat",
	196	.active_low = 1,
	197	.gpio = GPIO_LED1,
	198	},
	199	};
	200
47e837b5 UKK	201	static const struct gpio_led_platform_data
47e837b5 UKK	202	eukrea_mbimxsd_led_info __initconst = {
21744f19 EB	203	.leds = eukrea_mbimxsd_leds,
	204	.num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
	205	};
	206
21744f19 EB	207	static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
	208	{
	209	.gpio = GPIO_SWITCH1,
	210	.code = BTN_0,
	211	.desc = "BP1",
	212	.active_low = 1,
	213	.wakeup = 1,
	214	},
	215	};
	216
5309498a UKK	217	static const struct gpio_keys_platform_data
5309498a UKK	218	eukrea_mbimxsd_button_data __initconst = {
21744f19 EB	219	.buttons = eukrea_mbimxsd_gpio_buttons,
	220	.nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
	221	};
	222
21744f19	223	static struct platform_device *platform_devices[] __initdata = {
21744f19 EB	224	&eukrea_mbimxsd_lcd_powerdev,
	225	};
	226
2dcf78c0	227	static const struct imxuart_platform_data uart_pdata __initconst = {
21744f19 EB	228	.flags = IMXUART_HAVE_RTSCTS,
	229	};
	230
	231	static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
	232	{
	233	I2C_BOARD_INFO("tlv320aic23", 0x1a),
	234	},
	235	};
	236
4697bb92 UKK	237	static const
4697bb92 UKK	238	struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
21744f19 EB	239	.flags = IMX_SSI_SYN \| IMX_SSI_NET \| IMX_SSI_USE_I2S_SLAVE,
	240	};
	241
d335cf97 EB	242	static struct esdhc_platform_data sd1_pdata = {
d335cf97 EB	243	.cd_gpio = GPIO_SD1CD,
913413c3 SG	244	.cd_type = ESDHC_CD_GPIO,
913413c3 SG	245	.wp_type = ESDHC_WP_NONE,
d335cf97 EB	246	};
d335cf97 EB	247
0e189858 EB	248	static struct spi_board_info eukrea_mbimxsd35_spi_board_info[] __initdata = {
	249	{
	250	.modalias = "spidev",
	251	.max_speed_hz = 20000000,
	252	.bus_num = 0,
	253	.chip_select = 0,
	254	.mode = SPI_MODE_0,
	255	},
	256	{
	257	.modalias = "spidev",
	258	.max_speed_hz = 20000000,
	259	.bus_num = 0,
	260	.chip_select = 1,
	261	.mode = SPI_MODE_0,
	262	},
	263	};
	264
	265	static int eukrea_mbimxsd35_spi_cs[] = {GPIO_SPI1_SS0, GPIO_SPI1_SS1};
	266
	267	static const struct spi_imx_master eukrea_mbimxsd35_spi0_data __initconst = {
	268	.chipselect = eukrea_mbimxsd35_spi_cs,
	269	.num_chipselect = ARRAY_SIZE(eukrea_mbimxsd35_spi_cs),
	270	};
	271
21744f19 EB	272	/*
	273	* system init for baseboard usage. Will be called by cpuimx35 init.
	274	*
	275	* Add platform devices present on this baseboard and init
	276	* them from CPU side as far as required to use them later on
	277	*/
ec53fe3d	278	void __init eukrea_mbimxsd35_baseboard_init(void)
21744f19 EB	279	{
	280	if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
	281	ARRAY_SIZE(eukrea_mbimxsd_pads)))
	282	printk(KERN_ERR "error setting mbimxsd pads !\n");
	283
2dcf78c0	284	imx35_add_imx_uart1(&uart_pdata);
88289c80	285	imx35_add_ipu_core();
afa77ef3	286	imx35_add_mx3_sdc_fb(&mx3fb_pdata);
21744f19	287
4697bb92	288	imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
21744f19	289
30caa4b7	290	imx35_add_flexcan1();
d335cf97	291	imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
438a4d66	292
21744f19 EB	293	gpio_request(GPIO_LED1, "LED1");
	294	gpio_direction_output(GPIO_LED1, 1);
	295	gpio_free(GPIO_LED1);
	296
	297	gpio_request(GPIO_SWITCH1, "SWITCH1");
	298	gpio_direction_input(GPIO_SWITCH1);
	299	gpio_free(GPIO_SWITCH1);
	300
	301	gpio_request(GPIO_LCDPWR, "LCDPWR");
	302	gpio_direction_output(GPIO_LCDPWR, 1);
21744f19 EB	303
	304	i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
	305	ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
	306
0e189858 EB	307	gpio_request(GPIO_SPI1_IRQ, "SPI1_IRQ");
	308	gpio_direction_input(GPIO_SPI1_IRQ);
	309	gpio_free(GPIO_SPI1_IRQ);
	310	imx35_add_spi_imx0(&eukrea_mbimxsd35_spi0_data);
	311	spi_register_board_info(eukrea_mbimxsd35_spi_board_info,
	312	ARRAY_SIZE(eukrea_mbimxsd35_spi_board_info));
	313
21744f19	314	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
47e837b5	315	gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
5309498a	316	imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
da75c924	317	imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
21744f19	318	}