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69c31b7a SG |
1 | /* |
2 | * Copyright 2011 Freescale Semiconductor, Inc. | |
3 | * Copyright 2011 Linaro Ltd. | |
4 | * | |
5 | * The code contained herein is licensed under the GNU General Public | |
6 | * License. You may obtain a copy of the GNU General Public License | |
7 | * Version 2 or later at the following locations: | |
8 | * | |
9 | * http://www.opensource.org/licenses/gpl-license.html | |
10 | * http://www.gnu.org/copyleft/gpl.html | |
11 | */ | |
12 | ||
13 | #include <linux/errno.h> | |
14 | #include <asm/cacheflush.h> | |
602bf409 | 15 | #include <asm/cp15.h> |
69c31b7a SG |
16 | #include <mach/common.h> |
17 | ||
602bf409 SG |
18 | static inline void cpu_enter_lowpower(void) |
19 | { | |
20 | unsigned int v; | |
21 | ||
22 | flush_cache_all(); | |
23 | asm volatile( | |
24 | "mcr p15, 0, %1, c7, c5, 0\n" | |
25 | " mcr p15, 0, %1, c7, c10, 4\n" | |
26 | /* | |
27 | * Turn off coherency | |
28 | */ | |
29 | " mrc p15, 0, %0, c1, c0, 1\n" | |
30 | " bic %0, %0, %3\n" | |
31 | " mcr p15, 0, %0, c1, c0, 1\n" | |
32 | " mrc p15, 0, %0, c1, c0, 0\n" | |
33 | " bic %0, %0, %2\n" | |
34 | " mcr p15, 0, %0, c1, c0, 0\n" | |
35 | : "=&r" (v) | |
36 | : "r" (0), "Ir" (CR_C), "Ir" (0x40) | |
37 | : "cc"); | |
38 | } | |
39 | ||
69c31b7a SG |
40 | /* |
41 | * platform-specific code to shutdown a CPU | |
42 | * | |
43 | * Called with IRQs disabled | |
44 | */ | |
e4f2d979 | 45 | void imx_cpu_die(unsigned int cpu) |
69c31b7a | 46 | { |
602bf409 | 47 | cpu_enter_lowpower(); |
69c31b7a | 48 | imx_enable_cpu(cpu, false); |
69c31b7a | 49 | |
c944b0b9 SG |
50 | /* spin here until hardware takes it down */ |
51 | while (1) | |
52 | ; | |
69c31b7a | 53 | } |