[deliverable/linux.git] / arch / arm / mach-imx / mach-armadillo5x0.c

/*
 * armadillo5x0.c
 *
 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
 * updates in http://alberdroid.blogspot.com/
 *
 * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
 * Based on mx31ads.c and pcm037.c Great Work!
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/types.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/smsc911x.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/io.h>
#include <linux/input.h>
#include <linux/i2c.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/delay.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>

#include <mach/common.h>
#include <mach/iomux-mx3.h>
#include <mach/ulpi.h>

#include "devices-imx31.h"
#include "crmregs-imx31.h"

static int armadillo5x0_pins[] = {
	/* UART1 */
	MX31_PIN_CTS1__CTS1,
	MX31_PIN_RTS1__RTS1,
	MX31_PIN_TXD1__TXD1,
	MX31_PIN_RXD1__RXD1,
	/* UART2 */
	MX31_PIN_CTS2__CTS2,
	MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2,
	MX31_PIN_RXD2__RXD2,
	/* LAN9118_IRQ */
	IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
	/* SDHC1 */
	MX31_PIN_SD1_DATA3__SD1_DATA3,
	MX31_PIN_SD1_DATA2__SD1_DATA2,
	MX31_PIN_SD1_DATA1__SD1_DATA1,
	MX31_PIN_SD1_DATA0__SD1_DATA0,
	MX31_PIN_SD1_CLK__SD1_CLK,
	MX31_PIN_SD1_CMD__SD1_CMD,
	/* Framebuffer */
	MX31_PIN_LD0__LD0,
	MX31_PIN_LD1__LD1,
	MX31_PIN_LD2__LD2,
	MX31_PIN_LD3__LD3,
	MX31_PIN_LD4__LD4,
	MX31_PIN_LD5__LD5,
	MX31_PIN_LD6__LD6,
	MX31_PIN_LD7__LD7,
	MX31_PIN_LD8__LD8,
	MX31_PIN_LD9__LD9,
	MX31_PIN_LD10__LD10,
	MX31_PIN_LD11__LD11,
	MX31_PIN_LD12__LD12,
	MX31_PIN_LD13__LD13,
	MX31_PIN_LD14__LD14,
	MX31_PIN_LD15__LD15,
	MX31_PIN_LD16__LD16,
	MX31_PIN_LD17__LD17,
	MX31_PIN_VSYNC3__VSYNC3,
	MX31_PIN_HSYNC__HSYNC,
	MX31_PIN_FPSHIFT__FPSHIFT,
	MX31_PIN_DRDY0__DRDY0,
	IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
	/* I2C2 */
	MX31_PIN_CSPI2_MOSI__SCL,
	MX31_PIN_CSPI2_MISO__SDA,
	/* OTG */
	MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
	MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
	MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
	MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
	MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
	MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
	MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
	MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
	MX31_PIN_USBOTG_CLK__USBOTG_CLK,
	MX31_PIN_USBOTG_DIR__USBOTG_DIR,
	MX31_PIN_USBOTG_NXT__USBOTG_NXT,
	MX31_PIN_USBOTG_STP__USBOTG_STP,
	/* USB host 2 */
	IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
};

/* USB */

#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)

#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)

static int usbotg_init(struct platform_device *pdev)
{
	int err;

	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);

	/* Chip already enabled by hardware */
	/* OTG phy reset*/
	err = gpio_request(OTG_RESET, "USB-OTG-RESET");
	if (err) {
		pr_err("Failed to request the usb otg reset gpio\n");
		return err;
	}

	err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
	if (err) {
		pr_err("Failed to reset the usb otg phy\n");
		goto otg_free_reset;
	}

	gpio_set_value(OTG_RESET, 0/*LOW*/);
	mdelay(5);
	gpio_set_value(OTG_RESET, 1/*HIGH*/);
	mdelay(10);

	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
			MXC_EHCI_INTERFACE_DIFF_UNI);

otg_free_reset:
	gpio_free(OTG_RESET);
	return err;
}

static int usbh2_init(struct platform_device *pdev)
{
	int err;

	mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);

	mxc_iomux_set_gpr(MUX_PGP_UH2, true);


	/* Enable the chip */
	err = gpio_request(USBH2_CS, "USB-H2-CS");
	if (err) {
		pr_err("Failed to request the usb host 2 CS gpio\n");
		return err;
	}

	err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
	if (err) {
		pr_err("Failed to drive the usb host 2 CS gpio\n");
		goto h2_free_cs;
	}

	/* H2 phy reset*/
	err = gpio_request(USBH2_RESET, "USB-H2-RESET");
	if (err) {
		pr_err("Failed to request the usb host 2 reset gpio\n");
		goto h2_free_cs;
	}

	err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
	if (err) {
		pr_err("Failed to reset the usb host 2 phy\n");
		goto h2_free_reset;
	}

	gpio_set_value(USBH2_RESET, 0/*LOW*/);
	mdelay(5);
	gpio_set_value(USBH2_RESET, 1/*HIGH*/);
	mdelay(10);

	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
			MXC_EHCI_INTERFACE_DIFF_UNI);

h2_free_reset:
	gpio_free(USBH2_RESET);
h2_free_cs:
	gpio_free(USBH2_CS);
	return err;
}

static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
	.init	= usbotg_init,
	.portsc	= MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};

static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
	.init	= usbh2_init,
	.portsc	= MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};

/* RTC over I2C*/
#define ARMADILLO5X0_RTC_GPIO	IOMUX_TO_GPIO(MX31_PIN_SRXD4)

static struct i2c_board_info armadillo5x0_i2c_rtc = {
	I2C_BOARD_INFO("s35390a", 0x30),
};

/* GPIO BUTTONS */
static struct gpio_keys_button armadillo5x0_buttons[] = {
	{
		.code		= KEY_ENTER, /*28*/
		.gpio		= IOMUX_TO_GPIO(MX31_PIN_SCLK0),
		.active_low	= 1,
		.desc		= "menu",
		.wakeup		= 1,
	}, {
		.code		= KEY_BACK, /*158*/
		.gpio		= IOMUX_TO_GPIO(MX31_PIN_SRST0),
		.active_low	= 1,
		.desc		= "back",
		.wakeup		= 1,
	}
};

static const struct gpio_keys_platform_data
		armadillo5x0_button_data __initconst = {
	.buttons	= armadillo5x0_buttons,
	.nbuttons	= ARRAY_SIZE(armadillo5x0_buttons),
};

/*
 * NAND Flash
 */
static const struct mxc_nand_platform_data
armadillo5x0_nand_board_info __initconst = {
	.width		= 1,
	.hw_ecc		= 1,
};

/*
 * MTD NOR Flash
 */
static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
	{
		.name		= "nor.bootloader",
		.offset		= 0x00000000,
		.size		= 4*32*1024,
	}, {
		.name		= "nor.kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 16*128*1024,
	}, {
		.name		= "nor.userland",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 110*128*1024,
	}, {
		.name		= "nor.config",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 1*128*1024,
	},
};

static const struct physmap_flash_data
		armadillo5x0_nor_flash_pdata __initconst = {
	.width		= 2,
	.parts		= armadillo5x0_nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
};

static const struct resource armadillo5x0_nor_flash_resource __initconst = {
	.flags		= IORESOURCE_MEM,
	.start		= MX31_CS0_BASE_ADDR,
	.end		= MX31_CS0_BASE_ADDR + SZ_64M - 1,
};

/*
 * FB support
 */
static const struct fb_videomode fb_modedb[] = {
	{	/* 640x480 @ 60 Hz */
		.name		= "CRT-VGA",
		.refresh	= 60,
		.xres		= 640,
		.yres		= 480,
		.pixclock	= 39721,
		.left_margin	= 35,
		.right_margin	= 115,
		.upper_margin	= 43,
		.lower_margin	= 1,
		.hsync_len	= 10,
		.vsync_len	= 1,
		.sync		= FB_SYNC_OE_ACT_HIGH,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	}, {/* 800x600 @ 56 Hz */
		.name		= "CRT-SVGA",
		.refresh	= 56,
		.xres		= 800,
		.yres		= 600,
		.pixclock	= 30000,
		.left_margin	= 30,
		.right_margin	= 108,
		.upper_margin	= 13,
		.lower_margin	= 10,
		.hsync_len	= 10,
		.vsync_len	= 1,
		.sync		= FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
				  FB_SYNC_VERT_HIGH_ACT,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	},
};

static const struct ipu_platform_data mx3_ipu_data __initconst = {
	.irq_base = MXC_IPU_IRQ_START,
};

static struct mx3fb_platform_data mx3fb_pdata __initdata = {
	.name		= "CRT-VGA",
	.mode		= fb_modedb,
	.num_modes	= ARRAY_SIZE(fb_modedb),
};

/*
 * SDHC 1
 * MMC support
 */
static int armadillo5x0_sdhc1_get_ro(struct device *dev)
{
	return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
}

static int armadillo5x0_sdhc1_init(struct device *dev,
				   irq_handler_t detect_irq, void *data)
{
	int ret;
	int gpio_det, gpio_wp;

	gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
	gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);

	ret = gpio_request(gpio_det, "sdhc-card-detect");
	if (ret)
		return ret;

	gpio_direction_input(gpio_det);

	ret = gpio_request(gpio_wp, "sdhc-write-protect");
	if (ret)
		goto err_gpio_free;

	gpio_direction_input(gpio_wp);

	/* When supported the trigger type have to be BOTH */
	ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
			  "sdhc-detect", data);

	if (ret)
		goto err_gpio_free_2;

	return 0;

err_gpio_free_2:
	gpio_free(gpio_wp);

err_gpio_free:
	gpio_free(gpio_det);

	return ret;

}

static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
}

static const struct imxmmc_platform_data sdhc_pdata __initconst = {
	.get_ro = armadillo5x0_sdhc1_get_ro,
	.init = armadillo5x0_sdhc1_init,
	.exit = armadillo5x0_sdhc1_exit,
};

/*
 * SMSC 9118
 * Network support
 */
static struct resource armadillo5x0_smc911x_resources[] = {
	{
		.start	= MX31_CS3_BASE_ADDR,
		.end	= MX31_CS3_BASE_ADDR + SZ_32M - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
		.end	= IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	},
};

static struct smsc911x_platform_config smsc911x_info = {
	.flags		= SMSC911X_USE_16BIT,
	.irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
};

static struct platform_device armadillo5x0_smc911x_device = {
	.name           = "smsc911x",
	.id             = -1,
	.num_resources  = ARRAY_SIZE(armadillo5x0_smc911x_resources),
	.resource       = armadillo5x0_smc911x_resources,
	.dev            = {
		.platform_data = &smsc911x_info,
	},
};

/* UART device data */
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static struct platform_device *devices[] __initdata = {
	&armadillo5x0_smc911x_device,
};

/*
 * Perform board specific initializations
 */
static void __init armadillo5x0_init(void)
{
	imx31_soc_init();

	mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
			ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");

	platform_add_devices(devices, ARRAY_SIZE(devices));
	imx_add_gpio_keys(&armadillo5x0_button_data);
	imx31_add_imx_i2c1(NULL);

	/* Register UART */
	imx31_add_imx_uart0(&uart_pdata);
	imx31_add_imx_uart1(&uart_pdata);

	/* SMSC9118 IRQ pin */
	gpio_direction_input(MX31_PIN_GPIO1_0);

	/* Register SDHC */
	imx31_add_mxc_mmc(0, &sdhc_pdata);

	/* Register FB */
	imx31_add_ipu_core(&mx3_ipu_data);
	imx31_add_mx3_sdc_fb(&mx3fb_pdata);

	/* Register NOR Flash */
	platform_device_register_resndata(NULL, "physmap-flash", -1,
			&armadillo5x0_nor_flash_resource, 1,
			&armadillo5x0_nor_flash_pdata,
			sizeof(armadillo5x0_nor_flash_pdata));

	/* Register NAND Flash */
	imx31_add_mxc_nand(&armadillo5x0_nand_board_info);

	/* set NAND page size to 2k if not configured via boot mode pins */
	__raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);

	/* RTC */
	/* Get RTC IRQ and register the chip */
	if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
		if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
			armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
		else
			gpio_free(ARMADILLO5X0_RTC_GPIO);
	}
	if (armadillo5x0_i2c_rtc.irq == 0)
		pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
	i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);

	/* USB */

	usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
			ULPI_OTG_DRVVBUS_EXT);
	if (usbotg_pdata.otg)
		imx31_add_mxc_ehci_otg(&usbotg_pdata);
	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
			ULPI_OTG_DRVVBUS_EXT);
	if (usbh2_pdata.otg)
		imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
}

static void __init armadillo5x0_timer_init(void)
{
	mx31_clocks_init(26000000);
}

static struct sys_timer armadillo5x0_timer = {
	.init	= armadillo5x0_timer_init,
};

MACHINE_START(ARMADILLO5X0, "Armadillo-500")
	/* Maintainer: Alberto Panizzo  */
	.atag_offset = 0x100,
	.map_io = mx31_map_io,
	.init_early = imx31_init_early,
	.init_irq = mx31_init_irq,
	.handle_irq = imx31_handle_irq,
	.timer = &armadillo5x0_timer,
	.init_machine = armadillo5x0_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
5e9145ed AP	1	/*
	2	* armadillo5x0.c
	3	*
	4	* Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
	5	* updates in http://alberdroid.blogspot.com/
	6	*
	7	* Based on Atmark Techno, Inc. armadillo 500 BSP 2008
	8	* Based on mx31ads.c and pcm037.c Great Work!
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	23	* MA 02110-1301, USA.
	24	*/
	25
	26	#include <linux/types.h>
	27	#include <linux/init.h>
	28	#include <linux/clk.h>
	29	#include <linux/platform_device.h>
	30	#include <linux/gpio.h>
	31	#include <linux/smsc911x.h>
	32	#include <linux/interrupt.h>
	33	#include <linux/irq.h>
c3a9c7f5	34	#include <linux/mtd/physmap.h>
0c8bad6a	35	#include <linux/io.h>
e33c049c	36	#include <linux/input.h>
2097abcb	37	#include <linux/i2c.h>
b3aa111f AP	38	#include <linux/usb/otg.h>
	39	#include <linux/usb/ulpi.h>
	40	#include <linux/delay.h>
5e9145ed AP	41
	42	#include <mach/hardware.h>
	43	#include <asm/mach-types.h>
	44	#include <asm/mach/arch.h>
	45	#include <asm/mach/time.h>
	46	#include <asm/memory.h>
	47	#include <asm/mach/map.h>
	48
	49	#include <mach/common.h>
5e9145ed	50	#include <mach/iomux-mx3.h>
b3aa111f	51	#include <mach/ulpi.h>
5e9145ed	52
a2ceeef5	53	#include "devices-imx31.h"
27ad4bf7	54	#include "crmregs-imx31.h"
5e9145ed AP	55
	56	static int armadillo5x0_pins[] = {
	57	/* UART1 */
	58	MX31_PIN_CTS1__CTS1,
	59	MX31_PIN_RTS1__RTS1,
	60	MX31_PIN_TXD1__TXD1,
	61	MX31_PIN_RXD1__RXD1,
	62	/* UART2 */
	63	MX31_PIN_CTS2__CTS2,
	64	MX31_PIN_RTS2__RTS2,
	65	MX31_PIN_TXD2__TXD2,
	66	MX31_PIN_RXD2__RXD2,
	67	/* LAN9118_IRQ */
	68	IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
	69	/* SDHC1 */
	70	MX31_PIN_SD1_DATA3__SD1_DATA3,
	71	MX31_PIN_SD1_DATA2__SD1_DATA2,
	72	MX31_PIN_SD1_DATA1__SD1_DATA1,
	73	MX31_PIN_SD1_DATA0__SD1_DATA0,
	74	MX31_PIN_SD1_CLK__SD1_CLK,
	75	MX31_PIN_SD1_CMD__SD1_CMD,
	76	/* Framebuffer */
	77	MX31_PIN_LD0__LD0,
	78	MX31_PIN_LD1__LD1,
	79	MX31_PIN_LD2__LD2,
	80	MX31_PIN_LD3__LD3,
	81	MX31_PIN_LD4__LD4,
	82	MX31_PIN_LD5__LD5,
	83	MX31_PIN_LD6__LD6,
	84	MX31_PIN_LD7__LD7,
	85	MX31_PIN_LD8__LD8,
	86	MX31_PIN_LD9__LD9,
	87	MX31_PIN_LD10__LD10,
	88	MX31_PIN_LD11__LD11,
	89	MX31_PIN_LD12__LD12,
	90	MX31_PIN_LD13__LD13,
	91	MX31_PIN_LD14__LD14,
	92	MX31_PIN_LD15__LD15,
	93	MX31_PIN_LD16__LD16,
	94	MX31_PIN_LD17__LD17,
	95	MX31_PIN_VSYNC3__VSYNC3,
	96	MX31_PIN_HSYNC__HSYNC,
	97	MX31_PIN_FPSHIFT__FPSHIFT,
	98	MX31_PIN_DRDY0__DRDY0,
	99	IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /ADV7125_PSAVE/
e9a6c5d0 AP	100	/* I2C2 */
	101	MX31_PIN_CSPI2_MOSI__SCL,
	102	MX31_PIN_CSPI2_MISO__SDA,
b3aa111f AP	103	/* OTG */
	104	MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
	105	MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
	106	MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
	107	MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
	108	MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
	109	MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
	110	MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
	111	MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
	112	MX31_PIN_USBOTG_CLK__USBOTG_CLK,
	113	MX31_PIN_USBOTG_DIR__USBOTG_DIR,
	114	MX31_PIN_USBOTG_NXT__USBOTG_NXT,
	115	MX31_PIN_USBOTG_STP__USBOTG_STP,
	116	/* USB host 2 */
	117	IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
	118	IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
	119	IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
	120	IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
	121	IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
	122	IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
	123	IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
	124	IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
	125	IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
	126	IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
	127	IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
	128	IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
0c8bad6a	129	};
e9a6c5d0	130
b3aa111f	131	/* USB */
b3aa111f AP	132
	133	#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
	134	#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
	135	#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
	136
	137	#define USB_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
	138	PAD_CTL_ODE_CMOS \| PAD_CTL_100K_PU)
	139
	140	static int usbotg_init(struct platform_device *pdev)
	141	{
	142	int err;
	143
	144	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
	145	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
	146	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
	147	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
	148	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
	149	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
	150	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
	151	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
	152	mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
	153	mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
	154	mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
	155	mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
	156
	157	/* Chip already enabled by hardware */
	158	/* OTG phy reset*/
	159	err = gpio_request(OTG_RESET, "USB-OTG-RESET");
	160	if (err) {
	161	pr_err("Failed to request the usb otg reset gpio\n");
	162	return err;
	163	}
	164
	165	err = gpio_direction_output(OTG_RESET, 1/HIGH/);
	166	if (err) {
	167	pr_err("Failed to reset the usb otg phy\n");
	168	goto otg_free_reset;
	169	}
	170
	171	gpio_set_value(OTG_RESET, 0/LOW/);
	172	mdelay(5);
	173	gpio_set_value(OTG_RESET, 1/HIGH/);
4bd597b6	174	mdelay(10);
b3aa111f	175
4bd597b6 SH	176	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED \|
4bd597b6 SH	177	MXC_EHCI_INTERFACE_DIFF_UNI);
b3aa111f AP	178
	179	otg_free_reset:
	180	gpio_free(OTG_RESET);
	181	return err;
	182	}
	183
	184	static int usbh2_init(struct platform_device *pdev)
	185	{
	186	int err;
	187
	188	mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
	189	mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
	190	mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
	191	mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
	192	mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
	193	mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
	194	mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
	195	mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
	196	mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
	197	mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
	198	mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
	199	mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
	200
	201	mxc_iomux_set_gpr(MUX_PGP_UH2, true);
	202
	203
	204	/* Enable the chip */
	205	err = gpio_request(USBH2_CS, "USB-H2-CS");
	206	if (err) {
	207	pr_err("Failed to request the usb host 2 CS gpio\n");
	208	return err;
	209	}
	210
	211	err = gpio_direction_output(USBH2_CS, 0/Enabled/);
	212	if (err) {
	213	pr_err("Failed to drive the usb host 2 CS gpio\n");
	214	goto h2_free_cs;
	215	}
	216
	217	/* H2 phy reset*/
	218	err = gpio_request(USBH2_RESET, "USB-H2-RESET");
	219	if (err) {
	220	pr_err("Failed to request the usb host 2 reset gpio\n");
	221	goto h2_free_cs;
	222	}
	223
	224	err = gpio_direction_output(USBH2_RESET, 1/HIGH/);
	225	if (err) {
	226	pr_err("Failed to reset the usb host 2 phy\n");
	227	goto h2_free_reset;
	228	}
	229
	230	gpio_set_value(USBH2_RESET, 0/LOW/);
	231	mdelay(5);
	232	gpio_set_value(USBH2_RESET, 1/HIGH/);
4bd597b6	233	mdelay(10);
b3aa111f	234
4bd597b6 SH	235	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED \|
4bd597b6 SH	236	MXC_EHCI_INTERFACE_DIFF_UNI);
b3aa111f AP	237
	238	h2_free_reset:
	239	gpio_free(USBH2_RESET);
	240	h2_free_cs:
	241	gpio_free(USBH2_CS);
	242	return err;
	243	}
	244
2d58de28	245	static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
b3aa111f AP	246	.init = usbotg_init,
b3aa111f AP	247	.portsc = MXC_EHCI_MODE_ULPI \| MXC_EHCI_UTMI_8BIT,
b3aa111f AP	248	};
b3aa111f AP	249
2d58de28	250	static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
b3aa111f AP	251	.init = usbh2_init,
b3aa111f AP	252	.portsc = MXC_EHCI_MODE_ULPI \| MXC_EHCI_UTMI_8BIT,
b3aa111f	253	};
b3aa111f	254
2097abcb AP	255	/* RTC over I2C*/
	256	#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
	257
	258	static struct i2c_board_info armadillo5x0_i2c_rtc = {
	259	I2C_BOARD_INFO("s35390a", 0x30),
	260	};
	261
e33c049c AP	262	/* GPIO BUTTONS */
	263	static struct gpio_keys_button armadillo5x0_buttons[] = {
	264	{
	265	.code = KEY_ENTER, /28/
	266	.gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
	267	.active_low = 1,
	268	.desc = "menu",
	269	.wakeup = 1,
	270	}, {
	271	.code = KEY_BACK, /158/
	272	.gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
	273	.active_low = 1,
	274	.desc = "back",
	275	.wakeup = 1,
	276	}
	277	};
	278
5309498a UKK	279	static const struct gpio_keys_platform_data
5309498a UKK	280	armadillo5x0_button_data __initconst = {
e33c049c AP	281	.buttons = armadillo5x0_buttons,
	282	.nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
	283	};
	284
0c8bad6a AP	285	/*
	286	* NAND Flash
	287	*/
a2ceeef5 UKK	288	static const struct mxc_nand_platform_data
a2ceeef5 UKK	289	armadillo5x0_nand_board_info __initconst = {
0c8bad6a AP	290	.width = 1,
0c8bad6a AP	291	.hw_ecc = 1,
5e9145ed AP	292	};
5e9145ed AP	293
c3a9c7f5 AP	294	/*
	295	* MTD NOR Flash
	296	*/
	297	static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
	298	{
	299	.name = "nor.bootloader",
	300	.offset = 0x00000000,
	301	.size = 4321024,
	302	}, {
	303	.name = "nor.kernel",
	304	.offset = MTDPART_OFS_APPEND,
	305	.size = 161281024,
	306	}, {
	307	.name = "nor.userland",
	308	.offset = MTDPART_OFS_APPEND,
	309	.size = 1101281024,
	310	}, {
	311	.name = "nor.config",
	312	.offset = MTDPART_OFS_APPEND,
	313	.size = 11281024,
	314	},
	315	};
	316
47ccfc34 UKK	317	static const struct physmap_flash_data
47ccfc34 UKK	318	armadillo5x0_nor_flash_pdata __initconst = {
c3a9c7f5 AP	319	.width = 2,
	320	.parts = armadillo5x0_nor_flash_partitions,
	321	.nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
	322	};
	323
47ccfc34	324	static const struct resource armadillo5x0_nor_flash_resource __initconst = {
c3a9c7f5	325	.flags = IORESOURCE_MEM,
f568dd7f UKK	326	.start = MX31_CS0_BASE_ADDR,
f568dd7f UKK	327	.end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
c3a9c7f5 AP	328	};
c3a9c7f5 AP	329
5e9145ed AP	330	/*
	331	* FB support
	332	*/
	333	static const struct fb_videomode fb_modedb[] = {
	334	{ /* 640x480 @ 60 Hz */
	335	.name = "CRT-VGA",
	336	.refresh = 60,
	337	.xres = 640,
	338	.yres = 480,
	339	.pixclock = 39721,
	340	.left_margin = 35,
	341	.right_margin = 115,
	342	.upper_margin = 43,
	343	.lower_margin = 1,
	344	.hsync_len = 10,
	345	.vsync_len = 1,
	346	.sync = FB_SYNC_OE_ACT_HIGH,
	347	.vmode = FB_VMODE_NONINTERLACED,
	348	.flag = 0,
	349	}, {/* 800x600 @ 56 Hz */
	350	.name = "CRT-SVGA",
	351	.refresh = 56,
	352	.xres = 800,
	353	.yres = 600,
	354	.pixclock = 30000,
	355	.left_margin = 30,
	356	.right_margin = 108,
	357	.upper_margin = 13,
	358	.lower_margin = 10,
	359	.hsync_len = 10,
	360	.vsync_len = 1,
	361	.sync = FB_SYNC_OE_ACT_HIGH \| FB_SYNC_HOR_HIGH_ACT \|
	362	FB_SYNC_VERT_HIGH_ACT,
	363	.vmode = FB_VMODE_NONINTERLACED,
	364	.flag = 0,
	365	},
	366	};
	367
afa77ef3	368	static const struct ipu_platform_data mx3_ipu_data __initconst = {
5e9145ed AP	369	.irq_base = MXC_IPU_IRQ_START,
	370	};
	371
afa77ef3	372	static struct mx3fb_platform_data mx3fb_pdata __initdata = {
5e9145ed AP	373	.name = "CRT-VGA",
	374	.mode = fb_modedb,
	375	.num_modes = ARRAY_SIZE(fb_modedb),
	376	};
	377
	378	/*
	379	* SDHC 1
	380	* MMC support
	381	*/
	382	static int armadillo5x0_sdhc1_get_ro(struct device *dev)
	383	{
	384	return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
	385	}
	386
	387	static int armadillo5x0_sdhc1_init(struct device *dev,
	388	irq_handler_t detect_irq, void *data)
	389	{
	390	int ret;
	391	int gpio_det, gpio_wp;
	392
	393	gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
	394	gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
	395
	396	ret = gpio_request(gpio_det, "sdhc-card-detect");
	397	if (ret)
	398	return ret;
	399
	400	gpio_direction_input(gpio_det);
	401
	402	ret = gpio_request(gpio_wp, "sdhc-write-protect");
	403	if (ret)
	404	goto err_gpio_free;
	405
	406	gpio_direction_input(gpio_wp);
	407
	408	/* When supported the trigger type have to be BOTH */
	409	ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
	410	IRQF_DISABLED \| IRQF_TRIGGER_FALLING,
	411	"sdhc-detect", data);
	412
	413	if (ret)
	414	goto err_gpio_free_2;
	415
	416	return 0;
	417
	418	err_gpio_free_2:
	419	gpio_free(gpio_wp);
	420
	421	err_gpio_free:
	422	gpio_free(gpio_det);
	423
	424	return ret;
	425
	426	}
	427
	428	static void armadillo5x0_sdhc1_exit(struct device dev, void data)
	429	{
	430	free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
	431	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
	432	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
	433	}
	434
6a697e3d	435	static const struct imxmmc_platform_data sdhc_pdata __initconst = {
5e9145ed AP	436	.get_ro = armadillo5x0_sdhc1_get_ro,
	437	.init = armadillo5x0_sdhc1_init,
	438	.exit = armadillo5x0_sdhc1_exit,
	439	};
	440
	441	/*
	442	* SMSC 9118
	443	* Network support
	444	*/
	445	static struct resource armadillo5x0_smc911x_resources[] = {
	446	{
f568dd7f UKK	447	.start = MX31_CS3_BASE_ADDR,
f568dd7f UKK	448	.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
5e9145ed AP	449	.flags = IORESOURCE_MEM,
	450	}, {
	451	.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
	452	.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
	453	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
	454	},
	455	};
	456
	457	static struct smsc911x_platform_config smsc911x_info = {
07299ca3	458	.flags = SMSC911X_USE_16BIT,
5e9145ed AP	459	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	460	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
	461	};
	462
	463	static struct platform_device armadillo5x0_smc911x_device = {
	464	.name = "smsc911x",
	465	.id = -1,
	466	.num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
	467	.resource = armadillo5x0_smc911x_resources,
	468	.dev = {
	469	.platform_data = &smsc911x_info,
	470	},
	471	};
	472
	473	/* UART device data */
16cf5c41	474	static const struct imxuart_platform_data uart_pdata __initconst = {
5e9145ed AP	475	.flags = IMXUART_HAVE_RTSCTS,
	476	};
	477
	478	static struct platform_device *devices[] __initdata = {
	479	&armadillo5x0_smc911x_device,
	480	};
	481
	482	/*
	483	* Perform board specific initializations
	484	*/
	485	static void __init armadillo5x0_init(void)
	486	{
b78d8e59 SG	487	imx31_soc_init();
b78d8e59 SG	488
5e9145ed AP	489	mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
	490	ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
	491
	492	platform_add_devices(devices, ARRAY_SIZE(devices));
5309498a	493	imx_add_gpio_keys(&armadillo5x0_button_data);
4a9b8b0b	494	imx31_add_imx_i2c1(NULL);
5e9145ed AP	495
5e9145ed AP	496	/* Register UART */
16cf5c41 UKK	497	imx31_add_imx_uart0(&uart_pdata);
16cf5c41 UKK	498	imx31_add_imx_uart1(&uart_pdata);
5e9145ed AP	499
	500	/* SMSC9118 IRQ pin */
	501	gpio_direction_input(MX31_PIN_GPIO1_0);
	502
	503	/* Register SDHC */
6a697e3d	504	imx31_add_mxc_mmc(0, &sdhc_pdata);
5e9145ed AP	505
5e9145ed AP	506	/* Register FB */
afa77ef3 UKK	507	imx31_add_ipu_core(&mx3_ipu_data);
afa77ef3 UKK	508	imx31_add_mx3_sdc_fb(&mx3fb_pdata);
c3a9c7f5 AP	509
c3a9c7f5 AP	510	/* Register NOR Flash */
47ccfc34 UKK	511	platform_device_register_resndata(NULL, "physmap-flash", -1,
	512	&armadillo5x0_nor_flash_resource, 1,
	513	&armadillo5x0_nor_flash_pdata,
	514	sizeof(armadillo5x0_nor_flash_pdata));
0c8bad6a AP	515
0c8bad6a AP	516	/* Register NAND Flash */
a2ceeef5	517	imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
0c8bad6a AP	518
	519	/* set NAND page size to 2k if not configured via boot mode pins */
	520	__raw_writel(__raw_readl(MXC_CCM_RCSR) \| (1 << 30), MXC_CCM_RCSR);
2097abcb AP	521
	522	/* RTC */
	523	/* Get RTC IRQ and register the chip */
	524	if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
	525	if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
	526	armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
	527	else
	528	gpio_free(ARMADILLO5X0_RTC_GPIO);
	529	}
	530	if (armadillo5x0_i2c_rtc.irq == 0)
	531	pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
	532	i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
b3aa111f AP	533
b3aa111f AP	534	/* USB */
48f6b099 SH	535
	536	usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
	537	ULPI_OTG_DRVVBUS_EXT);
	538	if (usbotg_pdata.otg)
	539	imx31_add_mxc_ehci_otg(&usbotg_pdata);
	540	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
	541	ULPI_OTG_DRVVBUS_EXT);
	542	if (usbh2_pdata.otg)
	543	imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
5e9145ed AP	544	}
5e9145ed AP	545
5e9145ed AP	546	static void __init armadillo5x0_timer_init(void)
	547	{
	548	mx31_clocks_init(26000000);
	549	}
	550
	551	static struct sys_timer armadillo5x0_timer = {
	552	.init = armadillo5x0_timer_init,
	553	};
	554
	555	MACHINE_START(ARMADILLO5X0, "Armadillo-500")
	556	/* Maintainer: Alberto Panizzo */
dc8f1907	557	.atag_offset = 0x100,
97976e22 UKK	558	.map_io = mx31_map_io,
	559	.init_early = imx31_init_early,
	560	.init_irq = mx31_init_irq,
ffa2ea3f	561	.handle_irq = imx31_handle_irq,
97976e22 UKK	562	.timer = &armadillo5x0_timer,
97976e22 UKK	563	.init_machine = armadillo5x0_init,
65ea7884	564	.restart = mxc_restart,
5e9145ed	565	MACHINE_END