[deliverable/linux.git] / arch / arm / mach-imx / mach-cpuimx27.c

/*
 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
 *
 * Based on pcm038.c which is :
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>

#include "common.h"
#include "devices-imx27.h"
#include "eukrea-baseboards.h"
#include "hardware.h"
#include "iomux-mx27.h"
#include "ulpi.h"

static const int eukrea_cpuimx27_pins[] __initconst = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART4 */
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
	PB26_AF_UART4_RTS,
	PB28_AF_UART4_TXD,
	PB29_AF_UART4_CTS,
	PB31_AF_UART4_RXD,
#endif
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C1 */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	/* SDHC2 */
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	PB4_PF_SD2_D0,
	PB5_PF_SD2_D1,
	PB6_PF_SD2_D2,
	PB7_PF_SD2_D3,
	PB8_PF_SD2_CMD,
	PB9_PF_SD2_CLK,
#endif
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	/* Quad UART's IRQ */
	GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
#endif
	/* OTG */
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PC9_PF_USBOTG_DATA0,
	PC10_PF_USBOTG_DATA2,
	PC11_PF_USBOTG_DATA1,
	PC12_PF_USBOTG_DATA4,
	PC13_PF_USBOTG_DATA3,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PE2_PF_USBOTG_DIR,
	PE24_PF_USBOTG_CLK,
	PE25_PF_USBOTG_DATA7,
	/* USBH2 */
	PA0_PF_USBH2_CLK,
	PA1_PF_USBH2_DIR,
	PA2_PF_USBH2_DATA7,
	PA3_PF_USBH2_NXT,
	PA4_PF_USBH2_STP,
	PD19_AF_USBH2_DATA4,
	PD20_AF_USBH2_DATA3,
	PD21_AF_USBH2_DATA6,
	PD22_AF_USBH2_DATA0,
	PD23_AF_USBH2_DATA2,
	PD24_AF_USBH2_DATA1,
	PD26_AF_USBH2_DATA5,
};

static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
	.width = 2,
};

static struct resource eukrea_cpuimx27_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc3ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &eukrea_cpuimx27_flash_data,
	},
	.num_resources = 1,
	.resource = &eukrea_cpuimx27_flash_resource,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static const struct mxc_nand_platform_data
cpuimx27_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&eukrea_cpuimx27_nor_mtd_device,
};

static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
	.bitrate = 100000,
};

static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pcf8563", 0x51),
	},
};

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
static struct plat_serial8250_port serial_platform_data[] = {
	{
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
		/* irq number is run-time assigned */
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
		/* irq number is run-time assigned */
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
		/* irq number is run-time assigned */
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
		/* irq number is run-time assigned */
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
	}
};

static struct platform_device serial_device = {
	.name = "serial8250",
	.id = 0,
	.dev = {
		.platform_data = serial_platform_data,
	},
};
#endif

static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}

static struct mxc_usbh_platform_data otg_pdata __initdata = {
	.init	= eukrea_cpuimx27_otg_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
};

static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}

static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
	.init	= eukrea_cpuimx27_usbh2_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
};

static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
	.operating_mode = FSL_USB2_DR_DEVICE,
	.phy_mode       = FSL_USB2_PHY_ULPI,
};

static bool otg_mode_host __initdata;

static int __init eukrea_cpuimx27_otg_mode(char *options)
{
	if (!strcmp(options, "host"))
		otg_mode_host = true;
	else if (!strcmp(options, "device"))
		otg_mode_host = false;
	else
		pr_info("otg_mode neither \"host\" nor \"device\". "
			"Defaulting to device\n");
	return 1;
}
__setup("otg_mode=", eukrea_cpuimx27_otg_mode);

static void __init eukrea_cpuimx27_init(void)
{
	imx27_soc_init();

	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
		ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");

	imx27_add_imx_uart0(&uart_pdata);

	imx27_add_mxc_nand(&cpuimx27_nand_board_info);

	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
				ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));

	imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);

	imx27_add_fec(NULL);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	imx27_add_imx2_wdt();
	imx27_add_mxc_w1();

#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	/* SDHC2 can be used for Wifi */
	imx27_add_mxc_mmc(1, NULL);
#endif
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
	/* in which case UART4 is also used for Bluetooth */
	imx27_add_imx_uart3(&uart_pdata);
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	serial_platform_data[0].irq = IMX_GPIO_NR(2, 23);
	serial_platform_data[1].irq = IMX_GPIO_NR(2, 22);
	serial_platform_data[2].irq = IMX_GPIO_NR(2, 27);
	serial_platform_data[3].irq = IMX_GPIO_NR(2, 30);
	platform_device_register(&serial_device);
#endif

	if (otg_mode_host) {
		otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
				ULPI_OTG_DRVVBUS_EXT);
		if (otg_pdata.otg)
			imx27_add_mxc_ehci_otg(&otg_pdata);
	} else {
		imx27_add_fsl_usb2_udc(&otg_device_pdata);
	}

	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
			ULPI_OTG_DRVVBUS_EXT);
	if (usbh2_pdata.otg)
		imx27_add_mxc_ehci_hs(2, &usbh2_pdata);

#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
	eukrea_mbimx27_baseboard_init();
#endif
}

static void __init eukrea_cpuimx27_timer_init(void)
{
	mx27_clocks_init(26000000);
}

MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
	.atag_offset = 0x100,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.handle_irq = imx27_handle_irq,
	.init_time	= eukrea_cpuimx27_timer_init,
	.init_machine = eukrea_cpuimx27_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
af5b1df7 EB	1	/*
	2	* Copyright (C) 2009 Eric Benard - eric@eukrea.com
	3	*
	4	* Based on pcm038.c which is :
	5	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	6	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; either version 2
	11	* of the License, or (at your option) any later version.
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	20	* MA 02110-1301, USA.
	21	*/
	22
	23	#include <linux/i2c.h>
	24	#include <linux/io.h>
	25	#include <linux/mtd/plat-ram.h>
	26	#include <linux/mtd/physmap.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/serial_8250.h>
9f2270da EB	29	#include <linux/usb/otg.h>
9f2270da EB	30	#include <linux/usb/ulpi.h>
af5b1df7 EB	31
	32	#include <asm/mach-types.h>
	33	#include <asm/mach/arch.h>
	34	#include <asm/mach/time.h>
	35	#include <asm/mach/map.h>
	36
e3372474	37	#include "common.h"
0e7a29a8	38	#include "devices-imx27.h"
3ed0bcb4	39	#include "eukrea-baseboards.h"
50f2de61	40	#include "hardware.h"
267dd34c	41	#include "iomux-mx27.h"
39ef6340	42	#include "ulpi.h"
af5b1df7	43
6c80ee51	44	static const int eukrea_cpuimx27_pins[] __initconst = {
af5b1df7 EB	45	/* UART1 */
	46	PE12_PF_UART1_TXD,
	47	PE13_PF_UART1_RXD,
	48	PE14_PF_UART1_CTS,
	49	PE15_PF_UART1_RTS,
	50	/* UART4 */
4f5ef62c	51	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
af5b1df7 EB	52	PB26_AF_UART4_RTS,
	53	PB28_AF_UART4_TXD,
	54	PB29_AF_UART4_CTS,
	55	PB31_AF_UART4_RXD,
2d66c780	56	#endif
af5b1df7 EB	57	/* FEC */
	58	PD0_AIN_FEC_TXD0,
	59	PD1_AIN_FEC_TXD1,
	60	PD2_AIN_FEC_TXD2,
	61	PD3_AIN_FEC_TXD3,
	62	PD4_AOUT_FEC_RX_ER,
	63	PD5_AOUT_FEC_RXD1,
	64	PD6_AOUT_FEC_RXD2,
	65	PD7_AOUT_FEC_RXD3,
	66	PD8_AF_FEC_MDIO,
	67	PD9_AIN_FEC_MDC,
	68	PD10_AOUT_FEC_CRS,
	69	PD11_AOUT_FEC_TX_CLK,
	70	PD12_AOUT_FEC_RXD0,
	71	PD13_AOUT_FEC_RX_DV,
	72	PD14_AOUT_FEC_RX_CLK,
	73	PD15_AOUT_FEC_COL,
	74	PD16_AIN_FEC_TX_ER,
	75	PF23_AIN_FEC_TX_EN,
	76	/* I2C1 */
	77	PD17_PF_I2C_DATA,
	78	PD18_PF_I2C_CLK,
	79	/* SDHC2 */
2d66c780	80	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
af5b1df7 EB	81	PB4_PF_SD2_D0,
	82	PB5_PF_SD2_D1,
	83	PB6_PF_SD2_D2,
	84	PB7_PF_SD2_D3,
	85	PB8_PF_SD2_CMD,
	86	PB9_PF_SD2_CLK,
2d66c780	87	#endif
af5b1df7 EB	88	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
af5b1df7 EB	89	/* Quad UART's IRQ */
ebb4fc82 EB	90	GPIO_PORTB \| 22 \| GPIO_GPIO \| GPIO_IN,
	91	GPIO_PORTB \| 23 \| GPIO_GPIO \| GPIO_IN,
	92	GPIO_PORTB \| 27 \| GPIO_GPIO \| GPIO_IN,
	93	GPIO_PORTB \| 30 \| GPIO_GPIO \| GPIO_IN,
af5b1df7	94	#endif
9f2270da EB	95	/* OTG */
	96	PC7_PF_USBOTG_DATA5,
	97	PC8_PF_USBOTG_DATA6,
	98	PC9_PF_USBOTG_DATA0,
	99	PC10_PF_USBOTG_DATA2,
	100	PC11_PF_USBOTG_DATA1,
	101	PC12_PF_USBOTG_DATA4,
	102	PC13_PF_USBOTG_DATA3,
	103	PE0_PF_USBOTG_NXT,
	104	PE1_PF_USBOTG_STP,
	105	PE2_PF_USBOTG_DIR,
	106	PE24_PF_USBOTG_CLK,
	107	PE25_PF_USBOTG_DATA7,
	108	/* USBH2 */
	109	PA0_PF_USBH2_CLK,
	110	PA1_PF_USBH2_DIR,
	111	PA2_PF_USBH2_DATA7,
	112	PA3_PF_USBH2_NXT,
	113	PA4_PF_USBH2_STP,
	114	PD19_AF_USBH2_DATA4,
	115	PD20_AF_USBH2_DATA3,
	116	PD21_AF_USBH2_DATA6,
	117	PD22_AF_USBH2_DATA0,
	118	PD23_AF_USBH2_DATA2,
	119	PD24_AF_USBH2_DATA1,
	120	PD26_AF_USBH2_DATA5,
af5b1df7 EB	121	};
	122
	123	static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
	124	.width = 2,
	125	};
	126
	127	static struct resource eukrea_cpuimx27_flash_resource = {
	128	.start = 0xc0000000,
	129	.end = 0xc3ffffff,
	130	.flags = IORESOURCE_MEM,
	131	};
	132
	133	static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
	134	.name = "physmap-flash",
	135	.id = 0,
	136	.dev = {
	137	.platform_data = &eukrea_cpuimx27_flash_data,
	138	},
	139	.num_resources = 1,
	140	.resource = &eukrea_cpuimx27_flash_resource,
	141	};
	142
d5dac4a6 UKK	143	static const struct imxuart_platform_data uart_pdata __initconst = {
d5dac4a6 UKK	144	.flags = IMXUART_HAVE_RTSCTS,
af5b1df7 EB	145	};
af5b1df7 EB	146
0e7a29a8 UKK	147	static const struct mxc_nand_platform_data
0e7a29a8 UKK	148	cpuimx27_nand_board_info __initconst = {
af5b1df7 EB	149	.width = 1,
	150	.hw_ecc = 1,
	151	};
	152
	153	static struct platform_device *platform_devices[] __initdata = {
	154	&eukrea_cpuimx27_nor_mtd_device,
af5b1df7 EB	155	};
af5b1df7 EB	156
c6987159	157	static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
af5b1df7 EB	158	.bitrate = 100000,
	159	};
	160
	161	static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
	162	{
cf87a6e2	163	I2C_BOARD_INFO("pcf8563", 0x51),
af5b1df7 EB	164	},
	165	};
	166
	167	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	168	static struct plat_serial8250_port serial_platform_data[] = {
	169	{
3f35d1f5	170	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
438196c3	171	/* irq number is run-time assigned */
af5b1df7 EB	172	.uartclk = 14745600,
	173	.regshift = 1,
	174	.iotype = UPIO_MEM,
	175	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	176	}, {
3f35d1f5	177	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
438196c3	178	/* irq number is run-time assigned */
af5b1df7 EB	179	.uartclk = 14745600,
	180	.regshift = 1,
	181	.iotype = UPIO_MEM,
	182	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	183	}, {
3f35d1f5	184	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
438196c3	185	/* irq number is run-time assigned */
af5b1df7 EB	186	.uartclk = 14745600,
	187	.regshift = 1,
	188	.iotype = UPIO_MEM,
	189	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	190	}, {
3f35d1f5	191	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
438196c3	192	/* irq number is run-time assigned */
af5b1df7 EB	193	.uartclk = 14745600,
	194	.regshift = 1,
	195	.iotype = UPIO_MEM,
	196	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	197	}, {
	198	}
	199	};
	200
	201	static struct platform_device serial_device = {
	202	.name = "serial8250",
	203	.id = 0,
	204	.dev = {
	205	.platform_data = serial_platform_data,
	206	},
	207	};
	208	#endif
	209
4bd597b6 SH	210	static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
	211	{
	212	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
	213	}
	214
2eb42d5c	215	static struct mxc_usbh_platform_data otg_pdata __initdata = {
4bd597b6	216	.init = eukrea_cpuimx27_otg_init,
9f2270da	217	.portsc = MXC_EHCI_MODE_ULPI,
9f2270da EB	218	};
9f2270da EB	219
4bd597b6 SH	220	static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
	221	{
	222	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
	223	}
	224
2eb42d5c	225	static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
4bd597b6	226	.init = eukrea_cpuimx27_usbh2_init,
9f2270da	227	.portsc = MXC_EHCI_MODE_ULPI,
9f2270da EB	228	};
9f2270da EB	229
bd455ed3	230	static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
9f2270da EB	231	.operating_mode = FSL_USB2_DR_DEVICE,
	232	.phy_mode = FSL_USB2_PHY_ULPI,
	233	};
	234
33a264dd	235	static bool otg_mode_host __initdata;
9f2270da EB	236
	237	static int __init eukrea_cpuimx27_otg_mode(char *options)
	238	{
	239	if (!strcmp(options, "host"))
33a264dd	240	otg_mode_host = true;
9f2270da	241	else if (!strcmp(options, "device"))
33a264dd	242	otg_mode_host = false;
9f2270da EB	243	else
	244	pr_info("otg_mode neither \"host\" nor \"device\". "
	245	"Defaulting to device\n");
33a264dd	246	return 1;
9f2270da EB	247	}
	248	__setup("otg_mode=", eukrea_cpuimx27_otg_mode);
	249
af5b1df7 EB	250	static void __init eukrea_cpuimx27_init(void)
af5b1df7 EB	251	{
b78d8e59 SG	252	imx27_soc_init();
b78d8e59 SG	253
af5b1df7 EB	254	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
	255	ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
	256
d5dac4a6	257	imx27_add_imx_uart0(&uart_pdata);
af5b1df7	258
0e7a29a8	259	imx27_add_mxc_nand(&cpuimx27_nand_board_info);
af5b1df7 EB	260
	261	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
	262	ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
	263
f779b7dd	264	imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
af5b1df7	265
6bd96f3c	266	imx27_add_fec(NULL);
af5b1df7	267	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
bec31a85 BT	268	imx27_add_imx2_wdt();
bec31a85 BT	269	imx27_add_mxc_w1();
af5b1df7 EB	270
	271	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	272	/* SDHC2 can be used for Wifi */
9d3d945a	273	imx27_add_mxc_mmc(1, NULL);
2d66c780	274	#endif
4f5ef62c	275	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
af5b1df7	276	/* in which case UART4 is also used for Bluetooth */
d5dac4a6	277	imx27_add_imx_uart3(&uart_pdata);
af5b1df7 EB	278	#endif
	279
	280	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
438196c3 SG	281	serial_platform_data[0].irq = IMX_GPIO_NR(2, 23);
	282	serial_platform_data[1].irq = IMX_GPIO_NR(2, 22);
	283	serial_platform_data[2].irq = IMX_GPIO_NR(2, 27);
	284	serial_platform_data[3].irq = IMX_GPIO_NR(2, 30);
af5b1df7 EB	285	platform_device_register(&serial_device);
	286	#endif
	287
9f2270da	288	if (otg_mode_host) {
48f6b099 SH	289	otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
	290	ULPI_OTG_DRVVBUS_EXT);
	291	if (otg_pdata.otg)
	292	imx27_add_mxc_ehci_otg(&otg_pdata);
	293	} else {
	294	imx27_add_fsl_usb2_udc(&otg_device_pdata);
9f2270da EB	295	}
9f2270da EB	296
48f6b099 SH	297	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
	298	ULPI_OTG_DRVVBUS_EXT);
	299	if (usbh2_pdata.otg)
	300	imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
9f2270da	301
af5b1df7 EB	302	#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
	303	eukrea_mbimx27_baseboard_init();
	304	#endif
	305	}
	306
	307	static void __init eukrea_cpuimx27_timer_init(void)
	308	{
	309	mx27_clocks_init(26000000);
	310	}
	311
0d6cfa3a	312	MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
dc8f1907	313	.atag_offset = 0x100,
3dac2196 UKK	314	.map_io = mx27_map_io,
	315	.init_early = imx27_init_early,
	316	.init_irq = mx27_init_irq,
ffa2ea3f	317	.handle_irq = imx27_handle_irq,
6bb27d73	318	.init_time = eukrea_cpuimx27_timer_init,
3dac2196	319	.init_machine = eukrea_cpuimx27_init,
65ea7884	320	.restart = mxc_restart,
af5b1df7	321	MACHINE_END