[deliverable/linux.git] / arch / arm / mach-imx / mach-cpuimx27.c

/*
 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
 *
 * Based on pcm038.c which is :
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>

#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx27.h>
#include <mach/ulpi.h>

#include "devices-imx27.h"
#include "eukrea-baseboards.h"

static const int eukrea_cpuimx27_pins[] __initconst = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART4 */
#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
	PB26_AF_UART4_RTS,
	PB28_AF_UART4_TXD,
	PB29_AF_UART4_CTS,
	PB31_AF_UART4_RXD,
#endif
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C1 */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	/* SDHC2 */
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	PB4_PF_SD2_D0,
	PB5_PF_SD2_D1,
	PB6_PF_SD2_D2,
	PB7_PF_SD2_D3,
	PB8_PF_SD2_CMD,
	PB9_PF_SD2_CLK,
#endif
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	/* Quad UART's IRQ */
	GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
#endif
	/* OTG */
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PC9_PF_USBOTG_DATA0,
	PC10_PF_USBOTG_DATA2,
	PC11_PF_USBOTG_DATA1,
	PC12_PF_USBOTG_DATA4,
	PC13_PF_USBOTG_DATA3,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PE2_PF_USBOTG_DIR,
	PE24_PF_USBOTG_CLK,
	PE25_PF_USBOTG_DATA7,
	/* USBH2 */
	PA0_PF_USBH2_CLK,
	PA1_PF_USBH2_DIR,
	PA2_PF_USBH2_DATA7,
	PA3_PF_USBH2_NXT,
	PA4_PF_USBH2_STP,
	PD19_AF_USBH2_DATA4,
	PD20_AF_USBH2_DATA3,
	PD21_AF_USBH2_DATA6,
	PD22_AF_USBH2_DATA0,
	PD23_AF_USBH2_DATA2,
	PD24_AF_USBH2_DATA1,
	PD26_AF_USBH2_DATA5,
};

static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
	.width = 2,
};

static struct resource eukrea_cpuimx27_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc3ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &eukrea_cpuimx27_flash_data,
	},
	.num_resources = 1,
	.resource = &eukrea_cpuimx27_flash_resource,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static const struct mxc_nand_platform_data
cpuimx27_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&eukrea_cpuimx27_nor_mtd_device,
};

static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
	.bitrate = 100000,
};

static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pcf8563", 0x51),
	},
};

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
static struct plat_serial8250_port serial_platform_data[] = {
	{
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
		/* irq number is run-time assigned */
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
		/* irq number is run-time assigned */
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
		/* irq number is run-time assigned */
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
		/* irq number is run-time assigned */
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
	}
};

static struct platform_device serial_device = {
	.name = "serial8250",
	.id = 0,
	.dev = {
		.platform_data = serial_platform_data,
	},
};
#endif

static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}

static struct mxc_usbh_platform_data otg_pdata __initdata = {
	.init	= eukrea_cpuimx27_otg_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
};

static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}

static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
	.init	= eukrea_cpuimx27_usbh2_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
};

static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
	.operating_mode = FSL_USB2_DR_DEVICE,
	.phy_mode       = FSL_USB2_PHY_ULPI,
};

static bool otg_mode_host __initdata;

static int __init eukrea_cpuimx27_otg_mode(char *options)
{
	if (!strcmp(options, "host"))
		otg_mode_host = true;
	else if (!strcmp(options, "device"))
		otg_mode_host = false;
	else
		pr_info("otg_mode neither \"host\" nor \"device\". "
			"Defaulting to device\n");
	return 1;
}
__setup("otg_mode=", eukrea_cpuimx27_otg_mode);

static void __init eukrea_cpuimx27_init(void)
{
	imx27_soc_init();

	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
		ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");

	imx27_add_imx_uart0(&uart_pdata);

	imx27_add_mxc_nand(&cpuimx27_nand_board_info);

	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
				ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));

	imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);

	imx27_add_fec(NULL);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	imx27_add_imx2_wdt();
	imx27_add_mxc_w1();

#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	/* SDHC2 can be used for Wifi */
	imx27_add_mxc_mmc(1, NULL);
#endif
#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
	/* in which case UART4 is also used for Bluetooth */
	imx27_add_imx_uart3(&uart_pdata);
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	serial_platform_data[0].irq = IMX_GPIO_NR(2, 23);
	serial_platform_data[1].irq = IMX_GPIO_NR(2, 22);
	serial_platform_data[2].irq = IMX_GPIO_NR(2, 27);
	serial_platform_data[3].irq = IMX_GPIO_NR(2, 30);
	platform_device_register(&serial_device);
#endif

	if (otg_mode_host) {
		otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
				ULPI_OTG_DRVVBUS_EXT);
		if (otg_pdata.otg)
			imx27_add_mxc_ehci_otg(&otg_pdata);
	} else {
		imx27_add_fsl_usb2_udc(&otg_device_pdata);
	}

	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
			ULPI_OTG_DRVVBUS_EXT);
	if (usbh2_pdata.otg)
		imx27_add_mxc_ehci_hs(2, &usbh2_pdata);

#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
	eukrea_mbimx27_baseboard_init();
#endif
}

static void __init eukrea_cpuimx27_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer eukrea_cpuimx27_timer = {
	.init = eukrea_cpuimx27_timer_init,
};

MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
	.atag_offset = 0x100,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.handle_irq = imx27_handle_irq,
	.timer = &eukrea_cpuimx27_timer,
	.init_machine = eukrea_cpuimx27_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
af5b1df7 EB	1	/*
	2	* Copyright (C) 2009 Eric Benard - eric@eukrea.com
	3	*
	4	* Based on pcm038.c which is :
	5	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	6	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; either version 2
	11	* of the License, or (at your option) any later version.
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	20	* MA 02110-1301, USA.
	21	*/
	22
	23	#include <linux/i2c.h>
	24	#include <linux/io.h>
	25	#include <linux/mtd/plat-ram.h>
	26	#include <linux/mtd/physmap.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/serial_8250.h>
9f2270da EB	29	#include <linux/usb/otg.h>
9f2270da EB	30	#include <linux/usb/ulpi.h>
af5b1df7 EB	31
	32	#include <asm/mach-types.h>
	33	#include <asm/mach/arch.h>
	34	#include <asm/mach/time.h>
	35	#include <asm/mach/map.h>
	36
af5b1df7 EB	37	#include <mach/common.h>
af5b1df7 EB	38	#include <mach/hardware.h>
e835d88e	39	#include <mach/iomux-mx27.h>
9f2270da	40	#include <mach/ulpi.h>
af5b1df7	41
0e7a29a8	42	#include "devices-imx27.h"
3ed0bcb4	43	#include "eukrea-baseboards.h"
af5b1df7	44
6c80ee51	45	static const int eukrea_cpuimx27_pins[] __initconst = {
af5b1df7 EB	46	/* UART1 */
	47	PE12_PF_UART1_TXD,
	48	PE13_PF_UART1_RXD,
	49	PE14_PF_UART1_CTS,
	50	PE15_PF_UART1_RTS,
	51	/* UART4 */
2d66c780	52	#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
af5b1df7 EB	53	PB26_AF_UART4_RTS,
	54	PB28_AF_UART4_TXD,
	55	PB29_AF_UART4_CTS,
	56	PB31_AF_UART4_RXD,
2d66c780	57	#endif
af5b1df7 EB	58	/* FEC */
	59	PD0_AIN_FEC_TXD0,
	60	PD1_AIN_FEC_TXD1,
	61	PD2_AIN_FEC_TXD2,
	62	PD3_AIN_FEC_TXD3,
	63	PD4_AOUT_FEC_RX_ER,
	64	PD5_AOUT_FEC_RXD1,
	65	PD6_AOUT_FEC_RXD2,
	66	PD7_AOUT_FEC_RXD3,
	67	PD8_AF_FEC_MDIO,
	68	PD9_AIN_FEC_MDC,
	69	PD10_AOUT_FEC_CRS,
	70	PD11_AOUT_FEC_TX_CLK,
	71	PD12_AOUT_FEC_RXD0,
	72	PD13_AOUT_FEC_RX_DV,
	73	PD14_AOUT_FEC_RX_CLK,
	74	PD15_AOUT_FEC_COL,
	75	PD16_AIN_FEC_TX_ER,
	76	PF23_AIN_FEC_TX_EN,
	77	/* I2C1 */
	78	PD17_PF_I2C_DATA,
	79	PD18_PF_I2C_CLK,
	80	/* SDHC2 */
2d66c780	81	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
af5b1df7 EB	82	PB4_PF_SD2_D0,
	83	PB5_PF_SD2_D1,
	84	PB6_PF_SD2_D2,
	85	PB7_PF_SD2_D3,
	86	PB8_PF_SD2_CMD,
	87	PB9_PF_SD2_CLK,
2d66c780	88	#endif
af5b1df7 EB	89	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
af5b1df7 EB	90	/* Quad UART's IRQ */
ebb4fc82 EB	91	GPIO_PORTB \| 22 \| GPIO_GPIO \| GPIO_IN,
	92	GPIO_PORTB \| 23 \| GPIO_GPIO \| GPIO_IN,
	93	GPIO_PORTB \| 27 \| GPIO_GPIO \| GPIO_IN,
	94	GPIO_PORTB \| 30 \| GPIO_GPIO \| GPIO_IN,
af5b1df7	95	#endif
9f2270da EB	96	/* OTG */
	97	PC7_PF_USBOTG_DATA5,
	98	PC8_PF_USBOTG_DATA6,
	99	PC9_PF_USBOTG_DATA0,
	100	PC10_PF_USBOTG_DATA2,
	101	PC11_PF_USBOTG_DATA1,
	102	PC12_PF_USBOTG_DATA4,
	103	PC13_PF_USBOTG_DATA3,
	104	PE0_PF_USBOTG_NXT,
	105	PE1_PF_USBOTG_STP,
	106	PE2_PF_USBOTG_DIR,
	107	PE24_PF_USBOTG_CLK,
	108	PE25_PF_USBOTG_DATA7,
	109	/* USBH2 */
	110	PA0_PF_USBH2_CLK,
	111	PA1_PF_USBH2_DIR,
	112	PA2_PF_USBH2_DATA7,
	113	PA3_PF_USBH2_NXT,
	114	PA4_PF_USBH2_STP,
	115	PD19_AF_USBH2_DATA4,
	116	PD20_AF_USBH2_DATA3,
	117	PD21_AF_USBH2_DATA6,
	118	PD22_AF_USBH2_DATA0,
	119	PD23_AF_USBH2_DATA2,
	120	PD24_AF_USBH2_DATA1,
	121	PD26_AF_USBH2_DATA5,
af5b1df7 EB	122	};
	123
	124	static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
	125	.width = 2,
	126	};
	127
	128	static struct resource eukrea_cpuimx27_flash_resource = {
	129	.start = 0xc0000000,
	130	.end = 0xc3ffffff,
	131	.flags = IORESOURCE_MEM,
	132	};
	133
	134	static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
	135	.name = "physmap-flash",
	136	.id = 0,
	137	.dev = {
	138	.platform_data = &eukrea_cpuimx27_flash_data,
	139	},
	140	.num_resources = 1,
	141	.resource = &eukrea_cpuimx27_flash_resource,
	142	};
	143
d5dac4a6 UKK	144	static const struct imxuart_platform_data uart_pdata __initconst = {
d5dac4a6 UKK	145	.flags = IMXUART_HAVE_RTSCTS,
af5b1df7 EB	146	};
af5b1df7 EB	147
0e7a29a8 UKK	148	static const struct mxc_nand_platform_data
0e7a29a8 UKK	149	cpuimx27_nand_board_info __initconst = {
af5b1df7 EB	150	.width = 1,
	151	.hw_ecc = 1,
	152	};
	153
	154	static struct platform_device *platform_devices[] __initdata = {
	155	&eukrea_cpuimx27_nor_mtd_device,
af5b1df7 EB	156	};
af5b1df7 EB	157
c6987159	158	static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
af5b1df7 EB	159	.bitrate = 100000,
	160	};
	161
	162	static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
	163	{
cf87a6e2	164	I2C_BOARD_INFO("pcf8563", 0x51),
af5b1df7 EB	165	},
	166	};
	167
	168	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	169	static struct plat_serial8250_port serial_platform_data[] = {
	170	{
3f35d1f5	171	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
438196c3	172	/* irq number is run-time assigned */
af5b1df7 EB	173	.uartclk = 14745600,
	174	.regshift = 1,
	175	.iotype = UPIO_MEM,
	176	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	177	}, {
3f35d1f5	178	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
438196c3	179	/* irq number is run-time assigned */
af5b1df7 EB	180	.uartclk = 14745600,
	181	.regshift = 1,
	182	.iotype = UPIO_MEM,
	183	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	184	}, {
3f35d1f5	185	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
438196c3	186	/* irq number is run-time assigned */
af5b1df7 EB	187	.uartclk = 14745600,
	188	.regshift = 1,
	189	.iotype = UPIO_MEM,
	190	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	191	}, {
3f35d1f5	192	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
438196c3	193	/* irq number is run-time assigned */
af5b1df7 EB	194	.uartclk = 14745600,
	195	.regshift = 1,
	196	.iotype = UPIO_MEM,
	197	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	198	}, {
	199	}
	200	};
	201
	202	static struct platform_device serial_device = {
	203	.name = "serial8250",
	204	.id = 0,
	205	.dev = {
	206	.platform_data = serial_platform_data,
	207	},
	208	};
	209	#endif
	210
4bd597b6 SH	211	static int eukrea_cpuimx27_otg_init(struct platform_device *pdev)
	212	{
	213	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
	214	}
	215
2eb42d5c	216	static struct mxc_usbh_platform_data otg_pdata __initdata = {
4bd597b6	217	.init = eukrea_cpuimx27_otg_init,
9f2270da	218	.portsc = MXC_EHCI_MODE_ULPI,
9f2270da EB	219	};
9f2270da EB	220
4bd597b6 SH	221	static int eukrea_cpuimx27_usbh2_init(struct platform_device *pdev)
	222	{
	223	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
	224	}
	225
2eb42d5c	226	static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
4bd597b6	227	.init = eukrea_cpuimx27_usbh2_init,
9f2270da	228	.portsc = MXC_EHCI_MODE_ULPI,
9f2270da EB	229	};
9f2270da EB	230
bd455ed3	231	static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
9f2270da EB	232	.operating_mode = FSL_USB2_DR_DEVICE,
	233	.phy_mode = FSL_USB2_PHY_ULPI,
	234	};
	235
33a264dd	236	static bool otg_mode_host __initdata;
9f2270da EB	237
	238	static int __init eukrea_cpuimx27_otg_mode(char *options)
	239	{
	240	if (!strcmp(options, "host"))
33a264dd	241	otg_mode_host = true;
9f2270da	242	else if (!strcmp(options, "device"))
33a264dd	243	otg_mode_host = false;
9f2270da EB	244	else
	245	pr_info("otg_mode neither \"host\" nor \"device\". "
	246	"Defaulting to device\n");
33a264dd	247	return 1;
9f2270da EB	248	}
	249	__setup("otg_mode=", eukrea_cpuimx27_otg_mode);
	250
af5b1df7 EB	251	static void __init eukrea_cpuimx27_init(void)
af5b1df7 EB	252	{
b78d8e59 SG	253	imx27_soc_init();
b78d8e59 SG	254
af5b1df7 EB	255	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
	256	ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
	257
d5dac4a6	258	imx27_add_imx_uart0(&uart_pdata);
af5b1df7	259
0e7a29a8	260	imx27_add_mxc_nand(&cpuimx27_nand_board_info);
af5b1df7 EB	261
	262	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
	263	ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
	264
f779b7dd	265	imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
af5b1df7	266
6bd96f3c	267	imx27_add_fec(NULL);
af5b1df7	268	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
bec31a85 BT	269	imx27_add_imx2_wdt();
bec31a85 BT	270	imx27_add_mxc_w1();
af5b1df7 EB	271
	272	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	273	/* SDHC2 can be used for Wifi */
9d3d945a	274	imx27_add_mxc_mmc(1, NULL);
2d66c780 EB	275	#endif
2d66c780 EB	276	#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
af5b1df7	277	/* in which case UART4 is also used for Bluetooth */
d5dac4a6	278	imx27_add_imx_uart3(&uart_pdata);
af5b1df7 EB	279	#endif
	280
	281	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
438196c3 SG	282	serial_platform_data[0].irq = IMX_GPIO_NR(2, 23);
	283	serial_platform_data[1].irq = IMX_GPIO_NR(2, 22);
	284	serial_platform_data[2].irq = IMX_GPIO_NR(2, 27);
	285	serial_platform_data[3].irq = IMX_GPIO_NR(2, 30);
af5b1df7 EB	286	platform_device_register(&serial_device);
	287	#endif
	288
9f2270da	289	if (otg_mode_host) {
48f6b099 SH	290	otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
	291	ULPI_OTG_DRVVBUS_EXT);
	292	if (otg_pdata.otg)
	293	imx27_add_mxc_ehci_otg(&otg_pdata);
	294	} else {
	295	imx27_add_fsl_usb2_udc(&otg_device_pdata);
9f2270da EB	296	}
9f2270da EB	297
48f6b099 SH	298	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
	299	ULPI_OTG_DRVVBUS_EXT);
	300	if (usbh2_pdata.otg)
	301	imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
9f2270da	302
af5b1df7 EB	303	#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
	304	eukrea_mbimx27_baseboard_init();
	305	#endif
	306	}
	307
	308	static void __init eukrea_cpuimx27_timer_init(void)
	309	{
	310	mx27_clocks_init(26000000);
	311	}
	312
	313	static struct sys_timer eukrea_cpuimx27_timer = {
	314	.init = eukrea_cpuimx27_timer_init,
	315	};
	316
0d6cfa3a	317	MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
dc8f1907	318	.atag_offset = 0x100,
3dac2196 UKK	319	.map_io = mx27_map_io,
	320	.init_early = imx27_init_early,
	321	.init_irq = mx27_init_irq,
ffa2ea3f	322	.handle_irq = imx27_handle_irq,
3dac2196 UKK	323	.timer = &eukrea_cpuimx27_timer,
3dac2196 UKK	324	.init_machine = eukrea_cpuimx27_init,
65ea7884	325	.restart = mxc_restart,
af5b1df7	326	MACHINE_END