[deliverable/linux.git] / arch / arm / mach-imx / mach-cpuimx27.c

/*
 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
 *
 * Based on pcm038.c which is :
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>

#include <mach/eukrea-baseboards.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx27.h>
#include <mach/mxc_nand.h>
#include <mach/ulpi.h>

#include "devices-imx27.h"

static const int eukrea_cpuimx27_pins[] __initconst = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART4 */
#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
	PB26_AF_UART4_RTS,
	PB28_AF_UART4_TXD,
	PB29_AF_UART4_CTS,
	PB31_AF_UART4_RXD,
#endif
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C1 */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	/* SDHC2 */
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	PB4_PF_SD2_D0,
	PB5_PF_SD2_D1,
	PB6_PF_SD2_D2,
	PB7_PF_SD2_D3,
	PB8_PF_SD2_CMD,
	PB9_PF_SD2_CLK,
#endif
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	/* Quad UART's IRQ */
	GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
	GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
#endif
	/* OTG */
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PC9_PF_USBOTG_DATA0,
	PC10_PF_USBOTG_DATA2,
	PC11_PF_USBOTG_DATA1,
	PC12_PF_USBOTG_DATA4,
	PC13_PF_USBOTG_DATA3,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PE2_PF_USBOTG_DIR,
	PE24_PF_USBOTG_CLK,
	PE25_PF_USBOTG_DATA7,
	/* USBH2 */
	PA0_PF_USBH2_CLK,
	PA1_PF_USBH2_DIR,
	PA2_PF_USBH2_DATA7,
	PA3_PF_USBH2_NXT,
	PA4_PF_USBH2_STP,
	PD19_AF_USBH2_DATA4,
	PD20_AF_USBH2_DATA3,
	PD21_AF_USBH2_DATA6,
	PD22_AF_USBH2_DATA0,
	PD23_AF_USBH2_DATA2,
	PD24_AF_USBH2_DATA1,
	PD26_AF_USBH2_DATA5,
};

static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
	.width = 2,
};

static struct resource eukrea_cpuimx27_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc3ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &eukrea_cpuimx27_flash_data,
	},
	.num_resources = 1,
	.resource = &eukrea_cpuimx27_flash_resource,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static const struct mxc_nand_platform_data
cpuimx27_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&eukrea_cpuimx27_nor_mtd_device,
};

static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
	.bitrate = 100000,
};

static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pcf8563", 0x51),
	},
};

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
static struct plat_serial8250_port serial_platform_data[] = {
	{
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
		.irq = IRQ_GPIOB(23),
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
		.irq = IRQ_GPIOB(22),
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
		.irq = IRQ_GPIOB(27),
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
		.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
		.irq = IRQ_GPIOB(30),
		.uartclk = 14745600,
		.regshift = 1,
		.iotype = UPIO_MEM,
		.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
	}, {
	}
};

static struct platform_device serial_device = {
	.name = "serial8250",
	.id = 0,
	.dev = {
		.platform_data = serial_platform_data,
	},
};
#endif

#if defined(CONFIG_USB_ULPI)
static struct mxc_usbh_platform_data otg_pdata __initdata = {
	.portsc	= MXC_EHCI_MODE_ULPI,
	.flags	= MXC_EHCI_INTERFACE_DIFF_UNI,
};

static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
	.portsc	= MXC_EHCI_MODE_ULPI,
	.flags	= MXC_EHCI_INTERFACE_DIFF_UNI,
};
#endif

static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
	.operating_mode = FSL_USB2_DR_DEVICE,
	.phy_mode       = FSL_USB2_PHY_ULPI,
};

static int otg_mode_host;

static int __init eukrea_cpuimx27_otg_mode(char *options)
{
	if (!strcmp(options, "host"))
		otg_mode_host = 1;
	else if (!strcmp(options, "device"))
		otg_mode_host = 0;
	else
		pr_info("otg_mode neither \"host\" nor \"device\". "
			"Defaulting to device\n");
	return 0;
}
__setup("otg_mode=", eukrea_cpuimx27_otg_mode);

static void __init eukrea_cpuimx27_init(void)
{
	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
		ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");

	imx27_add_imx_uart0(&uart_pdata);

	imx27_add_mxc_nand(&cpuimx27_nand_board_info);

	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
				ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));

	imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);

	imx27_add_fec(NULL);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	imx27_add_imx2_wdt(NULL);
	imx27_add_mxc_w1(NULL);

#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	/* SDHC2 can be used for Wifi */
	imx27_add_mxc_mmc(1, NULL);
#endif
#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
	/* in which case UART4 is also used for Bluetooth */
	imx27_add_imx_uart3(&uart_pdata);
#endif

#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
	platform_device_register(&serial_device);
#endif

#if defined(CONFIG_USB_ULPI)
	if (otg_mode_host) {
		otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
				ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);

		imx27_add_mxc_ehci_otg(&otg_pdata);
	}

	usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
				ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);

	imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
#endif
	if (!otg_mode_host)
		imx27_add_fsl_usb2_udc(&otg_device_pdata);

#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
	eukrea_mbimx27_baseboard_init();
#endif
}

static void __init eukrea_cpuimx27_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer eukrea_cpuimx27_timer = {
	.init = eukrea_cpuimx27_timer_init,
};

MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
	.boot_params    = MX27_PHYS_OFFSET + 0x100,
	.map_io         = mx27_map_io,
	.init_irq       = mx27_init_irq,
	.init_machine   = eukrea_cpuimx27_init,
	.timer          = &eukrea_cpuimx27_timer,
MACHINE_END
Commit	Line	Data
af5b1df7 EB	1	/*
	2	* Copyright (C) 2009 Eric Benard - eric@eukrea.com
	3	*
	4	* Based on pcm038.c which is :
	5	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	6	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* as published by the Free Software Foundation; either version 2
	11	* of the License, or (at your option) any later version.
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	20	* MA 02110-1301, USA.
	21	*/
	22
	23	#include <linux/i2c.h>
	24	#include <linux/io.h>
	25	#include <linux/mtd/plat-ram.h>
	26	#include <linux/mtd/physmap.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/serial_8250.h>
9f2270da EB	29	#include <linux/usb/otg.h>
9f2270da EB	30	#include <linux/usb/ulpi.h>
af5b1df7 EB	31
	32	#include <asm/mach-types.h>
	33	#include <asm/mach/arch.h>
	34	#include <asm/mach/time.h>
	35	#include <asm/mach/map.h>
	36
95afd090	37	#include <mach/eukrea-baseboards.h>
af5b1df7 EB	38	#include <mach/common.h>
af5b1df7 EB	39	#include <mach/hardware.h>
e835d88e	40	#include <mach/iomux-mx27.h>
af5b1df7	41	#include <mach/mxc_nand.h>
9f2270da	42	#include <mach/ulpi.h>
af5b1df7	43
0e7a29a8	44	#include "devices-imx27.h"
af5b1df7	45
6c80ee51	46	static const int eukrea_cpuimx27_pins[] __initconst = {
af5b1df7 EB	47	/* UART1 */
	48	PE12_PF_UART1_TXD,
	49	PE13_PF_UART1_RXD,
	50	PE14_PF_UART1_CTS,
	51	PE15_PF_UART1_RTS,
	52	/* UART4 */
2d66c780	53	#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
af5b1df7 EB	54	PB26_AF_UART4_RTS,
	55	PB28_AF_UART4_TXD,
	56	PB29_AF_UART4_CTS,
	57	PB31_AF_UART4_RXD,
2d66c780	58	#endif
af5b1df7 EB	59	/* FEC */
	60	PD0_AIN_FEC_TXD0,
	61	PD1_AIN_FEC_TXD1,
	62	PD2_AIN_FEC_TXD2,
	63	PD3_AIN_FEC_TXD3,
	64	PD4_AOUT_FEC_RX_ER,
	65	PD5_AOUT_FEC_RXD1,
	66	PD6_AOUT_FEC_RXD2,
	67	PD7_AOUT_FEC_RXD3,
	68	PD8_AF_FEC_MDIO,
	69	PD9_AIN_FEC_MDC,
	70	PD10_AOUT_FEC_CRS,
	71	PD11_AOUT_FEC_TX_CLK,
	72	PD12_AOUT_FEC_RXD0,
	73	PD13_AOUT_FEC_RX_DV,
	74	PD14_AOUT_FEC_RX_CLK,
	75	PD15_AOUT_FEC_COL,
	76	PD16_AIN_FEC_TX_ER,
	77	PF23_AIN_FEC_TX_EN,
	78	/* I2C1 */
	79	PD17_PF_I2C_DATA,
	80	PD18_PF_I2C_CLK,
	81	/* SDHC2 */
2d66c780	82	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
af5b1df7 EB	83	PB4_PF_SD2_D0,
	84	PB5_PF_SD2_D1,
	85	PB6_PF_SD2_D2,
	86	PB7_PF_SD2_D3,
	87	PB8_PF_SD2_CMD,
	88	PB9_PF_SD2_CLK,
2d66c780	89	#endif
af5b1df7 EB	90	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
af5b1df7 EB	91	/* Quad UART's IRQ */
ebb4fc82 EB	92	GPIO_PORTB \| 22 \| GPIO_GPIO \| GPIO_IN,
	93	GPIO_PORTB \| 23 \| GPIO_GPIO \| GPIO_IN,
	94	GPIO_PORTB \| 27 \| GPIO_GPIO \| GPIO_IN,
	95	GPIO_PORTB \| 30 \| GPIO_GPIO \| GPIO_IN,
af5b1df7	96	#endif
9f2270da EB	97	/* OTG */
	98	PC7_PF_USBOTG_DATA5,
	99	PC8_PF_USBOTG_DATA6,
	100	PC9_PF_USBOTG_DATA0,
	101	PC10_PF_USBOTG_DATA2,
	102	PC11_PF_USBOTG_DATA1,
	103	PC12_PF_USBOTG_DATA4,
	104	PC13_PF_USBOTG_DATA3,
	105	PE0_PF_USBOTG_NXT,
	106	PE1_PF_USBOTG_STP,
	107	PE2_PF_USBOTG_DIR,
	108	PE24_PF_USBOTG_CLK,
	109	PE25_PF_USBOTG_DATA7,
	110	/* USBH2 */
	111	PA0_PF_USBH2_CLK,
	112	PA1_PF_USBH2_DIR,
	113	PA2_PF_USBH2_DATA7,
	114	PA3_PF_USBH2_NXT,
	115	PA4_PF_USBH2_STP,
	116	PD19_AF_USBH2_DATA4,
	117	PD20_AF_USBH2_DATA3,
	118	PD21_AF_USBH2_DATA6,
	119	PD22_AF_USBH2_DATA0,
	120	PD23_AF_USBH2_DATA2,
	121	PD24_AF_USBH2_DATA1,
	122	PD26_AF_USBH2_DATA5,
af5b1df7 EB	123	};
	124
	125	static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
	126	.width = 2,
	127	};
	128
	129	static struct resource eukrea_cpuimx27_flash_resource = {
	130	.start = 0xc0000000,
	131	.end = 0xc3ffffff,
	132	.flags = IORESOURCE_MEM,
	133	};
	134
	135	static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
	136	.name = "physmap-flash",
	137	.id = 0,
	138	.dev = {
	139	.platform_data = &eukrea_cpuimx27_flash_data,
	140	},
	141	.num_resources = 1,
	142	.resource = &eukrea_cpuimx27_flash_resource,
	143	};
	144
d5dac4a6 UKK	145	static const struct imxuart_platform_data uart_pdata __initconst = {
d5dac4a6 UKK	146	.flags = IMXUART_HAVE_RTSCTS,
af5b1df7 EB	147	};
af5b1df7 EB	148
0e7a29a8 UKK	149	static const struct mxc_nand_platform_data
0e7a29a8 UKK	150	cpuimx27_nand_board_info __initconst = {
af5b1df7 EB	151	.width = 1,
	152	.hw_ecc = 1,
	153	};
	154
	155	static struct platform_device *platform_devices[] __initdata = {
	156	&eukrea_cpuimx27_nor_mtd_device,
af5b1df7 EB	157	};
af5b1df7 EB	158
c6987159	159	static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
af5b1df7 EB	160	.bitrate = 100000,
	161	};
	162
	163	static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
	164	{
cf87a6e2	165	I2C_BOARD_INFO("pcf8563", 0x51),
af5b1df7 EB	166	},
	167	};
	168
	169	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	170	static struct plat_serial8250_port serial_platform_data[] = {
	171	{
3f35d1f5	172	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
af5b1df7 EB	173	.irq = IRQ_GPIOB(23),
	174	.uartclk = 14745600,
	175	.regshift = 1,
	176	.iotype = UPIO_MEM,
	177	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	178	}, {
3f35d1f5	179	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
af5b1df7 EB	180	.irq = IRQ_GPIOB(22),
	181	.uartclk = 14745600,
	182	.regshift = 1,
	183	.iotype = UPIO_MEM,
	184	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	185	}, {
3f35d1f5	186	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
af5b1df7 EB	187	.irq = IRQ_GPIOB(27),
	188	.uartclk = 14745600,
	189	.regshift = 1,
	190	.iotype = UPIO_MEM,
	191	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	192	}, {
3f35d1f5	193	.mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
af5b1df7 EB	194	.irq = IRQ_GPIOB(30),
	195	.uartclk = 14745600,
	196	.regshift = 1,
	197	.iotype = UPIO_MEM,
	198	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST \| UPF_IOREMAP,
	199	}, {
	200	}
	201	};
	202
	203	static struct platform_device serial_device = {
	204	.name = "serial8250",
	205	.id = 0,
	206	.dev = {
	207	.platform_data = serial_platform_data,
	208	},
	209	};
	210	#endif
	211
cbb052c9	212	#if defined(CONFIG_USB_ULPI)
2eb42d5c	213	static struct mxc_usbh_platform_data otg_pdata __initdata = {
9f2270da EB	214	.portsc = MXC_EHCI_MODE_ULPI,
	215	.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
	216	};
	217
2eb42d5c	218	static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
9f2270da EB	219	.portsc = MXC_EHCI_MODE_ULPI,
	220	.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
	221	};
cbb052c9	222	#endif
9f2270da	223
bd455ed3	224	static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
9f2270da EB	225	.operating_mode = FSL_USB2_DR_DEVICE,
	226	.phy_mode = FSL_USB2_PHY_ULPI,
	227	};
	228
	229	static int otg_mode_host;
	230
	231	static int __init eukrea_cpuimx27_otg_mode(char *options)
	232	{
	233	if (!strcmp(options, "host"))
	234	otg_mode_host = 1;
	235	else if (!strcmp(options, "device"))
	236	otg_mode_host = 0;
	237	else
	238	pr_info("otg_mode neither \"host\" nor \"device\". "
	239	"Defaulting to device\n");
	240	return 0;
	241	}
	242	__setup("otg_mode=", eukrea_cpuimx27_otg_mode);
	243
af5b1df7 EB	244	static void __init eukrea_cpuimx27_init(void)
	245	{
	246	mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
	247	ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
	248
d5dac4a6	249	imx27_add_imx_uart0(&uart_pdata);
af5b1df7	250
0e7a29a8	251	imx27_add_mxc_nand(&cpuimx27_nand_board_info);
af5b1df7 EB	252
	253	i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
	254	ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
	255
f779b7dd	256	imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
af5b1df7	257
6bd96f3c	258	imx27_add_fec(NULL);
af5b1df7	259	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
e0a1961d	260	imx27_add_imx2_wdt(NULL);
ae71a562	261	imx27_add_mxc_w1(NULL);
af5b1df7 EB	262
	263	#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
	264	/* SDHC2 can be used for Wifi */
9d3d945a	265	imx27_add_mxc_mmc(1, NULL);
2d66c780 EB	266	#endif
2d66c780 EB	267	#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
af5b1df7	268	/* in which case UART4 is also used for Bluetooth */
d5dac4a6	269	imx27_add_imx_uart3(&uart_pdata);
af5b1df7 EB	270	#endif
	271
	272	#if defined(CONFIG_SERIAL_8250) \|\| defined(CONFIG_SERIAL_8250_MODULE)
	273	platform_device_register(&serial_device);
	274	#endif
	275
9f2270da EB	276	#if defined(CONFIG_USB_ULPI)
	277	if (otg_mode_host) {
	278	otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
70ddd47f	279	ULPI_OTG_DRVVBUS \| ULPI_OTG_DRVVBUS_EXT);
9f2270da	280
2eb42d5c	281	imx27_add_mxc_ehci_otg(&otg_pdata);
9f2270da EB	282	}
	283
	284	usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
70ddd47f	285	ULPI_OTG_DRVVBUS \| ULPI_OTG_DRVVBUS_EXT);
9f2270da	286
2eb42d5c	287	imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
9f2270da EB	288	#endif
9f2270da EB	289	if (!otg_mode_host)
bd455ed3	290	imx27_add_fsl_usb2_udc(&otg_device_pdata);
9f2270da	291
af5b1df7 EB	292	#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
	293	eukrea_mbimx27_baseboard_init();
	294	#endif
	295	}
	296
	297	static void __init eukrea_cpuimx27_timer_init(void)
	298	{
	299	mx27_clocks_init(26000000);
	300	}
	301
	302	static struct sys_timer eukrea_cpuimx27_timer = {
	303	.init = eukrea_cpuimx27_timer_init,
	304	};
	305
	306	MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
34101237	307	.boot_params = MX27_PHYS_OFFSET + 0x100,
af5b1df7 EB	308	.map_io = mx27_map_io,
	309	.init_irq = mx27_init_irq,
	310	.init_machine = eukrea_cpuimx27_init,
	311	.timer = &eukrea_cpuimx27_timer,
	312	MACHINE_END