[deliverable/linux.git] / arch / arm / mach-imx / mach-imx27_visstrim_m10.c

/*
 * mach-imx27_visstrim_m10.c
 *
 * Copyright 2010  Javier Martin <javier.martin@vista-silicon.com>
 *
 * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/leds.h>
#include <linux/memblock.h>
#include <media/soc_camera.h>
#include <sound/tlv320aic32x4.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/system.h>
#include <mach/common.h>
#include <mach/iomux-mx27.h>

#include "devices-imx27.h"

#define TVP5150_RSTN (GPIO_PORTC + 18)
#define TVP5150_PWDN (GPIO_PORTC + 19)
#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
#define SDHC1_IRQ IRQ_GPIOB(25)

#define MOTHERBOARD_BIT2	(GPIO_PORTD + 31)
#define MOTHERBOARD_BIT1	(GPIO_PORTD + 30)
#define MOTHERBOARD_BIT0	(GPIO_PORTD + 29)

#define EXPBOARD_BIT2		(GPIO_PORTD + 25)
#define EXPBOARD_BIT1		(GPIO_PORTD + 27)
#define EXPBOARD_BIT0		(GPIO_PORTD + 28)

static const int visstrim_m10_pins[] __initconst = {
	/* UART1 (console) */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* SDHC1 */
	PE18_PF_SD1_D0,
	PE19_PF_SD1_D1,
	PE20_PF_SD1_D2,
	PE21_PF_SD1_D3,
	PE22_PF_SD1_CMD,
	PE23_PF_SD1_CLK,
	/* Both I2Cs */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* USB OTG */
	OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
	PC9_PF_USBOTG_DATA0,
	PC11_PF_USBOTG_DATA1,
	PC10_PF_USBOTG_DATA2,
	PC13_PF_USBOTG_DATA3,
	PC12_PF_USBOTG_DATA4,
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PE25_PF_USBOTG_DATA7,
	PE24_PF_USBOTG_CLK,
	PE2_PF_USBOTG_DIR,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PB23_PF_USB_PWR,
	PB24_PF_USB_OC,
	/* CSI */
	PB10_PF_CSI_D0,
	PB11_PF_CSI_D1,
	PB12_PF_CSI_D2,
	PB13_PF_CSI_D3,
	PB14_PF_CSI_D4,
	PB15_PF_CSI_MCLK,
	PB16_PF_CSI_PIXCLK,
	PB17_PF_CSI_D5,
	PB18_PF_CSI_D6,
	PB19_PF_CSI_D7,
	PB20_PF_CSI_VSYNC,
	PB21_PF_CSI_HSYNC,
	/* mother board version */
	MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	/* expansion board version */
	EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
};

static struct gpio visstrim_m10_version_gpios[] = {
	{ EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
	{ EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
	{ EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
	{ MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
	{ MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
	{ MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
};

/* Camera */
static int visstrim_camera_power(struct device *dev, int on)
{
	gpio_set_value(TVP5150_PWDN, on);

	return 0;
};

static int visstrim_camera_reset(struct device *dev)
{
	gpio_set_value(TVP5150_RSTN, 0);
	ndelay(500);
	gpio_set_value(TVP5150_RSTN, 1);

	return 0;
};

static struct i2c_board_info visstrim_i2c_camera =  {
	I2C_BOARD_INFO("tvp5150", 0x5d),
};

static struct soc_camera_link iclink_tvp5150 = {
	.bus_id         = 0,
	.board_info     = &visstrim_i2c_camera,
	.i2c_adapter_id = 0,
	.power = visstrim_camera_power,
	.reset = visstrim_camera_reset,
};

static struct mx2_camera_platform_data visstrim_camera = {
	.flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
		 MX2_CAMERA_PCLK_SAMPLE_RISING,
	.clk = 100000,
};

static phys_addr_t mx2_camera_base __initdata;
#define MX2_CAMERA_BUF_SIZE SZ_8M

static void __init visstrim_camera_init(void)
{
	struct platform_device *pdev;
	int dma;

	/* Initialize tvp5150 gpios */
	mxc_gpio_mode(TVP5150_RSTN | GPIO_GPIO | GPIO_OUT);
	mxc_gpio_mode(TVP5150_PWDN | GPIO_GPIO | GPIO_OUT);
	gpio_set_value(TVP5150_RSTN, 1);
	gpio_set_value(TVP5150_PWDN, 0);
	ndelay(1);

	gpio_set_value(TVP5150_PWDN, 1);
	ndelay(1);
	gpio_set_value(TVP5150_RSTN, 0);
	ndelay(500);
	gpio_set_value(TVP5150_RSTN, 1);
	ndelay(200000);

	pdev = imx27_add_mx2_camera(&visstrim_camera);
	if (IS_ERR(pdev))
		return;

	dma = dma_declare_coherent_memory(&pdev->dev,
				mx2_camera_base, mx2_camera_base,
				MX2_CAMERA_BUF_SIZE,
				DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
	if (!(dma & DMA_MEMORY_MAP))
		return;
}

static void __init visstrim_reserve(void)
{
	/* reserve 4 MiB for mx2-camera */
	mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE,
			MX2_CAMERA_BUF_SIZE);
	memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
}

/* GPIOs used as events for applications */
static struct gpio_keys_button visstrim_gpio_keys[] = {
	{
		.type	= EV_KEY,
		.code	= KEY_RESTART,
		.gpio	= (GPIO_PORTC + 15),
		.desc	= "Default config",
		.active_low = 0,
		.wakeup = 1,
	},
	{
		.type	= EV_KEY,
		.code	= KEY_RECORD,
		.gpio	= (GPIO_PORTF + 14),
		.desc	= "Record",
		.active_low = 0,
		.wakeup = 1,
	},
	{
		.type   = EV_KEY,
		.code   = KEY_STOP,
		.gpio   = (GPIO_PORTF + 13),
		.desc   = "Stop",
		.active_low = 0,
		.wakeup = 1,
	}
};

static const struct gpio_keys_platform_data
		visstrim_gpio_keys_platform_data __initconst = {
	.buttons	= visstrim_gpio_keys,
	.nbuttons	= ARRAY_SIZE(visstrim_gpio_keys),
};

/* led */
static const struct gpio_led visstrim_m10_leds[] __initconst = {
	{
		.name = "visstrim:ld0",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 29),
	},
	{
		.name = "visstrim:ld1",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 24),
	},
	{
		.name = "visstrim:ld2",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 28),
	},
	{
		.name = "visstrim:ld3",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 25),
	},
};

static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
	.leds = visstrim_m10_leds,
	.num_leds = ARRAY_SIZE(visstrim_m10_leds),
};

/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
static int visstrim_m10_sdhc1_init(struct device *dev,
		irq_handler_t detect_irq, void *data)
{
	int ret;

	ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
				"mmc-detect", data);
	return ret;
}

static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(SDHC1_IRQ, data);
}

static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
	.init = visstrim_m10_sdhc1_init,
	.exit = visstrim_m10_sdhc1_exit,
};

/* Visstrim_SM10 NOR flash */
static struct physmap_flash_data visstrim_m10_flash_data = {
	.width = 2,
};

static struct resource visstrim_m10_flash_resource = {
	.start = 0xc0000000,
	.end = 0xc0000000 + SZ_64M - 1,
	.flags = IORESOURCE_MEM,
};

static struct platform_device visstrim_m10_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &visstrim_m10_flash_data,
	},
	.num_resources = 1,
	.resource = &visstrim_m10_flash_resource,
};

static struct platform_device *platform_devices[] __initdata = {
	&visstrim_m10_nor_mtd_device,
};

/* Visstrim_M10 uses UART0 as console */
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/* I2C */
static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
	.bitrate = 100000,
};

static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
	.gpio_base = 240, /* After MX27 internal GPIOs */
	.invert = 0,
};

static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
	.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
		     AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
		     AIC32X4_PWR_AIC32X4_LDO_ENABLE |
		     AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
		     AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
	.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
			 AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
	.swapdacs = false,
};

static struct i2c_board_info visstrim_m10_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pca9555", 0x20),
		.platform_data = &visstrim_m10_pca9555_pdata,
	},
	{
		I2C_BOARD_INFO("tlv320aic32x4", 0x18),
		.platform_data = &visstrim_m10_aic32x4_pdata,
	},
	{
		 I2C_BOARD_INFO("m41t00", 0x68),
	}
};

/* USB OTG */
static int otg_phy_init(struct platform_device *pdev)
{
	gpio_set_value(OTG_PHY_CS_GPIO, 0);

	mdelay(10);

	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}

static const struct mxc_usbh_platform_data
visstrim_m10_usbotg_pdata __initconst = {
	.init = otg_phy_init,
	.portsc	= MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};

/* SSI */
static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
	.flags			= IMX_SSI_DMA | IMX_SSI_SYN,
};

static void __init visstrim_m10_revision(void)
{
	int exp_version = 0;
	int mo_version = 0;
	int ret;

	ret = gpio_request_array(visstrim_m10_version_gpios,
				 ARRAY_SIZE(visstrim_m10_version_gpios));
	if (ret) {
		pr_err("Failed to request version gpios");
		return;
	}

	/* Get expansion board version (negative logic) */
	exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
	exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
	exp_version |= !gpio_get_value(EXPBOARD_BIT0);

	/* Get mother board version (negative logic) */
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);

	system_rev = 0x27000;
	system_rev |= (mo_version << 4);
	system_rev |= exp_version;
}

static void __init visstrim_m10_board_init(void)
{
	int ret;

	imx27_soc_init();
	visstrim_m10_revision();

	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
			ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
	if (ret)
		pr_err("Failed to setup pins (%d)\n", ret);

	imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
	imx27_add_imx_uart0(&uart_pdata);

	imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
	imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
	i2c_register_board_info(0, visstrim_m10_i2c_devices,
				ARRAY_SIZE(visstrim_m10_i2c_devices));

	imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
	imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
	imx27_add_fec(NULL);
	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
	platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
				      &iclink_tvp5150, sizeof(iclink_tvp5150));
	gpio_led_register_device(0, &visstrim_m10_led_data);
	visstrim_camera_init();
}

static void __init visstrim_m10_timer_init(void)
{
	mx27_clocks_init((unsigned long)25000000);
}

static struct sys_timer visstrim_m10_timer = {
	.init	= visstrim_m10_timer_init,
};

MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
	.atag_offset = 0x100,
	.reserve = visstrim_reserve,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.handle_irq = imx27_handle_irq,
	.timer = &visstrim_m10_timer,
	.init_machine = visstrim_m10_board_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
3b161e51 JM	1	/*
	2	* mach-imx27_visstrim_m10.c
	3	*
	4	* Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
	5	*
	6	* Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	21	* MA 02110-1301, USA.
	22	*/
	23
	24	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	25
	26	#include <linux/platform_device.h>
	27	#include <linux/mtd/physmap.h>
	28	#include <linux/i2c.h>
	29	#include <linux/i2c/pca953x.h>
3b161e51 JM	30	#include <linux/input.h>
3b161e51 JM	31	#include <linux/gpio.h>
4bd597b6	32	#include <linux/delay.h>
f52f5a55	33	#include <linux/dma-mapping.h>
acb6464c	34	#include <linux/leds.h>
f52f5a55 JM	35	#include <linux/memblock.h>
f52f5a55 JM	36	#include <media/soc_camera.h>
c86566bb	37	#include <sound/tlv320aic32x4.h>
3b161e51 JM	38	#include <asm/mach-types.h>
	39	#include <asm/mach/arch.h>
	40	#include <asm/mach/time.h>
435ca241	41	#include <asm/system.h>
3b161e51	42	#include <mach/common.h>
c0450dff	43	#include <mach/iomux-mx27.h>
3b161e51 JM	44
3b161e51 JM	45	#include "devices-imx27.h"
3b161e51	46
f52f5a55 JM	47	#define TVP5150_RSTN (GPIO_PORTC + 18)
f52f5a55 JM	48	#define TVP5150_PWDN (GPIO_PORTC + 19)
3b161e51 JM	49	#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
	50	#define SDHC1_IRQ IRQ_GPIOB(25)
	51
435ca241 JM	52	#define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
	53	#define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
	54	#define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
	55
	56	#define EXPBOARD_BIT2 (GPIO_PORTD + 25)
	57	#define EXPBOARD_BIT1 (GPIO_PORTD + 27)
	58	#define EXPBOARD_BIT0 (GPIO_PORTD + 28)
	59
6c80ee51	60	static const int visstrim_m10_pins[] __initconst = {
3b161e51 JM	61	/* UART1 (console) */
	62	PE12_PF_UART1_TXD,
	63	PE13_PF_UART1_RXD,
	64	PE14_PF_UART1_CTS,
	65	PE15_PF_UART1_RTS,
	66	/* FEC */
	67	PD0_AIN_FEC_TXD0,
	68	PD1_AIN_FEC_TXD1,
	69	PD2_AIN_FEC_TXD2,
	70	PD3_AIN_FEC_TXD3,
	71	PD4_AOUT_FEC_RX_ER,
	72	PD5_AOUT_FEC_RXD1,
	73	PD6_AOUT_FEC_RXD2,
	74	PD7_AOUT_FEC_RXD3,
	75	PD8_AF_FEC_MDIO,
	76	PD9_AIN_FEC_MDC,
	77	PD10_AOUT_FEC_CRS,
	78	PD11_AOUT_FEC_TX_CLK,
	79	PD12_AOUT_FEC_RXD0,
	80	PD13_AOUT_FEC_RX_DV,
	81	PD14_AOUT_FEC_RX_CLK,
	82	PD15_AOUT_FEC_COL,
	83	PD16_AIN_FEC_TX_ER,
	84	PF23_AIN_FEC_TX_EN,
a5e2051b JM	85	/* SSI1 */
	86	PC20_PF_SSI1_FS,
	87	PC21_PF_SSI1_RXD,
	88	PC22_PF_SSI1_TXD,
	89	PC23_PF_SSI1_CLK,
3b161e51 JM	90	/* SDHC1 */
	91	PE18_PF_SD1_D0,
	92	PE19_PF_SD1_D1,
	93	PE20_PF_SD1_D2,
	94	PE21_PF_SD1_D3,
	95	PE22_PF_SD1_CMD,
	96	PE23_PF_SD1_CLK,
	97	/* Both I2Cs */
	98	PD17_PF_I2C_DATA,
	99	PD18_PF_I2C_CLK,
	100	PC5_PF_I2C2_SDA,
	101	PC6_PF_I2C2_SCL,
	102	/* USB OTG */
	103	OTG_PHY_CS_GPIO \| GPIO_GPIO \| GPIO_OUT,
	104	PC9_PF_USBOTG_DATA0,
	105	PC11_PF_USBOTG_DATA1,
	106	PC10_PF_USBOTG_DATA2,
	107	PC13_PF_USBOTG_DATA3,
	108	PC12_PF_USBOTG_DATA4,
	109	PC7_PF_USBOTG_DATA5,
	110	PC8_PF_USBOTG_DATA6,
	111	PE25_PF_USBOTG_DATA7,
	112	PE24_PF_USBOTG_CLK,
	113	PE2_PF_USBOTG_DIR,
	114	PE0_PF_USBOTG_NXT,
	115	PE1_PF_USBOTG_STP,
	116	PB23_PF_USB_PWR,
	117	PB24_PF_USB_OC,
f52f5a55 JM	118	/* CSI */
	119	PB10_PF_CSI_D0,
	120	PB11_PF_CSI_D1,
	121	PB12_PF_CSI_D2,
	122	PB13_PF_CSI_D3,
	123	PB14_PF_CSI_D4,
	124	PB15_PF_CSI_MCLK,
	125	PB16_PF_CSI_PIXCLK,
	126	PB17_PF_CSI_D5,
	127	PB18_PF_CSI_D6,
	128	PB19_PF_CSI_D7,
	129	PB20_PF_CSI_VSYNC,
	130	PB21_PF_CSI_HSYNC,
435ca241 JM	131	/* mother board version */
	132	MOTHERBOARD_BIT2 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	133	MOTHERBOARD_BIT1 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	134	MOTHERBOARD_BIT0 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	135	/* expansion board version */
	136	EXPBOARD_BIT2 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	137	EXPBOARD_BIT1 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	138	EXPBOARD_BIT0 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	139	};
	140
	141	static struct gpio visstrim_m10_version_gpios[] = {
	142	{ EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
	143	{ EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
	144	{ EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
	145	{ MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
	146	{ MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
	147	{ MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
3b161e51 JM	148	};
3b161e51 JM	149
f52f5a55 JM	150	/* Camera */
	151	static int visstrim_camera_power(struct device *dev, int on)
	152	{
	153	gpio_set_value(TVP5150_PWDN, on);
	154
	155	return 0;
	156	};
	157
	158	static int visstrim_camera_reset(struct device *dev)
	159	{
	160	gpio_set_value(TVP5150_RSTN, 0);
	161	ndelay(500);
	162	gpio_set_value(TVP5150_RSTN, 1);
	163
	164	return 0;
	165	};
	166
	167	static struct i2c_board_info visstrim_i2c_camera = {
	168	I2C_BOARD_INFO("tvp5150", 0x5d),
	169	};
	170
	171	static struct soc_camera_link iclink_tvp5150 = {
	172	.bus_id = 0,
	173	.board_info = &visstrim_i2c_camera,
	174	.i2c_adapter_id = 0,
	175	.power = visstrim_camera_power,
	176	.reset = visstrim_camera_reset,
	177	};
	178
	179	static struct mx2_camera_platform_data visstrim_camera = {
	180	.flags = MX2_CAMERA_CCIR \| MX2_CAMERA_CCIR_INTERLACE \|
5ff203b5	181	MX2_CAMERA_PCLK_SAMPLE_RISING,
f52f5a55 JM	182	.clk = 100000,
	183	};
	184
	185	static phys_addr_t mx2_camera_base __initdata;
	186	#define MX2_CAMERA_BUF_SIZE SZ_8M
	187
	188	static void __init visstrim_camera_init(void)
	189	{
	190	struct platform_device *pdev;
	191	int dma;
	192
	193	/* Initialize tvp5150 gpios */
	194	mxc_gpio_mode(TVP5150_RSTN \| GPIO_GPIO \| GPIO_OUT);
	195	mxc_gpio_mode(TVP5150_PWDN \| GPIO_GPIO \| GPIO_OUT);
	196	gpio_set_value(TVP5150_RSTN, 1);
	197	gpio_set_value(TVP5150_PWDN, 0);
	198	ndelay(1);
	199
	200	gpio_set_value(TVP5150_PWDN, 1);
	201	ndelay(1);
	202	gpio_set_value(TVP5150_RSTN, 0);
	203	ndelay(500);
	204	gpio_set_value(TVP5150_RSTN, 1);
	205	ndelay(200000);
	206
	207	pdev = imx27_add_mx2_camera(&visstrim_camera);
	208	if (IS_ERR(pdev))
	209	return;
	210
	211	dma = dma_declare_coherent_memory(&pdev->dev,
	212	mx2_camera_base, mx2_camera_base,
	213	MX2_CAMERA_BUF_SIZE,
	214	DMA_MEMORY_MAP \| DMA_MEMORY_EXCLUSIVE);
	215	if (!(dma & DMA_MEMORY_MAP))
	216	return;
	217	}
	218
	219	static void __init visstrim_reserve(void)
	220	{
	221	/* reserve 4 MiB for mx2-camera */
	222	mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE,
	223	MX2_CAMERA_BUF_SIZE);
	224	memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	225	memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	226	}
	227
3b161e51 JM	228	/* GPIOs used as events for applications */
	229	static struct gpio_keys_button visstrim_gpio_keys[] = {
	230	{
	231	.type = EV_KEY,
	232	.code = KEY_RESTART,
	233	.gpio = (GPIO_PORTC + 15),
	234	.desc = "Default config",
	235	.active_low = 0,
	236	.wakeup = 1,
	237	},
	238	{
	239	.type = EV_KEY,
	240	.code = KEY_RECORD,
	241	.gpio = (GPIO_PORTF + 14),
	242	.desc = "Record",
	243	.active_low = 0,
	244	.wakeup = 1,
	245	},
	246	{
	247	.type = EV_KEY,
	248	.code = KEY_STOP,
	249	.gpio = (GPIO_PORTF + 13),
	250	.desc = "Stop",
	251	.active_low = 0,
	252	.wakeup = 1,
	253	}
	254	};
	255
5309498a UKK	256	static const struct gpio_keys_platform_data
5309498a UKK	257	visstrim_gpio_keys_platform_data __initconst = {
3b161e51 JM	258	.buttons = visstrim_gpio_keys,
	259	.nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
	260	};
	261
acb6464c JM	262	/* led */
	263	static const struct gpio_led visstrim_m10_leds[] __initconst = {
	264	{
	265	.name = "visstrim:ld0",
	266	.default_trigger = "nand-disk",
	267	.gpio = (GPIO_PORTC + 29),
	268	},
	269	{
	270	.name = "visstrim:ld1",
	271	.default_trigger = "nand-disk",
	272	.gpio = (GPIO_PORTC + 24),
	273	},
	274	{
	275	.name = "visstrim:ld2",
	276	.default_trigger = "nand-disk",
	277	.gpio = (GPIO_PORTC + 28),
	278	},
	279	{
	280	.name = "visstrim:ld3",
	281	.default_trigger = "nand-disk",
	282	.gpio = (GPIO_PORTC + 25),
	283	},
	284	};
	285
	286	static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
	287	.leds = visstrim_m10_leds,
	288	.num_leds = ARRAY_SIZE(visstrim_m10_leds),
	289	};
	290
3b161e51 JM	291	/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
	292	static int visstrim_m10_sdhc1_init(struct device *dev,
	293	irq_handler_t detect_irq, void *data)
	294	{
	295	int ret;
	296
	297	ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
	298	"mmc-detect", data);
	299	return ret;
	300	}
	301
	302	static void visstrim_m10_sdhc1_exit(struct device dev, void data)
	303	{
	304	free_irq(SDHC1_IRQ, data);
	305	}
	306
9d3d945a	307	static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
3b161e51 JM	308	.init = visstrim_m10_sdhc1_init,
	309	.exit = visstrim_m10_sdhc1_exit,
	310	};
	311
	312	/* Visstrim_SM10 NOR flash */
	313	static struct physmap_flash_data visstrim_m10_flash_data = {
	314	.width = 2,
	315	};
	316
	317	static struct resource visstrim_m10_flash_resource = {
	318	.start = 0xc0000000,
	319	.end = 0xc0000000 + SZ_64M - 1,
	320	.flags = IORESOURCE_MEM,
	321	};
	322
	323	static struct platform_device visstrim_m10_nor_mtd_device = {
	324	.name = "physmap-flash",
	325	.id = 0,
	326	.dev = {
	327	.platform_data = &visstrim_m10_flash_data,
	328	},
	329	.num_resources = 1,
	330	.resource = &visstrim_m10_flash_resource,
	331	};
	332
	333	static struct platform_device *platform_devices[] __initdata = {
3b161e51	334	&visstrim_m10_nor_mtd_device,
3b161e51 JM	335	};
	336
	337	/* Visstrim_M10 uses UART0 as console */
	338	static const struct imxuart_platform_data uart_pdata __initconst = {
	339	.flags = IMXUART_HAVE_RTSCTS,
	340	};
	341
	342	/* I2C */
	343	static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
	344	.bitrate = 100000,
	345	};
	346
	347	static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
	348	.gpio_base = 240, /* After MX27 internal GPIOs */
	349	.invert = 0,
	350	};
	351
c86566bb JM	352	static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
	353	.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN \|
	354	AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE \|
	355	AIC32X4_PWR_AIC32X4_LDO_ENABLE \|
	356	AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 \|
	357	AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
	358	.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K \|
	359	AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
	360	.swapdacs = false,
	361	};
	362
3b161e51 JM	363	static struct i2c_board_info visstrim_m10_i2c_devices[] = {
	364	{
	365	I2C_BOARD_INFO("pca9555", 0x20),
	366	.platform_data = &visstrim_m10_pca9555_pdata,
	367	},
a5e2051b JM	368	{
a5e2051b JM	369	I2C_BOARD_INFO("tlv320aic32x4", 0x18),
c86566bb	370	.platform_data = &visstrim_m10_aic32x4_pdata,
257b49c3 JM	371	},
	372	{
	373	I2C_BOARD_INFO("m41t00", 0x68),
a5e2051b	374	}
3b161e51 JM	375	};
	376
	377	/* USB OTG */
	378	static int otg_phy_init(struct platform_device *pdev)
	379	{
	380	gpio_set_value(OTG_PHY_CS_GPIO, 0);
4bd597b6 SH	381
	382	mdelay(10);
	383
	384	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
3b161e51 JM	385	}
3b161e51 JM	386
2eb42d5c UKK	387	static const struct mxc_usbh_platform_data
2eb42d5c UKK	388	visstrim_m10_usbotg_pdata __initconst = {
3b161e51 JM	389	.init = otg_phy_init,
3b161e51 JM	390	.portsc = MXC_EHCI_MODE_ULPI \| MXC_EHCI_UTMI_8BIT,
3b161e51 JM	391	};
3b161e51 JM	392
a5e2051b JM	393	/* SSI */
	394	static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
	395	.flags = IMX_SSI_DMA \| IMX_SSI_SYN,
	396	};
	397
435ca241 JM	398	static void __init visstrim_m10_revision(void)
	399	{
	400	int exp_version = 0;
	401	int mo_version = 0;
	402	int ret;
	403
	404	ret = gpio_request_array(visstrim_m10_version_gpios,
	405	ARRAY_SIZE(visstrim_m10_version_gpios));
	406	if (ret) {
	407	pr_err("Failed to request version gpios");
	408	return;
	409	}
	410
	411	/* Get expansion board version (negative logic) */
	412	exp_version \|= !gpio_get_value(EXPBOARD_BIT2) << 2;
	413	exp_version \|= !gpio_get_value(EXPBOARD_BIT1) << 1;
	414	exp_version \|= !gpio_get_value(EXPBOARD_BIT0);
	415
	416	/* Get mother board version (negative logic) */
	417	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
	418	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
	419	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT0);
	420
	421	system_rev = 0x27000;
	422	system_rev \|= (mo_version << 4);
	423	system_rev \|= exp_version;
	424	}
	425
3b161e51 JM	426	static void __init visstrim_m10_board_init(void)
	427	{
	428	int ret;
	429
b78d8e59	430	imx27_soc_init();
435ca241	431	visstrim_m10_revision();
b78d8e59	432
3b161e51 JM	433	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
	434	ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
	435	if (ret)
	436	pr_err("Failed to setup pins (%d)\n", ret);
	437
a5e2051b	438	imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
3b161e51 JM	439	imx27_add_imx_uart0(&uart_pdata);
3b161e51 JM	440
77a406da UKK	441	imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
77a406da UKK	442	imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
baa1dee1 JM	443	i2c_register_board_info(0, visstrim_m10_i2c_devices,
	444	ARRAY_SIZE(visstrim_m10_i2c_devices));
	445
9d3d945a	446	imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
2eb42d5c	447	imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
6bd96f3c	448	imx27_add_fec(NULL);
5309498a	449	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
3b161e51	450	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
5ec65ee5	451	imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
f52f5a55 JM	452	platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
f52f5a55 JM	453	&iclink_tvp5150, sizeof(iclink_tvp5150));
acb6464c	454	gpio_led_register_device(0, &visstrim_m10_led_data);
f52f5a55	455	visstrim_camera_init();
3b161e51 JM	456	}
	457
	458	static void __init visstrim_m10_timer_init(void)
	459	{
	460	mx27_clocks_init((unsigned long)25000000);
	461	}
	462
	463	static struct sys_timer visstrim_m10_timer = {
	464	.init = visstrim_m10_timer_init,
	465	};
	466
	467	MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
dc8f1907	468	.atag_offset = 0x100,
f52f5a55	469	.reserve = visstrim_reserve,
3dac2196 UKK	470	.map_io = mx27_map_io,
	471	.init_early = imx27_init_early,
	472	.init_irq = mx27_init_irq,
ffa2ea3f	473	.handle_irq = imx27_handle_irq,
3dac2196 UKK	474	.timer = &visstrim_m10_timer,
3dac2196 UKK	475	.init_machine = visstrim_m10_board_init,
65ea7884	476	.restart = mxc_restart,
3b161e51	477	MACHINE_END