[deliverable/linux.git] / arch / arm / mach-imx / mach-imx27_visstrim_m10.c

/*
 * mach-imx27_visstrim_m10.c
 *
 * Copyright 2010  Javier Martin <javier.martin@vista-silicon.com>
 *
 * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/leds.h>
#include <linux/memblock.h>
#include <media/soc_camera.h>
#include <sound/tlv320aic32x4.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/system_info.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx27.h>

#include "devices-imx27.h"

#define TVP5150_RSTN (GPIO_PORTC + 18)
#define TVP5150_PWDN (GPIO_PORTC + 19)
#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
#define SDHC1_IRQ_GPIO IMX_GPIO_NR(2, 25)

#define MOTHERBOARD_BIT2	(GPIO_PORTD + 31)
#define MOTHERBOARD_BIT1	(GPIO_PORTD + 30)
#define MOTHERBOARD_BIT0	(GPIO_PORTD + 29)

#define EXPBOARD_BIT2		(GPIO_PORTD + 25)
#define EXPBOARD_BIT1		(GPIO_PORTD + 27)
#define EXPBOARD_BIT0		(GPIO_PORTD + 28)

static const int visstrim_m10_pins[] __initconst = {
	/* UART1 (console) */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* SDHC1 */
	PE18_PF_SD1_D0,
	PE19_PF_SD1_D1,
	PE20_PF_SD1_D2,
	PE21_PF_SD1_D3,
	PE22_PF_SD1_CMD,
	PE23_PF_SD1_CLK,
	/* Both I2Cs */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* USB OTG */
	OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
	PC9_PF_USBOTG_DATA0,
	PC11_PF_USBOTG_DATA1,
	PC10_PF_USBOTG_DATA2,
	PC13_PF_USBOTG_DATA3,
	PC12_PF_USBOTG_DATA4,
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PE25_PF_USBOTG_DATA7,
	PE24_PF_USBOTG_CLK,
	PE2_PF_USBOTG_DIR,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PB23_PF_USB_PWR,
	PB24_PF_USB_OC,
	/* CSI */
	TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
	TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
	PB10_PF_CSI_D0,
	PB11_PF_CSI_D1,
	PB12_PF_CSI_D2,
	PB13_PF_CSI_D3,
	PB14_PF_CSI_D4,
	PB15_PF_CSI_MCLK,
	PB16_PF_CSI_PIXCLK,
	PB17_PF_CSI_D5,
	PB18_PF_CSI_D6,
	PB19_PF_CSI_D7,
	PB20_PF_CSI_VSYNC,
	PB21_PF_CSI_HSYNC,
	/* mother board version */
	MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	/* expansion board version */
	EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
};

static struct gpio visstrim_m10_version_gpios[] = {
	{ EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
	{ EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
	{ EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
	{ MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
	{ MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
	{ MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
};

static const struct gpio visstrim_m10_gpios[] __initconst = {
	{
		.gpio = TVP5150_RSTN,
		.flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
		.label = "tvp5150_rstn",
	},
	{
		.gpio = TVP5150_PWDN,
		.flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
		.label = "tvp5150_pwdn",
	},
	{
		.gpio = OTG_PHY_CS_GPIO,
		.flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
		.label = "usbotg_cs",
	},
};

/* Camera */
static int visstrim_camera_power(struct device *dev, int on)
{
	gpio_set_value(TVP5150_PWDN, on);

	return 0;
};

static int visstrim_camera_reset(struct device *dev)
{
	gpio_set_value(TVP5150_RSTN, 0);
	ndelay(500);
	gpio_set_value(TVP5150_RSTN, 1);

	return 0;
};

static struct i2c_board_info visstrim_i2c_camera =  {
	I2C_BOARD_INFO("tvp5150", 0x5d),
};

static struct soc_camera_link iclink_tvp5150 = {
	.bus_id         = 0,
	.board_info     = &visstrim_i2c_camera,
	.i2c_adapter_id = 0,
	.power = visstrim_camera_power,
	.reset = visstrim_camera_reset,
};

static struct mx2_camera_platform_data visstrim_camera = {
	.flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
		 MX2_CAMERA_PCLK_SAMPLE_RISING,
	.clk = 100000,
};

static phys_addr_t mx2_camera_base __initdata;
#define MX2_CAMERA_BUF_SIZE SZ_8M

static void __init visstrim_camera_init(void)
{
	struct platform_device *pdev;
	int dma;

	gpio_set_value(TVP5150_PWDN, 1);
	ndelay(1);
	gpio_set_value(TVP5150_RSTN, 0);
	ndelay(500);
	gpio_set_value(TVP5150_RSTN, 1);
	ndelay(200000);

	pdev = imx27_add_mx2_camera(&visstrim_camera);
	if (IS_ERR(pdev))
		return;

	dma = dma_declare_coherent_memory(&pdev->dev,
				mx2_camera_base, mx2_camera_base,
				MX2_CAMERA_BUF_SIZE,
				DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
	if (!(dma & DMA_MEMORY_MAP))
		return;
}

static void __init visstrim_reserve(void)
{
	/* reserve 4 MiB for mx2-camera */
	mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE,
			MX2_CAMERA_BUF_SIZE);
	memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
}

/* GPIOs used as events for applications */
static struct gpio_keys_button visstrim_gpio_keys[] = {
	{
		.type	= EV_KEY,
		.code	= KEY_RESTART,
		.gpio	= (GPIO_PORTC + 15),
		.desc	= "Default config",
		.active_low = 0,
		.wakeup = 1,
	},
	{
		.type	= EV_KEY,
		.code	= KEY_RECORD,
		.gpio	= (GPIO_PORTF + 14),
		.desc	= "Record",
		.active_low = 0,
		.wakeup = 1,
	},
	{
		.type   = EV_KEY,
		.code   = KEY_STOP,
		.gpio   = (GPIO_PORTF + 13),
		.desc   = "Stop",
		.active_low = 0,
		.wakeup = 1,
	}
};

static const struct gpio_keys_platform_data
		visstrim_gpio_keys_platform_data __initconst = {
	.buttons	= visstrim_gpio_keys,
	.nbuttons	= ARRAY_SIZE(visstrim_gpio_keys),
};

/* led */
static const struct gpio_led visstrim_m10_leds[] __initconst = {
	{
		.name = "visstrim:ld0",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 29),
	},
	{
		.name = "visstrim:ld1",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 24),
	},
	{
		.name = "visstrim:ld2",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 28),
	},
	{
		.name = "visstrim:ld3",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 25),
	},
};

static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
	.leds = visstrim_m10_leds,
	.num_leds = ARRAY_SIZE(visstrim_m10_leds),
};

/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
static int visstrim_m10_sdhc1_init(struct device *dev,
		irq_handler_t detect_irq, void *data)
{
	int ret;

	ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
			  IRQF_TRIGGER_FALLING, "mmc-detect", data);
	return ret;
}

static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
}

static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
	.init = visstrim_m10_sdhc1_init,
	.exit = visstrim_m10_sdhc1_exit,
};

/* Visstrim_SM10 NOR flash */
static struct physmap_flash_data visstrim_m10_flash_data = {
	.width = 2,
};

static struct resource visstrim_m10_flash_resource = {
	.start = 0xc0000000,
	.end = 0xc0000000 + SZ_64M - 1,
	.flags = IORESOURCE_MEM,
};

static struct platform_device visstrim_m10_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &visstrim_m10_flash_data,
	},
	.num_resources = 1,
	.resource = &visstrim_m10_flash_resource,
};

static struct platform_device *platform_devices[] __initdata = {
	&visstrim_m10_nor_mtd_device,
};

/* Visstrim_M10 uses UART0 as console */
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/* I2C */
static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
	.bitrate = 100000,
};

static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
	.gpio_base = 240, /* After MX27 internal GPIOs */
	.invert = 0,
};

static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
	.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
		     AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
		     AIC32X4_PWR_AIC32X4_LDO_ENABLE |
		     AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
		     AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
	.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
			 AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
	.swapdacs = false,
};

static struct i2c_board_info visstrim_m10_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pca9555", 0x20),
		.platform_data = &visstrim_m10_pca9555_pdata,
	},
	{
		I2C_BOARD_INFO("tlv320aic32x4", 0x18),
		.platform_data = &visstrim_m10_aic32x4_pdata,
	},
	{
		 I2C_BOARD_INFO("m41t00", 0x68),
	}
};

/* USB OTG */
static int otg_phy_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}

static const struct mxc_usbh_platform_data
visstrim_m10_usbotg_pdata __initconst = {
	.init = otg_phy_init,
	.portsc	= MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};

/* SSI */
static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
	.flags			= IMX_SSI_DMA | IMX_SSI_SYN,
};

static void __init visstrim_m10_revision(void)
{
	int exp_version = 0;
	int mo_version = 0;
	int ret;

	ret = gpio_request_array(visstrim_m10_version_gpios,
				 ARRAY_SIZE(visstrim_m10_version_gpios));
	if (ret) {
		pr_err("Failed to request version gpios");
		return;
	}

	/* Get expansion board version (negative logic) */
	exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
	exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
	exp_version |= !gpio_get_value(EXPBOARD_BIT0);

	/* Get mother board version (negative logic) */
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);

	system_rev = 0x27000;
	system_rev |= (mo_version << 4);
	system_rev |= exp_version;
}

static void __init visstrim_m10_board_init(void)
{
	int ret;

	imx27_soc_init();
	visstrim_m10_revision();

	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
			ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
	if (ret)
		pr_err("Failed to setup pins (%d)\n", ret);

	ret = gpio_request_array(visstrim_m10_gpios,
				ARRAY_SIZE(visstrim_m10_gpios));
	if (ret)
		pr_err("Failed to request gpios (%d)\n", ret);

	imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
	imx27_add_imx_uart0(&uart_pdata);

	imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
	imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
	i2c_register_board_info(0, visstrim_m10_i2c_devices,
				ARRAY_SIZE(visstrim_m10_i2c_devices));

	imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
	imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
	imx27_add_fec(NULL);
	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
	platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
				      &iclink_tvp5150, sizeof(iclink_tvp5150));
	gpio_led_register_device(0, &visstrim_m10_led_data);
	visstrim_camera_init();
}

static void __init visstrim_m10_timer_init(void)
{
	mx27_clocks_init((unsigned long)25000000);
}

static struct sys_timer visstrim_m10_timer = {
	.init	= visstrim_m10_timer_init,
};

MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
	.atag_offset = 0x100,
	.reserve = visstrim_reserve,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.handle_irq = imx27_handle_irq,
	.timer = &visstrim_m10_timer,
	.init_machine = visstrim_m10_board_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
3b161e51 JM	1	/*
	2	* mach-imx27_visstrim_m10.c
	3	*
	4	* Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
	5	*
	6	* Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	21	* MA 02110-1301, USA.
	22	*/
	23
	24	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	25
	26	#include <linux/platform_device.h>
	27	#include <linux/mtd/physmap.h>
	28	#include <linux/i2c.h>
	29	#include <linux/i2c/pca953x.h>
3b161e51 JM	30	#include <linux/input.h>
3b161e51 JM	31	#include <linux/gpio.h>
4bd597b6	32	#include <linux/delay.h>
f52f5a55	33	#include <linux/dma-mapping.h>
acb6464c	34	#include <linux/leds.h>
f52f5a55 JM	35	#include <linux/memblock.h>
f52f5a55 JM	36	#include <media/soc_camera.h>
c86566bb	37	#include <sound/tlv320aic32x4.h>
3b161e51 JM	38	#include <asm/mach-types.h>
	39	#include <asm/mach/arch.h>
	40	#include <asm/mach/time.h>
396c89b3	41	#include <asm/system_info.h>
3b161e51	42	#include <mach/common.h>
438196c3	43	#include <mach/hardware.h>
c0450dff	44	#include <mach/iomux-mx27.h>
3b161e51 JM	45
3b161e51 JM	46	#include "devices-imx27.h"
3b161e51	47
f52f5a55 JM	48	#define TVP5150_RSTN (GPIO_PORTC + 18)
f52f5a55 JM	49	#define TVP5150_PWDN (GPIO_PORTC + 19)
3b161e51	50	#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
438196c3	51	#define SDHC1_IRQ_GPIO IMX_GPIO_NR(2, 25)
3b161e51	52
435ca241 JM	53	#define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
	54	#define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
	55	#define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
	56
	57	#define EXPBOARD_BIT2 (GPIO_PORTD + 25)
	58	#define EXPBOARD_BIT1 (GPIO_PORTD + 27)
	59	#define EXPBOARD_BIT0 (GPIO_PORTD + 28)
	60
6c80ee51	61	static const int visstrim_m10_pins[] __initconst = {
3b161e51 JM	62	/* UART1 (console) */
	63	PE12_PF_UART1_TXD,
	64	PE13_PF_UART1_RXD,
	65	PE14_PF_UART1_CTS,
	66	PE15_PF_UART1_RTS,
	67	/* FEC */
	68	PD0_AIN_FEC_TXD0,
	69	PD1_AIN_FEC_TXD1,
	70	PD2_AIN_FEC_TXD2,
	71	PD3_AIN_FEC_TXD3,
	72	PD4_AOUT_FEC_RX_ER,
	73	PD5_AOUT_FEC_RXD1,
	74	PD6_AOUT_FEC_RXD2,
	75	PD7_AOUT_FEC_RXD3,
	76	PD8_AF_FEC_MDIO,
	77	PD9_AIN_FEC_MDC,
	78	PD10_AOUT_FEC_CRS,
	79	PD11_AOUT_FEC_TX_CLK,
	80	PD12_AOUT_FEC_RXD0,
	81	PD13_AOUT_FEC_RX_DV,
	82	PD14_AOUT_FEC_RX_CLK,
	83	PD15_AOUT_FEC_COL,
	84	PD16_AIN_FEC_TX_ER,
	85	PF23_AIN_FEC_TX_EN,
a5e2051b JM	86	/* SSI1 */
	87	PC20_PF_SSI1_FS,
	88	PC21_PF_SSI1_RXD,
	89	PC22_PF_SSI1_TXD,
	90	PC23_PF_SSI1_CLK,
3b161e51 JM	91	/* SDHC1 */
	92	PE18_PF_SD1_D0,
	93	PE19_PF_SD1_D1,
	94	PE20_PF_SD1_D2,
	95	PE21_PF_SD1_D3,
	96	PE22_PF_SD1_CMD,
	97	PE23_PF_SD1_CLK,
	98	/* Both I2Cs */
	99	PD17_PF_I2C_DATA,
	100	PD18_PF_I2C_CLK,
	101	PC5_PF_I2C2_SDA,
	102	PC6_PF_I2C2_SCL,
	103	/* USB OTG */
	104	OTG_PHY_CS_GPIO \| GPIO_GPIO \| GPIO_OUT,
	105	PC9_PF_USBOTG_DATA0,
	106	PC11_PF_USBOTG_DATA1,
	107	PC10_PF_USBOTG_DATA2,
	108	PC13_PF_USBOTG_DATA3,
	109	PC12_PF_USBOTG_DATA4,
	110	PC7_PF_USBOTG_DATA5,
	111	PC8_PF_USBOTG_DATA6,
	112	PE25_PF_USBOTG_DATA7,
	113	PE24_PF_USBOTG_CLK,
	114	PE2_PF_USBOTG_DIR,
	115	PE0_PF_USBOTG_NXT,
	116	PE1_PF_USBOTG_STP,
	117	PB23_PF_USB_PWR,
	118	PB24_PF_USB_OC,
f52f5a55	119	/* CSI */
18847b42 JM	120	TVP5150_RSTN \| GPIO_GPIO \| GPIO_OUT,
18847b42 JM	121	TVP5150_PWDN \| GPIO_GPIO \| GPIO_OUT,
f52f5a55 JM	122	PB10_PF_CSI_D0,
	123	PB11_PF_CSI_D1,
	124	PB12_PF_CSI_D2,
	125	PB13_PF_CSI_D3,
	126	PB14_PF_CSI_D4,
	127	PB15_PF_CSI_MCLK,
	128	PB16_PF_CSI_PIXCLK,
	129	PB17_PF_CSI_D5,
	130	PB18_PF_CSI_D6,
	131	PB19_PF_CSI_D7,
	132	PB20_PF_CSI_VSYNC,
	133	PB21_PF_CSI_HSYNC,
435ca241 JM	134	/* mother board version */
	135	MOTHERBOARD_BIT2 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	136	MOTHERBOARD_BIT1 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	137	MOTHERBOARD_BIT0 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	138	/* expansion board version */
	139	EXPBOARD_BIT2 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	140	EXPBOARD_BIT1 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	141	EXPBOARD_BIT0 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	142	};
	143
	144	static struct gpio visstrim_m10_version_gpios[] = {
	145	{ EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
	146	{ EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
	147	{ EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
	148	{ MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
	149	{ MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
	150	{ MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
3b161e51 JM	151	};
3b161e51 JM	152
18847b42 JM	153	static const struct gpio visstrim_m10_gpios[] __initconst = {
	154	{
	155	.gpio = TVP5150_RSTN,
	156	.flags = GPIOF_DIR_OUT \| GPIOF_INIT_HIGH,
	157	.label = "tvp5150_rstn",
	158	},
	159	{
	160	.gpio = TVP5150_PWDN,
	161	.flags = GPIOF_DIR_OUT \| GPIOF_INIT_LOW,
	162	.label = "tvp5150_pwdn",
	163	},
	164	{
	165	.gpio = OTG_PHY_CS_GPIO,
	166	.flags = GPIOF_DIR_OUT \| GPIOF_INIT_LOW,
	167	.label = "usbotg_cs",
	168	},
	169	};
	170
f52f5a55 JM	171	/* Camera */
	172	static int visstrim_camera_power(struct device *dev, int on)
	173	{
	174	gpio_set_value(TVP5150_PWDN, on);
	175
	176	return 0;
	177	};
	178
	179	static int visstrim_camera_reset(struct device *dev)
	180	{
	181	gpio_set_value(TVP5150_RSTN, 0);
	182	ndelay(500);
	183	gpio_set_value(TVP5150_RSTN, 1);
	184
	185	return 0;
	186	};
	187
	188	static struct i2c_board_info visstrim_i2c_camera = {
	189	I2C_BOARD_INFO("tvp5150", 0x5d),
	190	};
	191
	192	static struct soc_camera_link iclink_tvp5150 = {
	193	.bus_id = 0,
	194	.board_info = &visstrim_i2c_camera,
	195	.i2c_adapter_id = 0,
	196	.power = visstrim_camera_power,
	197	.reset = visstrim_camera_reset,
	198	};
	199
	200	static struct mx2_camera_platform_data visstrim_camera = {
	201	.flags = MX2_CAMERA_CCIR \| MX2_CAMERA_CCIR_INTERLACE \|
5ff203b5	202	MX2_CAMERA_PCLK_SAMPLE_RISING,
f52f5a55 JM	203	.clk = 100000,
	204	};
	205
	206	static phys_addr_t mx2_camera_base __initdata;
	207	#define MX2_CAMERA_BUF_SIZE SZ_8M
	208
	209	static void __init visstrim_camera_init(void)
	210	{
	211	struct platform_device *pdev;
	212	int dma;
	213
f52f5a55 JM	214	gpio_set_value(TVP5150_PWDN, 1);
	215	ndelay(1);
	216	gpio_set_value(TVP5150_RSTN, 0);
	217	ndelay(500);
	218	gpio_set_value(TVP5150_RSTN, 1);
	219	ndelay(200000);
	220
	221	pdev = imx27_add_mx2_camera(&visstrim_camera);
	222	if (IS_ERR(pdev))
	223	return;
	224
	225	dma = dma_declare_coherent_memory(&pdev->dev,
	226	mx2_camera_base, mx2_camera_base,
	227	MX2_CAMERA_BUF_SIZE,
	228	DMA_MEMORY_MAP \| DMA_MEMORY_EXCLUSIVE);
	229	if (!(dma & DMA_MEMORY_MAP))
	230	return;
	231	}
	232
	233	static void __init visstrim_reserve(void)
	234	{
	235	/* reserve 4 MiB for mx2-camera */
	236	mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE,
	237	MX2_CAMERA_BUF_SIZE);
	238	memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	239	memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	240	}
	241
3b161e51 JM	242	/* GPIOs used as events for applications */
	243	static struct gpio_keys_button visstrim_gpio_keys[] = {
	244	{
	245	.type = EV_KEY,
	246	.code = KEY_RESTART,
	247	.gpio = (GPIO_PORTC + 15),
	248	.desc = "Default config",
	249	.active_low = 0,
	250	.wakeup = 1,
	251	},
	252	{
	253	.type = EV_KEY,
	254	.code = KEY_RECORD,
	255	.gpio = (GPIO_PORTF + 14),
	256	.desc = "Record",
	257	.active_low = 0,
	258	.wakeup = 1,
	259	},
	260	{
	261	.type = EV_KEY,
	262	.code = KEY_STOP,
	263	.gpio = (GPIO_PORTF + 13),
	264	.desc = "Stop",
	265	.active_low = 0,
	266	.wakeup = 1,
	267	}
	268	};
	269
5309498a UKK	270	static const struct gpio_keys_platform_data
5309498a UKK	271	visstrim_gpio_keys_platform_data __initconst = {
3b161e51 JM	272	.buttons = visstrim_gpio_keys,
	273	.nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
	274	};
	275
acb6464c JM	276	/* led */
	277	static const struct gpio_led visstrim_m10_leds[] __initconst = {
	278	{
	279	.name = "visstrim:ld0",
	280	.default_trigger = "nand-disk",
	281	.gpio = (GPIO_PORTC + 29),
	282	},
	283	{
	284	.name = "visstrim:ld1",
	285	.default_trigger = "nand-disk",
	286	.gpio = (GPIO_PORTC + 24),
	287	},
	288	{
	289	.name = "visstrim:ld2",
	290	.default_trigger = "nand-disk",
	291	.gpio = (GPIO_PORTC + 28),
	292	},
	293	{
	294	.name = "visstrim:ld3",
	295	.default_trigger = "nand-disk",
	296	.gpio = (GPIO_PORTC + 25),
	297	},
	298	};
	299
	300	static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
	301	.leds = visstrim_m10_leds,
	302	.num_leds = ARRAY_SIZE(visstrim_m10_leds),
	303	};
	304
3b161e51 JM	305	/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
	306	static int visstrim_m10_sdhc1_init(struct device *dev,
	307	irq_handler_t detect_irq, void *data)
	308	{
	309	int ret;
	310
438196c3 SG	311	ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
438196c3 SG	312	IRQF_TRIGGER_FALLING, "mmc-detect", data);
3b161e51 JM	313	return ret;
	314	}
	315
	316	static void visstrim_m10_sdhc1_exit(struct device dev, void data)
	317	{
438196c3	318	free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
3b161e51 JM	319	}
3b161e51 JM	320
9d3d945a	321	static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
3b161e51 JM	322	.init = visstrim_m10_sdhc1_init,
	323	.exit = visstrim_m10_sdhc1_exit,
	324	};
	325
	326	/* Visstrim_SM10 NOR flash */
	327	static struct physmap_flash_data visstrim_m10_flash_data = {
	328	.width = 2,
	329	};
	330
	331	static struct resource visstrim_m10_flash_resource = {
	332	.start = 0xc0000000,
	333	.end = 0xc0000000 + SZ_64M - 1,
	334	.flags = IORESOURCE_MEM,
	335	};
	336
	337	static struct platform_device visstrim_m10_nor_mtd_device = {
	338	.name = "physmap-flash",
	339	.id = 0,
	340	.dev = {
	341	.platform_data = &visstrim_m10_flash_data,
	342	},
	343	.num_resources = 1,
	344	.resource = &visstrim_m10_flash_resource,
	345	};
	346
	347	static struct platform_device *platform_devices[] __initdata = {
3b161e51	348	&visstrim_m10_nor_mtd_device,
3b161e51 JM	349	};
	350
	351	/* Visstrim_M10 uses UART0 as console */
	352	static const struct imxuart_platform_data uart_pdata __initconst = {
	353	.flags = IMXUART_HAVE_RTSCTS,
	354	};
	355
	356	/* I2C */
	357	static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
	358	.bitrate = 100000,
	359	};
	360
	361	static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
	362	.gpio_base = 240, /* After MX27 internal GPIOs */
	363	.invert = 0,
	364	};
	365
c86566bb JM	366	static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
	367	.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN \|
	368	AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE \|
	369	AIC32X4_PWR_AIC32X4_LDO_ENABLE \|
	370	AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 \|
	371	AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
	372	.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K \|
	373	AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
	374	.swapdacs = false,
	375	};
	376
3b161e51 JM	377	static struct i2c_board_info visstrim_m10_i2c_devices[] = {
	378	{
	379	I2C_BOARD_INFO("pca9555", 0x20),
	380	.platform_data = &visstrim_m10_pca9555_pdata,
	381	},
a5e2051b JM	382	{
a5e2051b JM	383	I2C_BOARD_INFO("tlv320aic32x4", 0x18),
c86566bb	384	.platform_data = &visstrim_m10_aic32x4_pdata,
257b49c3 JM	385	},
	386	{
	387	I2C_BOARD_INFO("m41t00", 0x68),
a5e2051b	388	}
3b161e51 JM	389	};
	390
	391	/* USB OTG */
	392	static int otg_phy_init(struct platform_device *pdev)
	393	{
4bd597b6	394	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
3b161e51 JM	395	}
3b161e51 JM	396
2eb42d5c UKK	397	static const struct mxc_usbh_platform_data
2eb42d5c UKK	398	visstrim_m10_usbotg_pdata __initconst = {
3b161e51 JM	399	.init = otg_phy_init,
3b161e51 JM	400	.portsc = MXC_EHCI_MODE_ULPI \| MXC_EHCI_UTMI_8BIT,
3b161e51 JM	401	};
3b161e51 JM	402
a5e2051b JM	403	/* SSI */
	404	static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
	405	.flags = IMX_SSI_DMA \| IMX_SSI_SYN,
	406	};
	407
435ca241 JM	408	static void __init visstrim_m10_revision(void)
	409	{
	410	int exp_version = 0;
	411	int mo_version = 0;
	412	int ret;
	413
	414	ret = gpio_request_array(visstrim_m10_version_gpios,
	415	ARRAY_SIZE(visstrim_m10_version_gpios));
	416	if (ret) {
	417	pr_err("Failed to request version gpios");
	418	return;
	419	}
	420
	421	/* Get expansion board version (negative logic) */
	422	exp_version \|= !gpio_get_value(EXPBOARD_BIT2) << 2;
	423	exp_version \|= !gpio_get_value(EXPBOARD_BIT1) << 1;
	424	exp_version \|= !gpio_get_value(EXPBOARD_BIT0);
	425
	426	/* Get mother board version (negative logic) */
	427	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
	428	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
	429	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT0);
	430
	431	system_rev = 0x27000;
	432	system_rev \|= (mo_version << 4);
	433	system_rev \|= exp_version;
	434	}
	435
3b161e51 JM	436	static void __init visstrim_m10_board_init(void)
	437	{
	438	int ret;
	439
b78d8e59	440	imx27_soc_init();
435ca241	441	visstrim_m10_revision();
b78d8e59	442
3b161e51 JM	443	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
	444	ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
	445	if (ret)
	446	pr_err("Failed to setup pins (%d)\n", ret);
	447
18847b42 JM	448	ret = gpio_request_array(visstrim_m10_gpios,
	449	ARRAY_SIZE(visstrim_m10_gpios));
	450	if (ret)
	451	pr_err("Failed to request gpios (%d)\n", ret);
	452
a5e2051b	453	imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
3b161e51 JM	454	imx27_add_imx_uart0(&uart_pdata);
3b161e51 JM	455
77a406da UKK	456	imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
77a406da UKK	457	imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
baa1dee1 JM	458	i2c_register_board_info(0, visstrim_m10_i2c_devices,
	459	ARRAY_SIZE(visstrim_m10_i2c_devices));
	460
9d3d945a	461	imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
2eb42d5c	462	imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
6bd96f3c	463	imx27_add_fec(NULL);
5309498a	464	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
3b161e51	465	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
5ec65ee5	466	imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
f52f5a55 JM	467	platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
f52f5a55 JM	468	&iclink_tvp5150, sizeof(iclink_tvp5150));
acb6464c	469	gpio_led_register_device(0, &visstrim_m10_led_data);
f52f5a55	470	visstrim_camera_init();
3b161e51 JM	471	}
	472
	473	static void __init visstrim_m10_timer_init(void)
	474	{
	475	mx27_clocks_init((unsigned long)25000000);
	476	}
	477
	478	static struct sys_timer visstrim_m10_timer = {
	479	.init = visstrim_m10_timer_init,
	480	};
	481
	482	MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
dc8f1907	483	.atag_offset = 0x100,
f52f5a55	484	.reserve = visstrim_reserve,
3dac2196 UKK	485	.map_io = mx27_map_io,
	486	.init_early = imx27_init_early,
	487	.init_irq = mx27_init_irq,
ffa2ea3f	488	.handle_irq = imx27_handle_irq,
3dac2196 UKK	489	.timer = &visstrim_m10_timer,
3dac2196 UKK	490	.init_machine = visstrim_m10_board_init,
65ea7884	491	.restart = mxc_restart,
3b161e51	492	MACHINE_END