[deliverable/linux.git] / arch / arm / mach-imx / mach-imx27_visstrim_m10.c

/*
 * mach-imx27_visstrim_m10.c
 *
 * Copyright 2010  Javier Martin <javier.martin@vista-silicon.com>
 *
 * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <sound/tlv320aic32x4.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/common.h>
#include <mach/iomux-mx27.h>

#include "devices-imx27.h"

#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
#define SDHC1_IRQ IRQ_GPIOB(25)

static const int visstrim_m10_pins[] __initconst = {
	/* UART1 (console) */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* SDHC1 */
	PE18_PF_SD1_D0,
	PE19_PF_SD1_D1,
	PE20_PF_SD1_D2,
	PE21_PF_SD1_D3,
	PE22_PF_SD1_CMD,
	PE23_PF_SD1_CLK,
	/* Both I2Cs */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* USB OTG */
	OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
	PC9_PF_USBOTG_DATA0,
	PC11_PF_USBOTG_DATA1,
	PC10_PF_USBOTG_DATA2,
	PC13_PF_USBOTG_DATA3,
	PC12_PF_USBOTG_DATA4,
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PE25_PF_USBOTG_DATA7,
	PE24_PF_USBOTG_CLK,
	PE2_PF_USBOTG_DIR,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PB23_PF_USB_PWR,
	PB24_PF_USB_OC,
};

/* GPIOs used as events for applications */
static struct gpio_keys_button visstrim_gpio_keys[] = {
	{
		.type	= EV_KEY,
		.code	= KEY_RESTART,
		.gpio	= (GPIO_PORTC + 15),
		.desc	= "Default config",
		.active_low = 0,
		.wakeup = 1,
	},
	{
		.type	= EV_KEY,
		.code	= KEY_RECORD,
		.gpio	= (GPIO_PORTF + 14),
		.desc	= "Record",
		.active_low = 0,
		.wakeup = 1,
	},
	{
		.type   = EV_KEY,
		.code   = KEY_STOP,
		.gpio   = (GPIO_PORTF + 13),
		.desc   = "Stop",
		.active_low = 0,
		.wakeup = 1,
	}
};

static const struct gpio_keys_platform_data
		visstrim_gpio_keys_platform_data __initconst = {
	.buttons	= visstrim_gpio_keys,
	.nbuttons	= ARRAY_SIZE(visstrim_gpio_keys),
};

/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
static int visstrim_m10_sdhc1_init(struct device *dev,
		irq_handler_t detect_irq, void *data)
{
	int ret;

	ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
				"mmc-detect", data);
	return ret;
}

static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(SDHC1_IRQ, data);
}

static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
	.init = visstrim_m10_sdhc1_init,
	.exit = visstrim_m10_sdhc1_exit,
};

/* Visstrim_SM10 NOR flash */
static struct physmap_flash_data visstrim_m10_flash_data = {
	.width = 2,
};

static struct resource visstrim_m10_flash_resource = {
	.start = 0xc0000000,
	.end = 0xc0000000 + SZ_64M - 1,
	.flags = IORESOURCE_MEM,
};

static struct platform_device visstrim_m10_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &visstrim_m10_flash_data,
	},
	.num_resources = 1,
	.resource = &visstrim_m10_flash_resource,
};

static struct platform_device *platform_devices[] __initdata = {
	&visstrim_m10_nor_mtd_device,
};

/* Visstrim_M10 uses UART0 as console */
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/* I2C */
static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
	.bitrate = 100000,
};

static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
	.gpio_base = 240, /* After MX27 internal GPIOs */
	.invert = 0,
};

static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
	.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
		     AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
		     AIC32X4_PWR_AIC32X4_LDO_ENABLE |
		     AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
		     AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
	.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
			 AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
	.swapdacs = false,
};

static struct i2c_board_info visstrim_m10_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pca9555", 0x20),
		.platform_data = &visstrim_m10_pca9555_pdata,
	},
	{
		I2C_BOARD_INFO("tlv320aic32x4", 0x18),
		.platform_data = &visstrim_m10_aic32x4_pdata,
	}
};

/* USB OTG */
static int otg_phy_init(struct platform_device *pdev)
{
	gpio_set_value(OTG_PHY_CS_GPIO, 0);

	mdelay(10);

	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}

static const struct mxc_usbh_platform_data
visstrim_m10_usbotg_pdata __initconst = {
	.init = otg_phy_init,
	.portsc	= MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};

/* SSI */
static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
	.flags			= IMX_SSI_DMA | IMX_SSI_SYN,
};

static void __init visstrim_m10_board_init(void)
{
	int ret;

	imx27_soc_init();

	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
			ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
	if (ret)
		pr_err("Failed to setup pins (%d)\n", ret);

	imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
	imx27_add_imx_uart0(&uart_pdata);

	i2c_register_board_info(0, visstrim_m10_i2c_devices,
				ARRAY_SIZE(visstrim_m10_i2c_devices));
	imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
	imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
	imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
	imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
	imx27_add_fec(NULL);
	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}

static void __init visstrim_m10_timer_init(void)
{
	mx27_clocks_init((unsigned long)25000000);
}

static struct sys_timer visstrim_m10_timer = {
	.init	= visstrim_m10_timer_init,
};

MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
	.atag_offset = 0x100,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.handle_irq = imx27_handle_irq,
	.timer = &visstrim_m10_timer,
	.init_machine = visstrim_m10_board_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
3b161e51 JM	1	/*
	2	* mach-imx27_visstrim_m10.c
	3	*
	4	* Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
	5	*
	6	* Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	21	* MA 02110-1301, USA.
	22	*/
	23
	24	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	25
	26	#include <linux/platform_device.h>
	27	#include <linux/mtd/physmap.h>
	28	#include <linux/i2c.h>
	29	#include <linux/i2c/pca953x.h>
3b161e51 JM	30	#include <linux/input.h>
3b161e51 JM	31	#include <linux/gpio.h>
4bd597b6	32	#include <linux/delay.h>
c86566bb	33	#include <sound/tlv320aic32x4.h>
3b161e51 JM	34	#include <asm/mach-types.h>
	35	#include <asm/mach/arch.h>
	36	#include <asm/mach/time.h>
	37	#include <mach/common.h>
c0450dff	38	#include <mach/iomux-mx27.h>
3b161e51 JM	39
3b161e51 JM	40	#include "devices-imx27.h"
3b161e51 JM	41
	42	#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
	43	#define SDHC1_IRQ IRQ_GPIOB(25)
	44
6c80ee51	45	static const int visstrim_m10_pins[] __initconst = {
3b161e51 JM	46	/* UART1 (console) */
	47	PE12_PF_UART1_TXD,
	48	PE13_PF_UART1_RXD,
	49	PE14_PF_UART1_CTS,
	50	PE15_PF_UART1_RTS,
	51	/* FEC */
	52	PD0_AIN_FEC_TXD0,
	53	PD1_AIN_FEC_TXD1,
	54	PD2_AIN_FEC_TXD2,
	55	PD3_AIN_FEC_TXD3,
	56	PD4_AOUT_FEC_RX_ER,
	57	PD5_AOUT_FEC_RXD1,
	58	PD6_AOUT_FEC_RXD2,
	59	PD7_AOUT_FEC_RXD3,
	60	PD8_AF_FEC_MDIO,
	61	PD9_AIN_FEC_MDC,
	62	PD10_AOUT_FEC_CRS,
	63	PD11_AOUT_FEC_TX_CLK,
	64	PD12_AOUT_FEC_RXD0,
	65	PD13_AOUT_FEC_RX_DV,
	66	PD14_AOUT_FEC_RX_CLK,
	67	PD15_AOUT_FEC_COL,
	68	PD16_AIN_FEC_TX_ER,
	69	PF23_AIN_FEC_TX_EN,
a5e2051b JM	70	/* SSI1 */
	71	PC20_PF_SSI1_FS,
	72	PC21_PF_SSI1_RXD,
	73	PC22_PF_SSI1_TXD,
	74	PC23_PF_SSI1_CLK,
3b161e51 JM	75	/* SDHC1 */
	76	PE18_PF_SD1_D0,
	77	PE19_PF_SD1_D1,
	78	PE20_PF_SD1_D2,
	79	PE21_PF_SD1_D3,
	80	PE22_PF_SD1_CMD,
	81	PE23_PF_SD1_CLK,
	82	/* Both I2Cs */
	83	PD17_PF_I2C_DATA,
	84	PD18_PF_I2C_CLK,
	85	PC5_PF_I2C2_SDA,
	86	PC6_PF_I2C2_SCL,
	87	/* USB OTG */
	88	OTG_PHY_CS_GPIO \| GPIO_GPIO \| GPIO_OUT,
	89	PC9_PF_USBOTG_DATA0,
	90	PC11_PF_USBOTG_DATA1,
	91	PC10_PF_USBOTG_DATA2,
	92	PC13_PF_USBOTG_DATA3,
	93	PC12_PF_USBOTG_DATA4,
	94	PC7_PF_USBOTG_DATA5,
	95	PC8_PF_USBOTG_DATA6,
	96	PE25_PF_USBOTG_DATA7,
	97	PE24_PF_USBOTG_CLK,
	98	PE2_PF_USBOTG_DIR,
	99	PE0_PF_USBOTG_NXT,
	100	PE1_PF_USBOTG_STP,
	101	PB23_PF_USB_PWR,
	102	PB24_PF_USB_OC,
	103	};
	104
	105	/* GPIOs used as events for applications */
	106	static struct gpio_keys_button visstrim_gpio_keys[] = {
	107	{
	108	.type = EV_KEY,
	109	.code = KEY_RESTART,
	110	.gpio = (GPIO_PORTC + 15),
	111	.desc = "Default config",
	112	.active_low = 0,
	113	.wakeup = 1,
	114	},
	115	{
	116	.type = EV_KEY,
	117	.code = KEY_RECORD,
	118	.gpio = (GPIO_PORTF + 14),
	119	.desc = "Record",
	120	.active_low = 0,
	121	.wakeup = 1,
	122	},
	123	{
	124	.type = EV_KEY,
	125	.code = KEY_STOP,
	126	.gpio = (GPIO_PORTF + 13),
	127	.desc = "Stop",
	128	.active_low = 0,
	129	.wakeup = 1,
	130	}
	131	};
	132
5309498a UKK	133	static const struct gpio_keys_platform_data
5309498a UKK	134	visstrim_gpio_keys_platform_data __initconst = {
3b161e51 JM	135	.buttons = visstrim_gpio_keys,
	136	.nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
	137	};
	138
3b161e51 JM	139	/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
	140	static int visstrim_m10_sdhc1_init(struct device *dev,
	141	irq_handler_t detect_irq, void *data)
	142	{
	143	int ret;
	144
	145	ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
	146	"mmc-detect", data);
	147	return ret;
	148	}
	149
	150	static void visstrim_m10_sdhc1_exit(struct device dev, void data)
	151	{
	152	free_irq(SDHC1_IRQ, data);
	153	}
	154
9d3d945a	155	static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
3b161e51 JM	156	.init = visstrim_m10_sdhc1_init,
	157	.exit = visstrim_m10_sdhc1_exit,
	158	};
	159
	160	/* Visstrim_SM10 NOR flash */
	161	static struct physmap_flash_data visstrim_m10_flash_data = {
	162	.width = 2,
	163	};
	164
	165	static struct resource visstrim_m10_flash_resource = {
	166	.start = 0xc0000000,
	167	.end = 0xc0000000 + SZ_64M - 1,
	168	.flags = IORESOURCE_MEM,
	169	};
	170
	171	static struct platform_device visstrim_m10_nor_mtd_device = {
	172	.name = "physmap-flash",
	173	.id = 0,
	174	.dev = {
	175	.platform_data = &visstrim_m10_flash_data,
	176	},
	177	.num_resources = 1,
	178	.resource = &visstrim_m10_flash_resource,
	179	};
	180
	181	static struct platform_device *platform_devices[] __initdata = {
3b161e51	182	&visstrim_m10_nor_mtd_device,
3b161e51 JM	183	};
	184
	185	/* Visstrim_M10 uses UART0 as console */
	186	static const struct imxuart_platform_data uart_pdata __initconst = {
	187	.flags = IMXUART_HAVE_RTSCTS,
	188	};
	189
	190	/* I2C */
	191	static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
	192	.bitrate = 100000,
	193	};
	194
	195	static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
	196	.gpio_base = 240, /* After MX27 internal GPIOs */
	197	.invert = 0,
	198	};
	199
c86566bb JM	200	static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
	201	.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN \|
	202	AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE \|
	203	AIC32X4_PWR_AIC32X4_LDO_ENABLE \|
	204	AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 \|
	205	AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
	206	.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K \|
	207	AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
	208	.swapdacs = false,
	209	};
	210
3b161e51 JM	211	static struct i2c_board_info visstrim_m10_i2c_devices[] = {
	212	{
	213	I2C_BOARD_INFO("pca9555", 0x20),
	214	.platform_data = &visstrim_m10_pca9555_pdata,
	215	},
a5e2051b JM	216	{
a5e2051b JM	217	I2C_BOARD_INFO("tlv320aic32x4", 0x18),
c86566bb	218	.platform_data = &visstrim_m10_aic32x4_pdata,
a5e2051b	219	}
3b161e51 JM	220	};
	221
	222	/* USB OTG */
	223	static int otg_phy_init(struct platform_device *pdev)
	224	{
	225	gpio_set_value(OTG_PHY_CS_GPIO, 0);
4bd597b6 SH	226
	227	mdelay(10);
	228
	229	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
3b161e51 JM	230	}
3b161e51 JM	231
2eb42d5c UKK	232	static const struct mxc_usbh_platform_data
2eb42d5c UKK	233	visstrim_m10_usbotg_pdata __initconst = {
3b161e51 JM	234	.init = otg_phy_init,
3b161e51 JM	235	.portsc = MXC_EHCI_MODE_ULPI \| MXC_EHCI_UTMI_8BIT,
3b161e51 JM	236	};
3b161e51 JM	237
a5e2051b JM	238	/* SSI */
	239	static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
	240	.flags = IMX_SSI_DMA \| IMX_SSI_SYN,
	241	};
	242
3b161e51 JM	243	static void __init visstrim_m10_board_init(void)
	244	{
	245	int ret;
	246
b78d8e59 SG	247	imx27_soc_init();
b78d8e59 SG	248
3b161e51 JM	249	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
	250	ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
	251	if (ret)
	252	pr_err("Failed to setup pins (%d)\n", ret);
	253
a5e2051b	254	imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
3b161e51 JM	255	imx27_add_imx_uart0(&uart_pdata);
	256
	257	i2c_register_board_info(0, visstrim_m10_i2c_devices,
	258	ARRAY_SIZE(visstrim_m10_i2c_devices));
77a406da UKK	259	imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
77a406da UKK	260	imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
9d3d945a	261	imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
2eb42d5c	262	imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
6bd96f3c	263	imx27_add_fec(NULL);
5309498a	264	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
3b161e51 JM	265	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	266	}
	267
	268	static void __init visstrim_m10_timer_init(void)
	269	{
	270	mx27_clocks_init((unsigned long)25000000);
	271	}
	272
	273	static struct sys_timer visstrim_m10_timer = {
	274	.init = visstrim_m10_timer_init,
	275	};
	276
	277	MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
dc8f1907	278	.atag_offset = 0x100,
3dac2196 UKK	279	.map_io = mx27_map_io,
	280	.init_early = imx27_init_early,
	281	.init_irq = mx27_init_irq,
ffa2ea3f	282	.handle_irq = imx27_handle_irq,
3dac2196 UKK	283	.timer = &visstrim_m10_timer,
3dac2196 UKK	284	.init_machine = visstrim_m10_board_init,
65ea7884	285	.restart = mxc_restart,
3b161e51	286	MACHINE_END