[deliverable/linux.git] / arch / arm / mach-imx / mach-imx27_visstrim_m10.c

/*
 * mach-imx27_visstrim_m10.c
 *
 * Copyright 2010  Javier Martin <javier.martin@vista-silicon.com>
 *
 * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/leds.h>
#include <linux/memblock.h>
#include <media/soc_camera.h>
#include <sound/tlv320aic32x4.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/system_info.h>
#include <mach/common.h>
#include <mach/iomux-mx27.h>

#include "devices-imx27.h"

#define TVP5150_RSTN (GPIO_PORTC + 18)
#define TVP5150_PWDN (GPIO_PORTC + 19)
#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
#define SDHC1_IRQ IRQ_GPIOB(25)

#define MOTHERBOARD_BIT2	(GPIO_PORTD + 31)
#define MOTHERBOARD_BIT1	(GPIO_PORTD + 30)
#define MOTHERBOARD_BIT0	(GPIO_PORTD + 29)

#define EXPBOARD_BIT2		(GPIO_PORTD + 25)
#define EXPBOARD_BIT1		(GPIO_PORTD + 27)
#define EXPBOARD_BIT0		(GPIO_PORTD + 28)

static const int visstrim_m10_pins[] __initconst = {
	/* UART1 (console) */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* SDHC1 */
	PE18_PF_SD1_D0,
	PE19_PF_SD1_D1,
	PE20_PF_SD1_D2,
	PE21_PF_SD1_D3,
	PE22_PF_SD1_CMD,
	PE23_PF_SD1_CLK,
	/* Both I2Cs */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* USB OTG */
	OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
	PC9_PF_USBOTG_DATA0,
	PC11_PF_USBOTG_DATA1,
	PC10_PF_USBOTG_DATA2,
	PC13_PF_USBOTG_DATA3,
	PC12_PF_USBOTG_DATA4,
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PE25_PF_USBOTG_DATA7,
	PE24_PF_USBOTG_CLK,
	PE2_PF_USBOTG_DIR,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PB23_PF_USB_PWR,
	PB24_PF_USB_OC,
	/* CSI */
	TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
	TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
	PB10_PF_CSI_D0,
	PB11_PF_CSI_D1,
	PB12_PF_CSI_D2,
	PB13_PF_CSI_D3,
	PB14_PF_CSI_D4,
	PB15_PF_CSI_MCLK,
	PB16_PF_CSI_PIXCLK,
	PB17_PF_CSI_D5,
	PB18_PF_CSI_D6,
	PB19_PF_CSI_D7,
	PB20_PF_CSI_VSYNC,
	PB21_PF_CSI_HSYNC,
	/* mother board version */
	MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	/* expansion board version */
	EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
	EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
};

static struct gpio visstrim_m10_version_gpios[] = {
	{ EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
	{ EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
	{ EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
	{ MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
	{ MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
	{ MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
};

static const struct gpio visstrim_m10_gpios[] __initconst = {
	{
		.gpio = TVP5150_RSTN,
		.flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
		.label = "tvp5150_rstn",
	},
	{
		.gpio = TVP5150_PWDN,
		.flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
		.label = "tvp5150_pwdn",
	},
	{
		.gpio = OTG_PHY_CS_GPIO,
		.flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
		.label = "usbotg_cs",
	},
};

/* Camera */
static int visstrim_camera_power(struct device *dev, int on)
{
	gpio_set_value(TVP5150_PWDN, on);

	return 0;
};

static int visstrim_camera_reset(struct device *dev)
{
	gpio_set_value(TVP5150_RSTN, 0);
	ndelay(500);
	gpio_set_value(TVP5150_RSTN, 1);

	return 0;
};

static struct i2c_board_info visstrim_i2c_camera =  {
	I2C_BOARD_INFO("tvp5150", 0x5d),
};

static struct soc_camera_link iclink_tvp5150 = {
	.bus_id         = 0,
	.board_info     = &visstrim_i2c_camera,
	.i2c_adapter_id = 0,
	.power = visstrim_camera_power,
	.reset = visstrim_camera_reset,
};

static struct mx2_camera_platform_data visstrim_camera = {
	.flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
		 MX2_CAMERA_PCLK_SAMPLE_RISING,
	.clk = 100000,
};

static phys_addr_t mx2_camera_base __initdata;
#define MX2_CAMERA_BUF_SIZE SZ_8M

static void __init visstrim_camera_init(void)
{
	struct platform_device *pdev;
	int dma;

	gpio_set_value(TVP5150_PWDN, 1);
	ndelay(1);
	gpio_set_value(TVP5150_RSTN, 0);
	ndelay(500);
	gpio_set_value(TVP5150_RSTN, 1);
	ndelay(200000);

	pdev = imx27_add_mx2_camera(&visstrim_camera);
	if (IS_ERR(pdev))
		return;

	dma = dma_declare_coherent_memory(&pdev->dev,
				mx2_camera_base, mx2_camera_base,
				MX2_CAMERA_BUF_SIZE,
				DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
	if (!(dma & DMA_MEMORY_MAP))
		return;
}

static void __init visstrim_reserve(void)
{
	/* reserve 4 MiB for mx2-camera */
	mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE,
			MX2_CAMERA_BUF_SIZE);
	memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
}

/* GPIOs used as events for applications */
static struct gpio_keys_button visstrim_gpio_keys[] = {
	{
		.type	= EV_KEY,
		.code	= KEY_RESTART,
		.gpio	= (GPIO_PORTC + 15),
		.desc	= "Default config",
		.active_low = 0,
		.wakeup = 1,
	},
	{
		.type	= EV_KEY,
		.code	= KEY_RECORD,
		.gpio	= (GPIO_PORTF + 14),
		.desc	= "Record",
		.active_low = 0,
		.wakeup = 1,
	},
	{
		.type   = EV_KEY,
		.code   = KEY_STOP,
		.gpio   = (GPIO_PORTF + 13),
		.desc   = "Stop",
		.active_low = 0,
		.wakeup = 1,
	}
};

static const struct gpio_keys_platform_data
		visstrim_gpio_keys_platform_data __initconst = {
	.buttons	= visstrim_gpio_keys,
	.nbuttons	= ARRAY_SIZE(visstrim_gpio_keys),
};

/* led */
static const struct gpio_led visstrim_m10_leds[] __initconst = {
	{
		.name = "visstrim:ld0",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 29),
	},
	{
		.name = "visstrim:ld1",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 24),
	},
	{
		.name = "visstrim:ld2",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 28),
	},
	{
		.name = "visstrim:ld3",
		.default_trigger = "nand-disk",
		.gpio = (GPIO_PORTC + 25),
	},
};

static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
	.leds = visstrim_m10_leds,
	.num_leds = ARRAY_SIZE(visstrim_m10_leds),
};

/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
static int visstrim_m10_sdhc1_init(struct device *dev,
		irq_handler_t detect_irq, void *data)
{
	int ret;

	ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
				"mmc-detect", data);
	return ret;
}

static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(SDHC1_IRQ, data);
}

static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
	.init = visstrim_m10_sdhc1_init,
	.exit = visstrim_m10_sdhc1_exit,
};

/* Visstrim_SM10 NOR flash */
static struct physmap_flash_data visstrim_m10_flash_data = {
	.width = 2,
};

static struct resource visstrim_m10_flash_resource = {
	.start = 0xc0000000,
	.end = 0xc0000000 + SZ_64M - 1,
	.flags = IORESOURCE_MEM,
};

static struct platform_device visstrim_m10_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &visstrim_m10_flash_data,
	},
	.num_resources = 1,
	.resource = &visstrim_m10_flash_resource,
};

static struct platform_device *platform_devices[] __initdata = {
	&visstrim_m10_nor_mtd_device,
};

/* Visstrim_M10 uses UART0 as console */
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/* I2C */
static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
	.bitrate = 100000,
};

static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
	.gpio_base = 240, /* After MX27 internal GPIOs */
	.invert = 0,
};

static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
	.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
		     AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
		     AIC32X4_PWR_AIC32X4_LDO_ENABLE |
		     AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
		     AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
	.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
			 AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
	.swapdacs = false,
};

static struct i2c_board_info visstrim_m10_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pca9555", 0x20),
		.platform_data = &visstrim_m10_pca9555_pdata,
	},
	{
		I2C_BOARD_INFO("tlv320aic32x4", 0x18),
		.platform_data = &visstrim_m10_aic32x4_pdata,
	},
	{
		 I2C_BOARD_INFO("m41t00", 0x68),
	}
};

/* USB OTG */
static int otg_phy_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
}

static const struct mxc_usbh_platform_data
visstrim_m10_usbotg_pdata __initconst = {
	.init = otg_phy_init,
	.portsc	= MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};

/* SSI */
static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
	.flags			= IMX_SSI_DMA | IMX_SSI_SYN,
};

static void __init visstrim_m10_revision(void)
{
	int exp_version = 0;
	int mo_version = 0;
	int ret;

	ret = gpio_request_array(visstrim_m10_version_gpios,
				 ARRAY_SIZE(visstrim_m10_version_gpios));
	if (ret) {
		pr_err("Failed to request version gpios");
		return;
	}

	/* Get expansion board version (negative logic) */
	exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
	exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
	exp_version |= !gpio_get_value(EXPBOARD_BIT0);

	/* Get mother board version (negative logic) */
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
	mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);

	system_rev = 0x27000;
	system_rev |= (mo_version << 4);
	system_rev |= exp_version;
}

static void __init visstrim_m10_board_init(void)
{
	int ret;

	imx27_soc_init();
	visstrim_m10_revision();

	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
			ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
	if (ret)
		pr_err("Failed to setup pins (%d)\n", ret);

	ret = gpio_request_array(visstrim_m10_gpios,
				ARRAY_SIZE(visstrim_m10_gpios));
	if (ret)
		pr_err("Failed to request gpios (%d)\n", ret);

	imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
	imx27_add_imx_uart0(&uart_pdata);

	imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
	imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
	i2c_register_board_info(0, visstrim_m10_i2c_devices,
				ARRAY_SIZE(visstrim_m10_i2c_devices));

	imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
	imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
	imx27_add_fec(NULL);
	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
	platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
				      &iclink_tvp5150, sizeof(iclink_tvp5150));
	gpio_led_register_device(0, &visstrim_m10_led_data);
	visstrim_camera_init();
}

static void __init visstrim_m10_timer_init(void)
{
	mx27_clocks_init((unsigned long)25000000);
}

static struct sys_timer visstrim_m10_timer = {
	.init	= visstrim_m10_timer_init,
};

MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
	.atag_offset = 0x100,
	.reserve = visstrim_reserve,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.handle_irq = imx27_handle_irq,
	.timer = &visstrim_m10_timer,
	.init_machine = visstrim_m10_board_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
3b161e51 JM	1	/*
	2	* mach-imx27_visstrim_m10.c
	3	*
	4	* Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
	5	*
	6	* Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	21	* MA 02110-1301, USA.
	22	*/
	23
	24	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	25
	26	#include <linux/platform_device.h>
	27	#include <linux/mtd/physmap.h>
	28	#include <linux/i2c.h>
	29	#include <linux/i2c/pca953x.h>
3b161e51 JM	30	#include <linux/input.h>
3b161e51 JM	31	#include <linux/gpio.h>
4bd597b6	32	#include <linux/delay.h>
f52f5a55	33	#include <linux/dma-mapping.h>
acb6464c	34	#include <linux/leds.h>
f52f5a55 JM	35	#include <linux/memblock.h>
f52f5a55 JM	36	#include <media/soc_camera.h>
c86566bb	37	#include <sound/tlv320aic32x4.h>
3b161e51 JM	38	#include <asm/mach-types.h>
	39	#include <asm/mach/arch.h>
	40	#include <asm/mach/time.h>
396c89b3	41	#include <asm/system_info.h>
3b161e51	42	#include <mach/common.h>
c0450dff	43	#include <mach/iomux-mx27.h>
3b161e51 JM	44
3b161e51 JM	45	#include "devices-imx27.h"
3b161e51	46
f52f5a55 JM	47	#define TVP5150_RSTN (GPIO_PORTC + 18)
f52f5a55 JM	48	#define TVP5150_PWDN (GPIO_PORTC + 19)
3b161e51 JM	49	#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
	50	#define SDHC1_IRQ IRQ_GPIOB(25)
	51
435ca241 JM	52	#define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
	53	#define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
	54	#define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
	55
	56	#define EXPBOARD_BIT2 (GPIO_PORTD + 25)
	57	#define EXPBOARD_BIT1 (GPIO_PORTD + 27)
	58	#define EXPBOARD_BIT0 (GPIO_PORTD + 28)
	59
6c80ee51	60	static const int visstrim_m10_pins[] __initconst = {
3b161e51 JM	61	/* UART1 (console) */
	62	PE12_PF_UART1_TXD,
	63	PE13_PF_UART1_RXD,
	64	PE14_PF_UART1_CTS,
	65	PE15_PF_UART1_RTS,
	66	/* FEC */
	67	PD0_AIN_FEC_TXD0,
	68	PD1_AIN_FEC_TXD1,
	69	PD2_AIN_FEC_TXD2,
	70	PD3_AIN_FEC_TXD3,
	71	PD4_AOUT_FEC_RX_ER,
	72	PD5_AOUT_FEC_RXD1,
	73	PD6_AOUT_FEC_RXD2,
	74	PD7_AOUT_FEC_RXD3,
	75	PD8_AF_FEC_MDIO,
	76	PD9_AIN_FEC_MDC,
	77	PD10_AOUT_FEC_CRS,
	78	PD11_AOUT_FEC_TX_CLK,
	79	PD12_AOUT_FEC_RXD0,
	80	PD13_AOUT_FEC_RX_DV,
	81	PD14_AOUT_FEC_RX_CLK,
	82	PD15_AOUT_FEC_COL,
	83	PD16_AIN_FEC_TX_ER,
	84	PF23_AIN_FEC_TX_EN,
a5e2051b JM	85	/* SSI1 */
	86	PC20_PF_SSI1_FS,
	87	PC21_PF_SSI1_RXD,
	88	PC22_PF_SSI1_TXD,
	89	PC23_PF_SSI1_CLK,
3b161e51 JM	90	/* SDHC1 */
	91	PE18_PF_SD1_D0,
	92	PE19_PF_SD1_D1,
	93	PE20_PF_SD1_D2,
	94	PE21_PF_SD1_D3,
	95	PE22_PF_SD1_CMD,
	96	PE23_PF_SD1_CLK,
	97	/* Both I2Cs */
	98	PD17_PF_I2C_DATA,
	99	PD18_PF_I2C_CLK,
	100	PC5_PF_I2C2_SDA,
	101	PC6_PF_I2C2_SCL,
	102	/* USB OTG */
	103	OTG_PHY_CS_GPIO \| GPIO_GPIO \| GPIO_OUT,
	104	PC9_PF_USBOTG_DATA0,
	105	PC11_PF_USBOTG_DATA1,
	106	PC10_PF_USBOTG_DATA2,
	107	PC13_PF_USBOTG_DATA3,
	108	PC12_PF_USBOTG_DATA4,
	109	PC7_PF_USBOTG_DATA5,
	110	PC8_PF_USBOTG_DATA6,
	111	PE25_PF_USBOTG_DATA7,
	112	PE24_PF_USBOTG_CLK,
	113	PE2_PF_USBOTG_DIR,
	114	PE0_PF_USBOTG_NXT,
	115	PE1_PF_USBOTG_STP,
	116	PB23_PF_USB_PWR,
	117	PB24_PF_USB_OC,
f52f5a55	118	/* CSI */
18847b42 JM	119	TVP5150_RSTN \| GPIO_GPIO \| GPIO_OUT,
18847b42 JM	120	TVP5150_PWDN \| GPIO_GPIO \| GPIO_OUT,
f52f5a55 JM	121	PB10_PF_CSI_D0,
	122	PB11_PF_CSI_D1,
	123	PB12_PF_CSI_D2,
	124	PB13_PF_CSI_D3,
	125	PB14_PF_CSI_D4,
	126	PB15_PF_CSI_MCLK,
	127	PB16_PF_CSI_PIXCLK,
	128	PB17_PF_CSI_D5,
	129	PB18_PF_CSI_D6,
	130	PB19_PF_CSI_D7,
	131	PB20_PF_CSI_VSYNC,
	132	PB21_PF_CSI_HSYNC,
435ca241 JM	133	/* mother board version */
	134	MOTHERBOARD_BIT2 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	135	MOTHERBOARD_BIT1 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	136	MOTHERBOARD_BIT0 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	137	/* expansion board version */
	138	EXPBOARD_BIT2 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	139	EXPBOARD_BIT1 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	140	EXPBOARD_BIT0 \| GPIO_GPIO \| GPIO_IN \| GPIO_PUEN,
	141	};
	142
	143	static struct gpio visstrim_m10_version_gpios[] = {
	144	{ EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
	145	{ EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
	146	{ EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
	147	{ MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
	148	{ MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
	149	{ MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
3b161e51 JM	150	};
3b161e51 JM	151
18847b42 JM	152	static const struct gpio visstrim_m10_gpios[] __initconst = {
	153	{
	154	.gpio = TVP5150_RSTN,
	155	.flags = GPIOF_DIR_OUT \| GPIOF_INIT_HIGH,
	156	.label = "tvp5150_rstn",
	157	},
	158	{
	159	.gpio = TVP5150_PWDN,
	160	.flags = GPIOF_DIR_OUT \| GPIOF_INIT_LOW,
	161	.label = "tvp5150_pwdn",
	162	},
	163	{
	164	.gpio = OTG_PHY_CS_GPIO,
	165	.flags = GPIOF_DIR_OUT \| GPIOF_INIT_LOW,
	166	.label = "usbotg_cs",
	167	},
	168	};
	169
f52f5a55 JM	170	/* Camera */
	171	static int visstrim_camera_power(struct device *dev, int on)
	172	{
	173	gpio_set_value(TVP5150_PWDN, on);
	174
	175	return 0;
	176	};
	177
	178	static int visstrim_camera_reset(struct device *dev)
	179	{
	180	gpio_set_value(TVP5150_RSTN, 0);
	181	ndelay(500);
	182	gpio_set_value(TVP5150_RSTN, 1);
	183
	184	return 0;
	185	};
	186
	187	static struct i2c_board_info visstrim_i2c_camera = {
	188	I2C_BOARD_INFO("tvp5150", 0x5d),
	189	};
	190
	191	static struct soc_camera_link iclink_tvp5150 = {
	192	.bus_id = 0,
	193	.board_info = &visstrim_i2c_camera,
	194	.i2c_adapter_id = 0,
	195	.power = visstrim_camera_power,
	196	.reset = visstrim_camera_reset,
	197	};
	198
	199	static struct mx2_camera_platform_data visstrim_camera = {
	200	.flags = MX2_CAMERA_CCIR \| MX2_CAMERA_CCIR_INTERLACE \|
5ff203b5	201	MX2_CAMERA_PCLK_SAMPLE_RISING,
f52f5a55 JM	202	.clk = 100000,
	203	};
	204
	205	static phys_addr_t mx2_camera_base __initdata;
	206	#define MX2_CAMERA_BUF_SIZE SZ_8M
	207
	208	static void __init visstrim_camera_init(void)
	209	{
	210	struct platform_device *pdev;
	211	int dma;
	212
f52f5a55 JM	213	gpio_set_value(TVP5150_PWDN, 1);
	214	ndelay(1);
	215	gpio_set_value(TVP5150_RSTN, 0);
	216	ndelay(500);
	217	gpio_set_value(TVP5150_RSTN, 1);
	218	ndelay(200000);
	219
	220	pdev = imx27_add_mx2_camera(&visstrim_camera);
	221	if (IS_ERR(pdev))
	222	return;
	223
	224	dma = dma_declare_coherent_memory(&pdev->dev,
	225	mx2_camera_base, mx2_camera_base,
	226	MX2_CAMERA_BUF_SIZE,
	227	DMA_MEMORY_MAP \| DMA_MEMORY_EXCLUSIVE);
	228	if (!(dma & DMA_MEMORY_MAP))
	229	return;
	230	}
	231
	232	static void __init visstrim_reserve(void)
	233	{
	234	/* reserve 4 MiB for mx2-camera */
	235	mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE,
	236	MX2_CAMERA_BUF_SIZE);
	237	memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	238	memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
	239	}
	240
3b161e51 JM	241	/* GPIOs used as events for applications */
	242	static struct gpio_keys_button visstrim_gpio_keys[] = {
	243	{
	244	.type = EV_KEY,
	245	.code = KEY_RESTART,
	246	.gpio = (GPIO_PORTC + 15),
	247	.desc = "Default config",
	248	.active_low = 0,
	249	.wakeup = 1,
	250	},
	251	{
	252	.type = EV_KEY,
	253	.code = KEY_RECORD,
	254	.gpio = (GPIO_PORTF + 14),
	255	.desc = "Record",
	256	.active_low = 0,
	257	.wakeup = 1,
	258	},
	259	{
	260	.type = EV_KEY,
	261	.code = KEY_STOP,
	262	.gpio = (GPIO_PORTF + 13),
	263	.desc = "Stop",
	264	.active_low = 0,
	265	.wakeup = 1,
	266	}
	267	};
	268
5309498a UKK	269	static const struct gpio_keys_platform_data
5309498a UKK	270	visstrim_gpio_keys_platform_data __initconst = {
3b161e51 JM	271	.buttons = visstrim_gpio_keys,
	272	.nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
	273	};
	274
acb6464c JM	275	/* led */
	276	static const struct gpio_led visstrim_m10_leds[] __initconst = {
	277	{
	278	.name = "visstrim:ld0",
	279	.default_trigger = "nand-disk",
	280	.gpio = (GPIO_PORTC + 29),
	281	},
	282	{
	283	.name = "visstrim:ld1",
	284	.default_trigger = "nand-disk",
	285	.gpio = (GPIO_PORTC + 24),
	286	},
	287	{
	288	.name = "visstrim:ld2",
	289	.default_trigger = "nand-disk",
	290	.gpio = (GPIO_PORTC + 28),
	291	},
	292	{
	293	.name = "visstrim:ld3",
	294	.default_trigger = "nand-disk",
	295	.gpio = (GPIO_PORTC + 25),
	296	},
	297	};
	298
	299	static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
	300	.leds = visstrim_m10_leds,
	301	.num_leds = ARRAY_SIZE(visstrim_m10_leds),
	302	};
	303
3b161e51 JM	304	/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
	305	static int visstrim_m10_sdhc1_init(struct device *dev,
	306	irq_handler_t detect_irq, void *data)
	307	{
	308	int ret;
	309
	310	ret = request_irq(SDHC1_IRQ, detect_irq, IRQF_TRIGGER_FALLING,
	311	"mmc-detect", data);
	312	return ret;
	313	}
	314
	315	static void visstrim_m10_sdhc1_exit(struct device dev, void data)
	316	{
	317	free_irq(SDHC1_IRQ, data);
	318	}
	319
9d3d945a	320	static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
3b161e51 JM	321	.init = visstrim_m10_sdhc1_init,
	322	.exit = visstrim_m10_sdhc1_exit,
	323	};
	324
	325	/* Visstrim_SM10 NOR flash */
	326	static struct physmap_flash_data visstrim_m10_flash_data = {
	327	.width = 2,
	328	};
	329
	330	static struct resource visstrim_m10_flash_resource = {
	331	.start = 0xc0000000,
	332	.end = 0xc0000000 + SZ_64M - 1,
	333	.flags = IORESOURCE_MEM,
	334	};
	335
	336	static struct platform_device visstrim_m10_nor_mtd_device = {
	337	.name = "physmap-flash",
	338	.id = 0,
	339	.dev = {
	340	.platform_data = &visstrim_m10_flash_data,
	341	},
	342	.num_resources = 1,
	343	.resource = &visstrim_m10_flash_resource,
	344	};
	345
	346	static struct platform_device *platform_devices[] __initdata = {
3b161e51	347	&visstrim_m10_nor_mtd_device,
3b161e51 JM	348	};
	349
	350	/* Visstrim_M10 uses UART0 as console */
	351	static const struct imxuart_platform_data uart_pdata __initconst = {
	352	.flags = IMXUART_HAVE_RTSCTS,
	353	};
	354
	355	/* I2C */
	356	static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
	357	.bitrate = 100000,
	358	};
	359
	360	static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
	361	.gpio_base = 240, /* After MX27 internal GPIOs */
	362	.invert = 0,
	363	};
	364
c86566bb JM	365	static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
	366	.power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN \|
	367	AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE \|
	368	AIC32X4_PWR_AIC32X4_LDO_ENABLE \|
	369	AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 \|
	370	AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
	371	.micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K \|
	372	AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
	373	.swapdacs = false,
	374	};
	375
3b161e51 JM	376	static struct i2c_board_info visstrim_m10_i2c_devices[] = {
	377	{
	378	I2C_BOARD_INFO("pca9555", 0x20),
	379	.platform_data = &visstrim_m10_pca9555_pdata,
	380	},
a5e2051b JM	381	{
a5e2051b JM	382	I2C_BOARD_INFO("tlv320aic32x4", 0x18),
c86566bb	383	.platform_data = &visstrim_m10_aic32x4_pdata,
257b49c3 JM	384	},
	385	{
	386	I2C_BOARD_INFO("m41t00", 0x68),
a5e2051b	387	}
3b161e51 JM	388	};
	389
	390	/* USB OTG */
	391	static int otg_phy_init(struct platform_device *pdev)
	392	{
4bd597b6	393	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
3b161e51 JM	394	}
3b161e51 JM	395
2eb42d5c UKK	396	static const struct mxc_usbh_platform_data
2eb42d5c UKK	397	visstrim_m10_usbotg_pdata __initconst = {
3b161e51 JM	398	.init = otg_phy_init,
3b161e51 JM	399	.portsc = MXC_EHCI_MODE_ULPI \| MXC_EHCI_UTMI_8BIT,
3b161e51 JM	400	};
3b161e51 JM	401
a5e2051b JM	402	/* SSI */
	403	static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
	404	.flags = IMX_SSI_DMA \| IMX_SSI_SYN,
	405	};
	406
435ca241 JM	407	static void __init visstrim_m10_revision(void)
	408	{
	409	int exp_version = 0;
	410	int mo_version = 0;
	411	int ret;
	412
	413	ret = gpio_request_array(visstrim_m10_version_gpios,
	414	ARRAY_SIZE(visstrim_m10_version_gpios));
	415	if (ret) {
	416	pr_err("Failed to request version gpios");
	417	return;
	418	}
	419
	420	/* Get expansion board version (negative logic) */
	421	exp_version \|= !gpio_get_value(EXPBOARD_BIT2) << 2;
	422	exp_version \|= !gpio_get_value(EXPBOARD_BIT1) << 1;
	423	exp_version \|= !gpio_get_value(EXPBOARD_BIT0);
	424
	425	/* Get mother board version (negative logic) */
	426	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
	427	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
	428	mo_version \|= !gpio_get_value(MOTHERBOARD_BIT0);
	429
	430	system_rev = 0x27000;
	431	system_rev \|= (mo_version << 4);
	432	system_rev \|= exp_version;
	433	}
	434
3b161e51 JM	435	static void __init visstrim_m10_board_init(void)
	436	{
	437	int ret;
	438
b78d8e59	439	imx27_soc_init();
435ca241	440	visstrim_m10_revision();
b78d8e59	441
3b161e51 JM	442	ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
	443	ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
	444	if (ret)
	445	pr_err("Failed to setup pins (%d)\n", ret);
	446
18847b42 JM	447	ret = gpio_request_array(visstrim_m10_gpios,
	448	ARRAY_SIZE(visstrim_m10_gpios));
	449	if (ret)
	450	pr_err("Failed to request gpios (%d)\n", ret);
	451
a5e2051b	452	imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
3b161e51 JM	453	imx27_add_imx_uart0(&uart_pdata);
3b161e51 JM	454
77a406da UKK	455	imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
77a406da UKK	456	imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
baa1dee1 JM	457	i2c_register_board_info(0, visstrim_m10_i2c_devices,
	458	ARRAY_SIZE(visstrim_m10_i2c_devices));
	459
9d3d945a	460	imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
2eb42d5c	461	imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
6bd96f3c	462	imx27_add_fec(NULL);
5309498a	463	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
3b161e51	464	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
5ec65ee5	465	imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
f52f5a55 JM	466	platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
f52f5a55 JM	467	&iclink_tvp5150, sizeof(iclink_tvp5150));
acb6464c	468	gpio_led_register_device(0, &visstrim_m10_led_data);
f52f5a55	469	visstrim_camera_init();
3b161e51 JM	470	}
	471
	472	static void __init visstrim_m10_timer_init(void)
	473	{
	474	mx27_clocks_init((unsigned long)25000000);
	475	}
	476
	477	static struct sys_timer visstrim_m10_timer = {
	478	.init = visstrim_m10_timer_init,
	479	};
	480
	481	MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
dc8f1907	482	.atag_offset = 0x100,
f52f5a55	483	.reserve = visstrim_reserve,
3dac2196 UKK	484	.map_io = mx27_map_io,
	485	.init_early = imx27_init_early,
	486	.init_irq = mx27_init_irq,
ffa2ea3f	487	.handle_irq = imx27_handle_irq,
3dac2196 UKK	488	.timer = &visstrim_m10_timer,
3dac2196 UKK	489	.init_machine = visstrim_m10_board_init,
65ea7884	490	.restart = mxc_restart,
3b161e51	491	MACHINE_END