projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 9daaf31a SG |
1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. | |
| 3 | * Copyright 2011 Linaro Ltd. | |
| 4 | * | |
| 5 | * The code contained herein is licensed under the GNU General Public | |
| 6 | * License. You may obtain a copy of the GNU General Public License | |
| 7 | * Version 2 or later at the following locations: | |
| 8 | * | |
| 9 | * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | * http://www.gnu.org/copyleft/gpl.html | |
| 11 | */ | |
| 12 | ||
| ff4ab231 | 13 | #include <linux/io.h> |
| 9daaf31a | 14 | #include <linux/irq.h> |
| 9daaf31a SG |
15 | #include <linux/of_irq.h> |
| 16 | #include <linux/of_platform.h> | |
| 17 | #include <asm/mach/arch.h> | |
| 18 | #include <asm/mach/time.h> | |
| 9daaf31a | 19 | |
| e3372474 | 20 | #include "common.h" |
| ff4ab231 | 21 | #include "hardware.h" |
| e3372474 | 22 | |
| ff4ab231 SG |
23 | static void __init imx51_init_early(void) |
| 24 | { | |
| 25 | mxc_set_cpu_type(MXC_CPU_MX51); | |
| 26 | } | |
| 27 | ||
| 28 | /* | |
| 29 | * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by | |
| 30 | * the Freescale marketing division. However this did not remove the | |
| 31 | * hardware from the chip which still needs to be configured for proper | |
| 32 | * IPU support. | |
| 33 | */ | |
| 34 | #define MX51_MIPI_HSC_BASE 0x83fdc000 | |
| 35 | static void __init imx51_ipu_mipi_setup(void) | |
| 36 | { | |
| 37 | void __iomem *hsc_addr; | |
| 38 | ||
| 39 | hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K); | |
| 40 | WARN_ON(!hsc_addr); | |
| 41 | ||
| 42 | /* setup MIPI module to legacy mode */ | |
| 43 | __raw_writel(0xf00, hsc_addr); | |
| 44 | ||
| 45 | /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */ | |
| 46 | __raw_writel(__raw_readl(hsc_addr + 0x800) | 0x30ff, | |
| 47 | hsc_addr + 0x800); | |
| 48 | ||
| 49 | iounmap(hsc_addr); | |
| 50 | } | |
| 51 | ||
| 9daaf31a SG |
52 | static void __init imx51_dt_init(void) |
| 53 | { | |
| 371b3f18 MP |
54 | struct platform_device_info devinfo = { .name = "cpufreq-cpu0", }; |
| 55 | ||
| c1e31d12 | 56 | mxc_arch_reset_init_dt(); |
| ff4ab231 SG |
57 | imx51_ipu_mipi_setup(); |
| 58 | imx_src_init(); | |
| 18cb680f | 59 | |
| f40f38d1 | 60 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
| 371b3f18 | 61 | platform_device_register_full(&devinfo); |
| 9daaf31a SG |
62 | } |
| 63 | ||
| ff4ab231 SG |
64 | static void __init imx51_init_late(void) |
| 65 | { | |
| 66 | mx51_neon_fixup(); | |
| 67 | imx51_pm_init(); | |
| 68 | } | |
| 69 | ||
| 8756dd92 | 70 | static const char * const imx51_dt_board_compat[] __initconst = { |
| 3f8976d9 | 71 | "fsl,imx51", |
| 9daaf31a SG |
72 | NULL |
| 73 | }; | |
| 74 | ||
| 75 | DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)") | |
| 9daaf31a | 76 | .init_early = imx51_init_early, |
| fffa0512 | 77 | .init_irq = tzic_init_irq, |
| 9daaf31a | 78 | .init_machine = imx51_dt_init, |
| 8321b758 | 79 | .init_late = imx51_init_late, |
| 9daaf31a | 80 | .dt_compat = imx51_dt_board_compat, |
| 65ea7884 | 81 | .restart = mxc_restart, |
| 9daaf31a | 82 | MACHINE_END |