projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 13eed989 SG |
1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | * Copyright 2011 Linaro Ltd. | |
| 4 | * | |
| 5 | * The code contained herein is licensed under the GNU General Public | |
| 6 | * License. You may obtain a copy of the GNU General Public License | |
| 7 | * Version 2 or later at the following locations: | |
| 8 | * | |
| 9 | * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | * http://www.gnu.org/copyleft/gpl.html | |
| 11 | */ | |
| 12 | ||
| 13 | #include <linux/init.h> | |
| 14 | #include <linux/irq.h> | |
| 15 | #include <linux/irqdomain.h> | |
| 16 | #include <linux/of.h> | |
| 17 | #include <linux/of_irq.h> | |
| 18 | #include <linux/of_platform.h> | |
| 477fce49 RZ |
19 | #include <linux/phy.h> |
| 20 | #include <linux/micrel_phy.h> | |
| 13eed989 SG |
21 | #include <asm/hardware/cache-l2x0.h> |
| 22 | #include <asm/hardware/gic.h> | |
| 23 | #include <asm/mach/arch.h> | |
| 24 | #include <asm/mach/time.h> | |
| 25 | #include <mach/common.h> | |
| 26 | #include <mach/hardware.h> | |
| 27 | ||
| 477fce49 RZ |
28 | /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ |
| 29 | static int ksz9021rn_phy_fixup(struct phy_device *phydev) | |
| 30 | { | |
| 31 | /* min rx data delay */ | |
| 32 | phy_write(phydev, 0x0b, 0x8105); | |
| 33 | phy_write(phydev, 0x0c, 0x0000); | |
| 34 | ||
| 35 | /* max rx/tx clock delay, min rx/tx control delay */ | |
| 36 | phy_write(phydev, 0x0b, 0x8104); | |
| 37 | phy_write(phydev, 0x0c, 0xf0f0); | |
| 38 | phy_write(phydev, 0x0b, 0x104); | |
| 39 | ||
| 40 | return 0; | |
| 41 | } | |
| 42 | ||
| 13eed989 SG |
43 | static void __init imx6q_init_machine(void) |
| 44 | { | |
| 477fce49 RZ |
45 | if (of_machine_is_compatible("fsl,imx6q-sabrelite")) |
| 46 | phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, | |
| 47 | ksz9021rn_phy_fixup); | |
| 48 | ||
| 13eed989 SG |
49 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
| 50 | ||
| 51 | imx6q_pm_init(); | |
| 52 | } | |
| 53 | ||
| 54 | static void __init imx6q_map_io(void) | |
| 55 | { | |
| 56 | imx_lluart_map_io(); | |
| 57 | imx_scu_map_io(); | |
| f475058f | 58 | imx6q_clock_map_io(); |
| 13eed989 SG |
59 | } |
| 60 | ||
| 2a3267a4 | 61 | static int __init imx6q_gpio_add_irq_domain(struct device_node *np, |
| 13eed989 SG |
62 | struct device_node *interrupt_parent) |
| 63 | { | |
| 04aafd71 | 64 | static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS; |
| 13eed989 | 65 | |
| 04aafd71 | 66 | gpio_irq_base -= 32; |
| 13eed989 | 67 | irq_domain_add_simple(np, gpio_irq_base); |
| 2a3267a4 SG |
68 | |
| 69 | return 0; | |
| 13eed989 SG |
70 | } |
| 71 | ||
| 72 | static const struct of_device_id imx6q_irq_match[] __initconst = { | |
| 73 | { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, | |
| 74 | { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, }, | |
| 75 | { /* sentinel */ } | |
| 76 | }; | |
| 77 | ||
| 78 | static void __init imx6q_init_irq(void) | |
| 79 | { | |
| 80 | l2x0_of_init(0, ~0UL); | |
| 81 | imx_src_init(); | |
| 82 | imx_gpc_init(); | |
| 83 | of_irq_init(imx6q_irq_match); | |
| 84 | } | |
| 85 | ||
| 86 | static void __init imx6q_timer_init(void) | |
| 87 | { | |
| 88 | mx6q_clocks_init(); | |
| 89 | } | |
| 90 | ||
| 91 | static struct sys_timer imx6q_timer = { | |
| 92 | .init = imx6q_timer_init, | |
| 93 | }; | |
| 94 | ||
| 95 | static const char *imx6q_dt_compat[] __initdata = { | |
| 96 | "fsl,imx6q-sabreauto", | |
| 3c8276c6 | 97 | "fsl,imx6q-sabrelite", |
| 13eed989 SG |
98 | NULL, |
| 99 | }; | |
| 100 | ||
| 101 | DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)") | |
| 102 | .map_io = imx6q_map_io, | |
| 103 | .init_irq = imx6q_init_irq, | |
| 104 | .handle_irq = imx6q_handle_irq, | |
| 105 | .timer = &imx6q_timer, | |
| 106 | .init_machine = imx6q_init_machine, | |
| 107 | .dt_compat = imx6q_dt_compat, | |
| 108 | MACHINE_END |