ARM: highbank: convert to twd_local_timer_register() interface
[deliverable/linux.git] / arch / arm / mach-imx / mach-imx6q.c
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1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
0575fb75 13#include <linux/delay.h>
13eed989 14#include <linux/init.h>
0575fb75 15#include <linux/io.h>
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16#include <linux/irq.h>
17#include <linux/irqdomain.h>
18#include <linux/of.h>
0575fb75 19#include <linux/of_address.h>
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20#include <linux/of_irq.h>
21#include <linux/of_platform.h>
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22#include <linux/phy.h>
23#include <linux/micrel_phy.h>
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24#include <asm/hardware/cache-l2x0.h>
25#include <asm/hardware/gic.h>
26#include <asm/mach/arch.h>
27#include <asm/mach/time.h>
28#include <mach/common.h>
29#include <mach/hardware.h>
30
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31void imx6q_restart(char mode, const char *cmd)
32{
33 struct device_node *np;
34 void __iomem *wdog_base;
35
36 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
37 wdog_base = of_iomap(np, 0);
38 if (!wdog_base)
39 goto soft;
40
41 imx_src_prepare_restart();
42
43 /* enable wdog */
44 writew_relaxed(1 << 2, wdog_base);
45 /* write twice to ensure the request will not get ignored */
46 writew_relaxed(1 << 2, wdog_base);
47
48 /* wait for reset to assert ... */
49 mdelay(500);
50
51 pr_err("Watchdog reset failed to assert reset\n");
52
53 /* delay to allow the serial port to show the message */
54 mdelay(50);
55
56soft:
57 /* we'll take a jump through zero as a poor second */
58 soft_restart(0);
59}
60
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61/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
62static int ksz9021rn_phy_fixup(struct phy_device *phydev)
63{
64 /* min rx data delay */
65 phy_write(phydev, 0x0b, 0x8105);
66 phy_write(phydev, 0x0c, 0x0000);
67
68 /* max rx/tx clock delay, min rx/tx control delay */
69 phy_write(phydev, 0x0b, 0x8104);
70 phy_write(phydev, 0x0c, 0xf0f0);
71 phy_write(phydev, 0x0b, 0x104);
72
73 return 0;
74}
75
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76static void __init imx6q_init_machine(void)
77{
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78 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
79 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
80 ksz9021rn_phy_fixup);
81
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82 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
83
84 imx6q_pm_init();
85}
86
87static void __init imx6q_map_io(void)
88{
89 imx_lluart_map_io();
90 imx_scu_map_io();
f475058f 91 imx6q_clock_map_io();
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92}
93
2a3267a4 94static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
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95 struct device_node *interrupt_parent)
96{
04aafd71 97 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
13eed989 98
04aafd71 99 gpio_irq_base -= 32;
13eed989 100 irq_domain_add_simple(np, gpio_irq_base);
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101
102 return 0;
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103}
104
105static const struct of_device_id imx6q_irq_match[] __initconst = {
106 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
107 { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
108 { /* sentinel */ }
109};
110
111static void __init imx6q_init_irq(void)
112{
113 l2x0_of_init(0, ~0UL);
114 imx_src_init();
115 imx_gpc_init();
116 of_irq_init(imx6q_irq_match);
117}
118
119static void __init imx6q_timer_init(void)
120{
121 mx6q_clocks_init();
122}
123
124static struct sys_timer imx6q_timer = {
125 .init = imx6q_timer_init,
126};
127
128static const char *imx6q_dt_compat[] __initdata = {
752baf56 129 "fsl,imx6q-arm2",
3c8276c6 130 "fsl,imx6q-sabrelite",
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131 NULL,
132};
133
134DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
135 .map_io = imx6q_map_io,
136 .init_irq = imx6q_init_irq,
137 .handle_irq = imx6q_handle_irq,
138 .timer = &imx6q_timer,
139 .init_machine = imx6q_init_machine,
140 .dt_compat = imx6q_dt_compat,
0575fb75 141 .restart = imx6q_restart,
13eed989 142MACHINE_END
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