[deliverable/linux.git] / arch / arm / mach-imx / mach-imx6q.c

/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/cpuidle.h>
#include <linux/delay.h>
#include <linux/export.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/pinctrl/machine.h>
#include <linux/phy.h>
#include <linux/micrel_phy.h>
#include <linux/mfd/anatop.h>
#include <asm/cpuidle.h>
#include <asm/smp_twd.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/system_misc.h>
#include <mach/common.h>
#include <mach/cpuidle.h>
#include <mach/hardware.h>


void imx6q_restart(char mode, const char *cmd)
{
	struct device_node *np;
	void __iomem *wdog_base;

	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
	wdog_base = of_iomap(np, 0);
	if (!wdog_base)
		goto soft;

	imx_src_prepare_restart();

	/* enable wdog */
	writew_relaxed(1 << 2, wdog_base);
	/* write twice to ensure the request will not get ignored */
	writew_relaxed(1 << 2, wdog_base);

	/* wait for reset to assert ... */
	mdelay(500);

	pr_err("Watchdog reset failed to assert reset\n");

	/* delay to allow the serial port to show the message */
	mdelay(50);

soft:
	/* we'll take a jump through zero as a poor second */
	soft_restart(0);
}

/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
static int ksz9021rn_phy_fixup(struct phy_device *phydev)
{
	if (IS_ENABLED(CONFIG_PHYLIB)) {
		/* min rx data delay */
		phy_write(phydev, 0x0b, 0x8105);
		phy_write(phydev, 0x0c, 0x0000);

		/* max rx/tx clock delay, min rx/tx control delay */
		phy_write(phydev, 0x0b, 0x8104);
		phy_write(phydev, 0x0c, 0xf0f0);
		phy_write(phydev, 0x0b, 0x104);
	}

	return 0;
}

static void __init imx6q_sabrelite_cko1_setup(void)
{
	struct clk *cko1_sel, *ahb, *cko1;
	unsigned long rate;

	cko1_sel = clk_get_sys(NULL, "cko1_sel");
	ahb = clk_get_sys(NULL, "ahb");
	cko1 = clk_get_sys(NULL, "cko1");
	if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
		pr_err("cko1 setup failed!\n");
		goto put_clk;
	}
	clk_set_parent(cko1_sel, ahb);
	rate = clk_round_rate(cko1, 16000000);
	clk_set_rate(cko1, rate);
	clk_register_clkdev(cko1, NULL, "0-000a");
put_clk:
	if (!IS_ERR(cko1_sel))
		clk_put(cko1_sel);
	if (!IS_ERR(ahb))
		clk_put(ahb);
	if (!IS_ERR(cko1))
		clk_put(cko1);
}

static void __init imx6q_sabrelite_init(void)
{
	if (IS_ENABLED(CONFIG_PHYLIB))
		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
				ksz9021rn_phy_fixup);
	imx6q_sabrelite_cko1_setup();
}

static void __init imx6q_usb_init(void)
{
	struct device_node *np;
	struct platform_device *pdev = NULL;
	struct anatop *adata = NULL;

	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
	if (np)
		pdev = of_find_device_by_node(np);
	if (pdev)
		adata = platform_get_drvdata(pdev);
	if (!adata) {
		if (np)
			of_node_put(np);
		return;
	}

#define HW_ANADIG_USB1_CHRG_DETECT		0x000001b0
#define HW_ANADIG_USB2_CHRG_DETECT		0x00000210

#define BM_ANADIG_USB_CHRG_DETECT_EN_B		0x00100000
#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B	0x00080000

	/*
	 * The external charger detector needs to be disabled,
	 * or the signal at DP will be poor
	 */
	anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT,
			BM_ANADIG_USB_CHRG_DETECT_EN_B
			| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
			~0);
	anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT,
			BM_ANADIG_USB_CHRG_DETECT_EN_B |
			BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
			~0);

	of_node_put(np);
}

static void __init imx6q_init_machine(void)
{
	/*
	 * This should be removed when all imx6q boards have pinctrl
	 * states for devices defined in device tree.
	 */
	pinctrl_provide_dummies();

	if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
		imx6q_sabrelite_init();

	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);

	imx6q_pm_init();
	imx6q_usb_init();
}

static struct cpuidle_driver imx6q_cpuidle_driver = {
	.name			= "imx6q_cpuidle",
	.owner			= THIS_MODULE,
	.en_core_tk_irqen	= 1,
	.states[0]		= ARM_CPUIDLE_WFI_STATE,
	.state_count		= 1,
};

static void __init imx6q_init_late(void)
{
	imx_cpuidle_init(&imx6q_cpuidle_driver);
}

static void __init imx6q_map_io(void)
{
	imx_lluart_map_io();
	imx_scu_map_io();
	imx6q_clock_map_io();
}

static const struct of_device_id imx6q_irq_match[] __initconst = {
	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
	{ /* sentinel */ }
};

static void __init imx6q_init_irq(void)
{
	l2x0_of_init(0, ~0UL);
	imx_src_init();
	imx_gpc_init();
	of_irq_init(imx6q_irq_match);
}

static void __init imx6q_timer_init(void)
{
	mx6q_clocks_init();
	twd_local_timer_of_register();
}

static struct sys_timer imx6q_timer = {
	.init = imx6q_timer_init,
};

static const char *imx6q_dt_compat[] __initdata = {
	"fsl,imx6q-arm2",
	"fsl,imx6q-sabrelite",
	"fsl,imx6q-sabresd",
	"fsl,imx6q",
	NULL,
};

DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
	.map_io		= imx6q_map_io,
	.init_irq	= imx6q_init_irq,
	.handle_irq	= imx6q_handle_irq,
	.timer		= &imx6q_timer,
	.init_machine	= imx6q_init_machine,
	.init_late      = imx6q_init_late,
	.dt_compat	= imx6q_dt_compat,
	.restart	= imx6q_restart,
MACHINE_END
Commit	Line	Data
13eed989 SG	1	/*
	2	* Copyright 2011 Freescale Semiconductor, Inc.
	3	* Copyright 2011 Linaro Ltd.
	4	*
	5	* The code contained herein is licensed under the GNU General Public
	6	* License. You may obtain a copy of the GNU General Public License
	7	* Version 2 or later at the following locations:
	8	*
	9	* http://www.opensource.org/licenses/gpl-license.html
	10	* http://www.gnu.org/copyleft/gpl.html
	11	*/
	12
a258561d RZ	13	#include <linux/clk.h>
a258561d RZ	14	#include <linux/clkdev.h>
b9d18dc3	15	#include <linux/cpuidle.h>
0575fb75	16	#include <linux/delay.h>
b9d18dc3	17	#include <linux/export.h>
13eed989	18	#include <linux/init.h>
0575fb75	19	#include <linux/io.h>
13eed989	20	#include <linux/irq.h>
13eed989	21	#include <linux/of.h>
0575fb75	22	#include <linux/of_address.h>
13eed989 SG	23	#include <linux/of_irq.h>
13eed989 SG	24	#include <linux/of_platform.h>
a2aa65a3	25	#include <linux/pinctrl/machine.h>
477fce49 RZ	26	#include <linux/phy.h>
477fce49 RZ	27	#include <linux/micrel_phy.h>
396bf1c2	28	#include <linux/mfd/anatop.h>
b9d18dc3	29	#include <asm/cpuidle.h>
58458e03	30	#include <asm/smp_twd.h>
13eed989 SG	31	#include <asm/hardware/cache-l2x0.h>
	32	#include <asm/hardware/gic.h>
	33	#include <asm/mach/arch.h>
	34	#include <asm/mach/time.h>
9f97da78	35	#include <asm/system_misc.h>
13eed989	36	#include <mach/common.h>
b9d18dc3	37	#include <mach/cpuidle.h>
13eed989 SG	38	#include <mach/hardware.h>
13eed989 SG	39
b9d18dc3	40
0575fb75 SG	41	void imx6q_restart(char mode, const char *cmd)
	42	{
	43	struct device_node *np;
	44	void __iomem *wdog_base;
	45
	46	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
	47	wdog_base = of_iomap(np, 0);
	48	if (!wdog_base)
	49	goto soft;
	50
	51	imx_src_prepare_restart();
	52
	53	/* enable wdog */
	54	writew_relaxed(1 << 2, wdog_base);
	55	/* write twice to ensure the request will not get ignored */
	56	writew_relaxed(1 << 2, wdog_base);
	57
	58	/* wait for reset to assert ... */
	59	mdelay(500);
	60
	61	pr_err("Watchdog reset failed to assert reset\n");
	62
	63	/* delay to allow the serial port to show the message */
	64	mdelay(50);
	65
	66	soft:
	67	/* we'll take a jump through zero as a poor second */
	68	soft_restart(0);
	69	}
	70
477fce49 RZ	71	/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
	72	static int ksz9021rn_phy_fixup(struct phy_device *phydev)
	73	{
ef441806 SG	74	if (IS_ENABLED(CONFIG_PHYLIB)) {
	75	/* min rx data delay */
	76	phy_write(phydev, 0x0b, 0x8105);
	77	phy_write(phydev, 0x0c, 0x0000);
477fce49	78
ef441806 SG	79	/* max rx/tx clock delay, min rx/tx control delay */
	80	phy_write(phydev, 0x0b, 0x8104);
	81	phy_write(phydev, 0x0c, 0xf0f0);
	82	phy_write(phydev, 0x0b, 0x104);
	83	}
477fce49 RZ	84
	85	return 0;
	86	}
	87
a258561d RZ	88	static void __init imx6q_sabrelite_cko1_setup(void)
	89	{
	90	struct clk cko1_sel, ahb, *cko1;
	91	unsigned long rate;
	92
	93	cko1_sel = clk_get_sys(NULL, "cko1_sel");
	94	ahb = clk_get_sys(NULL, "ahb");
	95	cko1 = clk_get_sys(NULL, "cko1");
	96	if (IS_ERR(cko1_sel) \|\| IS_ERR(ahb) \|\| IS_ERR(cko1)) {
	97	pr_err("cko1 setup failed!\n");
	98	goto put_clk;
	99	}
	100	clk_set_parent(cko1_sel, ahb);
	101	rate = clk_round_rate(cko1, 16000000);
	102	clk_set_rate(cko1, rate);
	103	clk_register_clkdev(cko1, NULL, "0-000a");
	104	put_clk:
	105	if (!IS_ERR(cko1_sel))
	106	clk_put(cko1_sel);
	107	if (!IS_ERR(ahb))
	108	clk_put(ahb);
	109	if (!IS_ERR(cko1))
	110	clk_put(cko1);
	111	}
	112
071dea50 RZ	113	static void __init imx6q_sabrelite_init(void)
071dea50 RZ	114	{
ef441806 SG	115	if (IS_ENABLED(CONFIG_PHYLIB))
ef441806 SG	116	phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
071dea50	117	ksz9021rn_phy_fixup);
a258561d	118	imx6q_sabrelite_cko1_setup();
071dea50 RZ	119	}
071dea50 RZ	120
396bf1c2 RZ	121	static void __init imx6q_usb_init(void)
	122	{
	123	struct device_node *np;
	124	struct platform_device *pdev = NULL;
	125	struct anatop *adata = NULL;
	126
	127	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
	128	if (np)
	129	pdev = of_find_device_by_node(np);
	130	if (pdev)
	131	adata = platform_get_drvdata(pdev);
	132	if (!adata) {
	133	if (np)
	134	of_node_put(np);
	135	return;
	136	}
	137
	138	#define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
	139	#define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
	140
	141	#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
	142	#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
	143
	144	/*
	145	* The external charger detector needs to be disabled,
	146	* or the signal at DP will be poor
	147	*/
	148	anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT,
	149	BM_ANADIG_USB_CHRG_DETECT_EN_B
	150	\| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
	151	~0);
	152	anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT,
	153	BM_ANADIG_USB_CHRG_DETECT_EN_B \|
	154	BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
	155	~0);
	156
	157	of_node_put(np);
	158	}
	159
13eed989 SG	160	static void __init imx6q_init_machine(void)
13eed989 SG	161	{
a2aa65a3 DA	162	/*
	163	* This should be removed when all imx6q boards have pinctrl
	164	* states for devices defined in device tree.
	165	*/
	166	pinctrl_provide_dummies();
	167
477fce49	168	if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
071dea50	169	imx6q_sabrelite_init();
477fce49	170
13eed989 SG	171	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
	172
	173	imx6q_pm_init();
396bf1c2	174	imx6q_usb_init();
13eed989 SG	175	}
13eed989 SG	176
b9d18dc3 RL	177	static struct cpuidle_driver imx6q_cpuidle_driver = {
	178	.name = "imx6q_cpuidle",
	179	.owner = THIS_MODULE,
	180	.en_core_tk_irqen = 1,
	181	.states[0] = ARM_CPUIDLE_WFI_STATE,
	182	.state_count = 1,
	183	};
	184
	185	static void __init imx6q_init_late(void)
	186	{
	187	imx_cpuidle_init(&imx6q_cpuidle_driver);
	188	}
	189
13eed989 SG	190	static void __init imx6q_map_io(void)
	191	{
	192	imx_lluart_map_io();
	193	imx_scu_map_io();
f475058f	194	imx6q_clock_map_io();
13eed989 SG	195	}
13eed989 SG	196
13eed989 SG	197	static const struct of_device_id imx6q_irq_match[] __initconst = {
13eed989 SG	198	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
13eed989 SG	199	{ /* sentinel */ }
	200	};
	201
	202	static void __init imx6q_init_irq(void)
	203	{
	204	l2x0_of_init(0, ~0UL);
	205	imx_src_init();
	206	imx_gpc_init();
	207	of_irq_init(imx6q_irq_match);
	208	}
	209
	210	static void __init imx6q_timer_init(void)
	211	{
	212	mx6q_clocks_init();
58458e03	213	twd_local_timer_of_register();
13eed989 SG	214	}
	215
	216	static struct sys_timer imx6q_timer = {
	217	.init = imx6q_timer_init,
	218	};
	219
	220	static const char *imx6q_dt_compat[] __initdata = {
752baf56	221	"fsl,imx6q-arm2",
3c8276c6	222	"fsl,imx6q-sabrelite",
691d2640	223	"fsl,imx6q-sabresd",
3f8976d9	224	"fsl,imx6q",
13eed989 SG	225	NULL,
	226	};
	227
	228	DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
	229	.map_io = imx6q_map_io,
	230	.init_irq = imx6q_init_irq,
	231	.handle_irq = imx6q_handle_irq,
	232	.timer = &imx6q_timer,
	233	.init_machine = imx6q_init_machine,
b9d18dc3	234	.init_late = imx6q_init_late,
13eed989	235	.dt_compat = imx6q_dt_compat,
0575fb75	236	.restart = imx6q_restart,
13eed989	237	MACHINE_END