ARM: imx6ul: add fec bits to GPR syscon definition
[deliverable/linux.git] / arch / arm / mach-imx / mach-imx6ul.c
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022d0716
FL
1/*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include <linux/irqchip.h>
9#include <linux/of_platform.h>
10#include <asm/mach/arch.h>
11#include <asm/mach/map.h>
12
13#include "common.h"
14
15static void __init imx6ul_init_machine(void)
16{
17 struct device *parent;
18
19 parent = imx_soc_device_init();
20 if (parent == NULL)
21 pr_warn("failed to initialize soc device\n");
22
23 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
24 imx_anatop_init();
25}
26
27static void __init imx6ul_init_irq(void)
28{
29 imx_init_revision_from_anatop();
30 imx_src_init();
31 irqchip_init();
32}
33
34static const char *imx6ul_dt_compat[] __initconst = {
35 "fsl,imx6ul",
36 NULL,
37};
38
39DT_MACHINE_START(IMX6UL, "Freescale i.MX6 Ultralite (Device Tree)")
40 .init_irq = imx6ul_init_irq,
41 .init_machine = imx6ul_init_machine,
42 .dt_compat = imx6ul_dt_compat,
43MACHINE_END
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