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ec9be0de FE |
1 | /* |
2 | * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * Author: Fabio Estevam <fabio.estevam@freescale.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
ec9be0de FE |
15 | */ |
16 | ||
8fdca37a UKK |
17 | /* |
18 | * This machine is known as: | |
19 | * - i.MX27 3-Stack Development System | |
20 | * - i.MX27 Platform Development Kit (i.MX27 PDK) | |
21 | */ | |
22 | ||
ec9be0de FE |
23 | #include <linux/platform_device.h> |
24 | #include <linux/gpio.h> | |
b5ec73eb | 25 | #include <linux/irq.h> |
96cf4239 FE |
26 | #include <linux/usb/otg.h> |
27 | #include <linux/usb/ulpi.h> | |
28 | #include <linux/delay.h> | |
c67a3e09 FE |
29 | #include <linux/mfd/mc13783.h> |
30 | #include <linux/spi/spi.h> | |
31 | #include <linux/regulator/machine.h> | |
96cf4239 | 32 | |
ec9be0de FE |
33 | #include <asm/mach-types.h> |
34 | #include <asm/mach/arch.h> | |
35 | #include <asm/mach/time.h> | |
36 | #include <mach/hardware.h> | |
37 | #include <mach/common.h> | |
e835d88e | 38 | #include <mach/iomux-mx27.h> |
96cf4239 | 39 | #include <mach/ulpi.h> |
92cb33f1 FE |
40 | #include <mach/irqs.h> |
41 | #include <mach/3ds_debugboard.h> | |
ec9be0de | 42 | |
d5dac4a6 | 43 | #include "devices-imx27.h" |
ec9be0de | 44 | |
98618cfe FE |
45 | #define SD1_EN_GPIO IMX_GPIO_NR(2, 25) |
46 | #define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23) | |
47 | #define SPI2_SS0 IMX_GPIO_NR(4, 21) | |
48 | #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) | |
aec250dc | 49 | #define PMIC_INT IMX_GPIO_NR(3, 14) |
b5ec73eb | 50 | |
6c80ee51 | 51 | static const int mx27pdk_pins[] __initconst = { |
ec9be0de FE |
52 | /* UART1 */ |
53 | PE12_PF_UART1_TXD, | |
54 | PE13_PF_UART1_RXD, | |
55 | PE14_PF_UART1_CTS, | |
56 | PE15_PF_UART1_RTS, | |
57 | /* FEC */ | |
58 | PD0_AIN_FEC_TXD0, | |
59 | PD1_AIN_FEC_TXD1, | |
60 | PD2_AIN_FEC_TXD2, | |
61 | PD3_AIN_FEC_TXD3, | |
62 | PD4_AOUT_FEC_RX_ER, | |
63 | PD5_AOUT_FEC_RXD1, | |
64 | PD6_AOUT_FEC_RXD2, | |
65 | PD7_AOUT_FEC_RXD3, | |
66 | PD8_AF_FEC_MDIO, | |
67 | PD9_AIN_FEC_MDC, | |
68 | PD10_AOUT_FEC_CRS, | |
69 | PD11_AOUT_FEC_TX_CLK, | |
70 | PD12_AOUT_FEC_RXD0, | |
71 | PD13_AOUT_FEC_RX_DV, | |
72 | PD14_AOUT_FEC_RX_CLK, | |
73 | PD15_AOUT_FEC_COL, | |
74 | PD16_AIN_FEC_TX_ER, | |
75 | PF23_AIN_FEC_TX_EN, | |
b5ec73eb RP |
76 | /* SDHC1 */ |
77 | PE18_PF_SD1_D0, | |
78 | PE19_PF_SD1_D1, | |
79 | PE20_PF_SD1_D2, | |
80 | PE21_PF_SD1_D3, | |
81 | PE22_PF_SD1_CMD, | |
82 | PE23_PF_SD1_CLK, | |
83 | SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT, | |
96cf4239 FE |
84 | /* OTG */ |
85 | OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT, | |
86 | PC7_PF_USBOTG_DATA5, | |
87 | PC8_PF_USBOTG_DATA6, | |
88 | PC9_PF_USBOTG_DATA0, | |
89 | PC10_PF_USBOTG_DATA2, | |
90 | PC11_PF_USBOTG_DATA1, | |
91 | PC12_PF_USBOTG_DATA4, | |
92 | PC13_PF_USBOTG_DATA3, | |
93 | PE0_PF_USBOTG_NXT, | |
94 | PE1_PF_USBOTG_STP, | |
95 | PE2_PF_USBOTG_DIR, | |
96 | PE24_PF_USBOTG_CLK, | |
97 | PE25_PF_USBOTG_DATA7, | |
c67a3e09 FE |
98 | /* CSPI2 */ |
99 | PD22_PF_CSPI2_SCLK, | |
100 | PD23_PF_CSPI2_MISO, | |
101 | PD24_PF_CSPI2_MOSI, | |
aec250dc | 102 | SPI2_SS0 | GPIO_GPIO | GPIO_OUT, |
5885f036 FE |
103 | /* I2C1 */ |
104 | PD17_PF_I2C_DATA, | |
105 | PD18_PF_I2C_CLK, | |
aec250dc FE |
106 | /* PMIC INT */ |
107 | PMIC_INT | GPIO_GPIO | GPIO_IN, | |
ec9be0de FE |
108 | }; |
109 | ||
d5dac4a6 | 110 | static const struct imxuart_platform_data uart_pdata __initconst = { |
ec9be0de FE |
111 | .flags = IMXUART_HAVE_RTSCTS, |
112 | }; | |
113 | ||
3fac6cf3 RP |
114 | /* |
115 | * Matrix keyboard | |
116 | */ | |
117 | ||
118 | static const uint32_t mx27_3ds_keymap[] = { | |
119 | KEY(0, 0, KEY_UP), | |
120 | KEY(0, 1, KEY_DOWN), | |
121 | KEY(1, 0, KEY_RIGHT), | |
122 | KEY(1, 1, KEY_LEFT), | |
123 | KEY(1, 2, KEY_ENTER), | |
124 | KEY(2, 0, KEY_F6), | |
125 | KEY(2, 1, KEY_F8), | |
126 | KEY(2, 2, KEY_F9), | |
127 | KEY(2, 3, KEY_F10), | |
128 | }; | |
129 | ||
3f880141 | 130 | static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = { |
3fac6cf3 RP |
131 | .keymap = mx27_3ds_keymap, |
132 | .keymap_size = ARRAY_SIZE(mx27_3ds_keymap), | |
133 | }; | |
134 | ||
b5ec73eb RP |
135 | static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq, |
136 | void *data) | |
137 | { | |
138 | return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING | | |
139 | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); | |
140 | } | |
141 | ||
142 | static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) | |
143 | { | |
144 | free_irq(IRQ_GPIOB(26), data); | |
145 | } | |
146 | ||
9d3d945a | 147 | static const struct imxmmc_platform_data sdhc1_pdata __initconst = { |
b5ec73eb RP |
148 | .init = mx27_3ds_sdhc1_init, |
149 | .exit = mx27_3ds_sdhc1_exit, | |
150 | }; | |
151 | ||
152 | static void mx27_3ds_sdhc1_enable_level_translator(void) | |
153 | { | |
154 | /* Turn on TXB0108 OE pin */ | |
155 | gpio_request(SD1_EN_GPIO, "sd1_enable"); | |
156 | gpio_direction_output(SD1_EN_GPIO, 1); | |
157 | } | |
158 | ||
96cf4239 FE |
159 | |
160 | static int otg_phy_init(void) | |
161 | { | |
162 | gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset"); | |
163 | gpio_direction_output(OTG_PHY_RESET_GPIO, 0); | |
164 | mdelay(1); | |
165 | gpio_set_value(OTG_PHY_RESET_GPIO, 1); | |
166 | return 0; | |
167 | } | |
168 | ||
4bd597b6 SH |
169 | static int mx27_3ds_otg_init(struct platform_device *pdev) |
170 | { | |
171 | return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI); | |
172 | } | |
96cf4239 FE |
173 | |
174 | static struct mxc_usbh_platform_data otg_pdata __initdata = { | |
4bd597b6 | 175 | .init = mx27_3ds_otg_init, |
96cf4239 | 176 | .portsc = MXC_EHCI_MODE_ULPI, |
96cf4239 | 177 | }; |
96cf4239 FE |
178 | |
179 | static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |
180 | .operating_mode = FSL_USB2_DR_DEVICE, | |
181 | .phy_mode = FSL_USB2_PHY_ULPI, | |
182 | }; | |
183 | ||
184 | static int otg_mode_host; | |
185 | ||
186 | static int __init mx27_3ds_otg_mode(char *options) | |
187 | { | |
188 | if (!strcmp(options, "host")) | |
189 | otg_mode_host = 1; | |
190 | else if (!strcmp(options, "device")) | |
191 | otg_mode_host = 0; | |
192 | else | |
193 | pr_info("otg_mode neither \"host\" nor \"device\". " | |
194 | "Defaulting to device\n"); | |
195 | return 0; | |
196 | } | |
197 | __setup("otg_mode=", mx27_3ds_otg_mode); | |
198 | ||
c67a3e09 | 199 | /* Regulators */ |
aec250dc FE |
200 | static struct regulator_init_data gpo_init = { |
201 | .constraints = { | |
202 | .boot_on = 1, | |
203 | .always_on = 1, | |
204 | } | |
205 | }; | |
206 | ||
c67a3e09 FE |
207 | static struct regulator_consumer_supply vmmc1_consumers[] = { |
208 | REGULATOR_SUPPLY("lcd_2v8", NULL), | |
209 | }; | |
210 | ||
211 | static struct regulator_init_data vmmc1_init = { | |
212 | .constraints = { | |
213 | .min_uV = 2800000, | |
214 | .max_uV = 2800000, | |
aec250dc FE |
215 | .apply_uV = 1, |
216 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
217 | REGULATOR_CHANGE_STATUS, | |
c67a3e09 FE |
218 | }, |
219 | .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers), | |
220 | .consumer_supplies = vmmc1_consumers, | |
221 | }; | |
222 | ||
223 | static struct regulator_consumer_supply vgen_consumers[] = { | |
224 | REGULATOR_SUPPLY("vdd_lcdio", NULL), | |
225 | }; | |
226 | ||
227 | static struct regulator_init_data vgen_init = { | |
228 | .constraints = { | |
229 | .min_uV = 1800000, | |
230 | .max_uV = 1800000, | |
231 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
232 | }, | |
233 | .num_consumer_supplies = ARRAY_SIZE(vgen_consumers), | |
234 | .consumer_supplies = vgen_consumers, | |
235 | }; | |
236 | ||
5836372e | 237 | static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = { |
c67a3e09 | 238 | { |
074cee92 | 239 | .id = MC13783_REG_VMMC1, |
c67a3e09 FE |
240 | .init_data = &vmmc1_init, |
241 | }, { | |
074cee92 | 242 | .id = MC13783_REG_VGEN, |
c67a3e09 | 243 | .init_data = &vgen_init, |
aec250dc FE |
244 | }, { |
245 | .id = MC13783_REG_GPO1, /* Turn on 1.8V */ | |
246 | .init_data = &gpo_init, | |
247 | }, { | |
248 | .id = MC13783_REG_GPO3, /* Turn on 3.3V */ | |
249 | .init_data = &gpo_init, | |
c67a3e09 FE |
250 | }, |
251 | }; | |
252 | ||
253 | /* MC13783 */ | |
4ec1b54c AS |
254 | static struct mc13xxx_platform_data mc13783_pdata = { |
255 | .regulators = { | |
256 | .regulators = mx27_3ds_regulators, | |
257 | .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), | |
258 | ||
259 | }, | |
260 | .flags = MC13783_USE_REGULATOR, | |
c67a3e09 FE |
261 | }; |
262 | ||
263 | /* SPI */ | |
264 | static int spi2_internal_chipselect[] = {SPI2_SS0}; | |
265 | ||
266 | static const struct spi_imx_master spi2_pdata __initconst = { | |
267 | .chipselect = spi2_internal_chipselect, | |
268 | .num_chipselect = ARRAY_SIZE(spi2_internal_chipselect), | |
269 | }; | |
270 | ||
271 | static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { | |
272 | { | |
273 | .modalias = "mc13783", | |
274 | .max_speed_hz = 1000000, | |
275 | .bus_num = 1, | |
276 | .chip_select = 0, /* SS0 */ | |
277 | .platform_data = &mc13783_pdata, | |
278 | .irq = IRQ_GPIOC(14), | |
279 | .mode = SPI_CS_HIGH, | |
280 | }, | |
281 | }; | |
282 | ||
5885f036 FE |
283 | static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = { |
284 | .bitrate = 100000, | |
285 | }; | |
96cf4239 | 286 | |
ec9be0de FE |
287 | static void __init mx27pdk_init(void) |
288 | { | |
289 | mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), | |
290 | "mx27pdk"); | |
b5ec73eb | 291 | mx27_3ds_sdhc1_enable_level_translator(); |
d5dac4a6 | 292 | imx27_add_imx_uart0(&uart_pdata); |
6bd96f3c | 293 | imx27_add_fec(NULL); |
3f880141 | 294 | imx27_add_imx_keypad(&mx27_3ds_keymap_data); |
9d3d945a | 295 | imx27_add_mxc_mmc(0, &sdhc1_pdata); |
8be9252f | 296 | imx27_add_imx2_wdt(NULL); |
96cf4239 | 297 | otg_phy_init(); |
48f6b099 | 298 | |
96cf4239 | 299 | if (otg_mode_host) { |
48f6b099 SH |
300 | otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | |
301 | ULPI_OTG_DRVVBUS_EXT); | |
96cf4239 | 302 | |
48f6b099 SH |
303 | if (otg_pdata.otg) |
304 | imx27_add_mxc_ehci_otg(&otg_pdata); | |
96cf4239 | 305 | } |
48f6b099 | 306 | |
96cf4239 FE |
307 | if (!otg_mode_host) |
308 | imx27_add_fsl_usb2_udc(&otg_device_pdata); | |
309 | ||
c67a3e09 FE |
310 | imx27_add_spi_imx1(&spi2_pdata); |
311 | spi_register_board_info(mx27_3ds_spi_devs, | |
312 | ARRAY_SIZE(mx27_3ds_spi_devs)); | |
92cb33f1 FE |
313 | |
314 | if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) | |
315 | pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); | |
5885f036 | 316 | imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); |
ec9be0de FE |
317 | } |
318 | ||
319 | static void __init mx27pdk_timer_init(void) | |
320 | { | |
321 | mx27_clocks_init(26000000); | |
322 | } | |
323 | ||
324 | static struct sys_timer mx27pdk_timer = { | |
325 | .init = mx27pdk_timer_init, | |
326 | }; | |
327 | ||
328 | MACHINE_START(MX27_3DS, "Freescale MX27PDK") | |
329 | /* maintainer: Freescale Semiconductor, Inc. */ | |
3dac2196 UKK |
330 | .boot_params = MX27_PHYS_OFFSET + 0x100, |
331 | .map_io = mx27_map_io, | |
332 | .init_early = imx27_init_early, | |
333 | .init_irq = mx27_init_irq, | |
334 | .timer = &mx27pdk_timer, | |
335 | .init_machine = mx27pdk_init, | |
ec9be0de | 336 | MACHINE_END |