[deliverable/linux.git] / arch / arm / mach-imx / mach-mx27_3ds.c

/*
 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * Author: Fabio Estevam <fabio.estevam@freescale.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/*
 * This machine is known as:
 *  - i.MX27 3-Stack Development System
 *  - i.MX27 Platform Development Kit (i.MX27 PDK)
 */

#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/delay.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/regulator/machine.h>
#include <linux/spi/l4f00242t03.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/iomux-mx27.h>
#include <mach/ulpi.h>
#include <mach/irqs.h>
#include <mach/3ds_debugboard.h>

#include "devices-imx27.h"

#define SD1_EN_GPIO		IMX_GPIO_NR(2, 25)
#define OTG_PHY_RESET_GPIO	IMX_GPIO_NR(2, 23)
#define SPI2_SS0		IMX_GPIO_NR(4, 21)
#define EXPIO_PARENT_INT	gpio_to_irq(IMX_GPIO_NR(3, 28))
#define PMIC_INT		IMX_GPIO_NR(3, 14)
#define SPI1_SS0		IMX_GPIO_NR(4, 28)
#define SD1_CD			IMX_GPIO_NR(2, 26)
#define LCD_RESET		IMX_GPIO_NR(1, 3)
#define LCD_ENABLE		IMX_GPIO_NR(1, 31)

static const int mx27pdk_pins[] __initconst = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* SDHC1 */
	PE18_PF_SD1_D0,
	PE19_PF_SD1_D1,
	PE20_PF_SD1_D2,
	PE21_PF_SD1_D3,
	PE22_PF_SD1_CMD,
	PE23_PF_SD1_CLK,
	SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT,
	/* OTG */
	OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT,
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PC9_PF_USBOTG_DATA0,
	PC10_PF_USBOTG_DATA2,
	PC11_PF_USBOTG_DATA1,
	PC12_PF_USBOTG_DATA4,
	PC13_PF_USBOTG_DATA3,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PE2_PF_USBOTG_DIR,
	PE24_PF_USBOTG_CLK,
	PE25_PF_USBOTG_DATA7,
	/* CSPI1 */
	PD31_PF_CSPI1_MOSI,
	PD30_PF_CSPI1_MISO,
	PD29_PF_CSPI1_SCLK,
	PD25_PF_CSPI1_RDY,
	SPI1_SS0 | GPIO_GPIO | GPIO_OUT,
	/* CSPI2 */
	PD22_PF_CSPI2_SCLK,
	PD23_PF_CSPI2_MISO,
	PD24_PF_CSPI2_MOSI,
	SPI2_SS0 | GPIO_GPIO | GPIO_OUT,
	/* I2C1 */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	/* PMIC INT */
	PMIC_INT | GPIO_GPIO | GPIO_IN,
	/* LCD */
	PA5_PF_LSCLK,
	PA6_PF_LD0,
	PA7_PF_LD1,
	PA8_PF_LD2,
	PA9_PF_LD3,
	PA10_PF_LD4,
	PA11_PF_LD5,
	PA12_PF_LD6,
	PA13_PF_LD7,
	PA14_PF_LD8,
	PA15_PF_LD9,
	PA16_PF_LD10,
	PA17_PF_LD11,
	PA18_PF_LD12,
	PA19_PF_LD13,
	PA20_PF_LD14,
	PA21_PF_LD15,
	PA22_PF_LD16,
	PA23_PF_LD17,
	PA28_PF_HSYNC,
	PA29_PF_VSYNC,
	PA30_PF_CONTRAST,
	LCD_ENABLE | GPIO_GPIO | GPIO_OUT,
	LCD_RESET | GPIO_GPIO | GPIO_OUT,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/*
 * Matrix keyboard
 */

static const uint32_t mx27_3ds_keymap[] = {
	KEY(0, 0, KEY_UP),
	KEY(0, 1, KEY_DOWN),
	KEY(1, 0, KEY_RIGHT),
	KEY(1, 1, KEY_LEFT),
	KEY(1, 2, KEY_ENTER),
	KEY(2, 0, KEY_F6),
	KEY(2, 1, KEY_F8),
	KEY(2, 2, KEY_F9),
	KEY(2, 3, KEY_F10),
};

static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
	.keymap		= mx27_3ds_keymap,
	.keymap_size	= ARRAY_SIZE(mx27_3ds_keymap),
};

static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
				void *data)
{
	return request_irq(gpio_to_irq(SD1_CD), detect_irq,
	IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
}

static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(SD1_CD), data);
}

static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
	.init = mx27_3ds_sdhc1_init,
	.exit = mx27_3ds_sdhc1_exit,
};

static void mx27_3ds_sdhc1_enable_level_translator(void)
{
	/* Turn on TXB0108 OE pin */
	gpio_request(SD1_EN_GPIO, "sd1_enable");
	gpio_direction_output(SD1_EN_GPIO, 1);
}


static int otg_phy_init(void)
{
	gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset");
	gpio_direction_output(OTG_PHY_RESET_GPIO, 0);
	mdelay(1);
	gpio_set_value(OTG_PHY_RESET_GPIO, 1);
	return 0;
}

static int mx27_3ds_otg_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}

static struct mxc_usbh_platform_data otg_pdata __initdata = {
	.init	= mx27_3ds_otg_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
};

static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
	.operating_mode = FSL_USB2_DR_DEVICE,
	.phy_mode       = FSL_USB2_PHY_ULPI,
};

static int otg_mode_host;

static int __init mx27_3ds_otg_mode(char *options)
{
	if (!strcmp(options, "host"))
		otg_mode_host = 1;
	else if (!strcmp(options, "device"))
		otg_mode_host = 0;
	else
		pr_info("otg_mode neither \"host\" nor \"device\". "
			"Defaulting to device\n");
	return 0;
}
__setup("otg_mode=", mx27_3ds_otg_mode);

/* Regulators */
static struct regulator_init_data gpo_init = {
	.constraints = {
		.boot_on = 1,
		.always_on = 1,
	}
};

static struct regulator_consumer_supply vmmc1_consumers[] = {
	REGULATOR_SUPPLY("lcd_2v8", NULL),
};

static struct regulator_init_data vmmc1_init = {
	.constraints = {
		.min_uV	= 2800000,
		.max_uV = 2800000,
		.apply_uV = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
				  REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
	.consumer_supplies = vmmc1_consumers,
};

static struct regulator_consumer_supply vgen_consumers[] = {
	REGULATOR_SUPPLY("vdd_lcdio", NULL),
};

static struct regulator_init_data vgen_init = {
	.constraints = {
		.min_uV	= 1800000,
		.max_uV = 1800000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
	.num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
	.consumer_supplies = vgen_consumers,
};

static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
	{
		.id = MC13783_REG_VMMC1,
		.init_data = &vmmc1_init,
	}, {
		.id = MC13783_REG_VGEN,
		.init_data = &vgen_init,
	}, {
		.id = MC13783_REG_GPO1, /* Turn on 1.8V */
		.init_data = &gpo_init,
	}, {
		.id = MC13783_REG_GPO3, /* Turn on 3.3V */
		.init_data = &gpo_init,
	},
};

/* MC13783 */
static struct mc13xxx_platform_data mc13783_pdata = {
	.regulators = {
		.regulators = mx27_3ds_regulators,
		.num_regulators = ARRAY_SIZE(mx27_3ds_regulators),

	},
	.flags  = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN |
	MC13783_USE_RTC,
};

/* SPI */
static int spi1_chipselect[] = {SPI1_SS0};

static const struct spi_imx_master spi1_pdata __initconst = {
	.chipselect	= spi1_chipselect,
	.num_chipselect	= ARRAY_SIZE(spi1_chipselect),
};

static int spi2_chipselect[] = {SPI2_SS0};

static const struct spi_imx_master spi2_pdata __initconst = {
	.chipselect	= spi2_chipselect,
	.num_chipselect	= ARRAY_SIZE(spi2_chipselect),
};

static struct imx_fb_videomode mx27_3ds_modes[] = {
	{	/* 480x640 @ 60 Hz */
		.mode = {
			.name		= "Epson-VGA",
			.refresh	= 60,
			.xres		= 480,
			.yres		= 640,
			.pixclock	= 41701,
			.left_margin	= 20,
			.right_margin	= 41,
			.upper_margin	= 10,
			.lower_margin	= 5,
			.hsync_len	= 20,
			.vsync_len	= 10,
			.sync		= FB_SYNC_OE_ACT_HIGH |
						FB_SYNC_CLK_INVERT,
			.vmode		= FB_VMODE_NONINTERLACED,
			.flag		= 0,
		},
		.bpp		= 16,
		.pcr		= 0xFAC08B82,
	},
};

static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = {
	.mode = mx27_3ds_modes,
	.num_modes = ARRAY_SIZE(mx27_3ds_modes),
	.pwmr		= 0x00A903FF,
	.lscr1		= 0x00120300,
	.dmacr		= 0x00020010,
};

/* LCD */
static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = {
	.reset_gpio		= LCD_RESET,
	.data_enable_gpio	= LCD_ENABLE,
	.core_supply		= "lcd_2v8",
	.io_supply		= "vdd_lcdio",
};

static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
	{
		.modalias	= "mc13783",
		.max_speed_hz	= 1000000,
		.bus_num	= 1,
		.chip_select	= 0, /* SS0 */
		.platform_data	= &mc13783_pdata,
		.irq = gpio_to_irq(PMIC_INT),
		.mode = SPI_CS_HIGH,
	}, {
		.modalias	= "l4f00242t03",
		.max_speed_hz	= 5000000,
		.bus_num	= 0,
		.chip_select	= 0, /* SS0 */
		.platform_data	= &mx27_3ds_lcd_pdata,
	},
};

static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = {
	.bitrate = 100000,
};

static void __init mx27pdk_init(void)
{
	imx27_soc_init();

	mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
		"mx27pdk");
	mx27_3ds_sdhc1_enable_level_translator();
	imx27_add_imx_uart0(&uart_pdata);
	imx27_add_fec(NULL);
	imx27_add_imx_keypad(&mx27_3ds_keymap_data);
	imx27_add_mxc_mmc(0, &sdhc1_pdata);
	imx27_add_imx2_wdt(NULL);
	otg_phy_init();

	if (otg_mode_host) {
		otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
				ULPI_OTG_DRVVBUS_EXT);

		if (otg_pdata.otg)
			imx27_add_mxc_ehci_otg(&otg_pdata);
	}

	if (!otg_mode_host)
		imx27_add_fsl_usb2_udc(&otg_device_pdata);

	imx27_add_spi_imx1(&spi2_pdata);
	imx27_add_spi_imx0(&spi1_pdata);
	spi_register_board_info(mx27_3ds_spi_devs,
						ARRAY_SIZE(mx27_3ds_spi_devs));

	if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT))
		pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
	imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
	imx27_add_imx_fb(&mx27_3ds_fb_data);
}

static void __init mx27pdk_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer mx27pdk_timer = {
	.init	= mx27pdk_timer_init,
};

MACHINE_START(MX27_3DS, "Freescale MX27PDK")
	/* maintainer: Freescale Semiconductor, Inc. */
	.boot_params = MX27_PHYS_OFFSET + 0x100,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.timer = &mx27pdk_timer,
	.init_machine = mx27pdk_init,
MACHINE_END
Commit	Line	Data
ec9be0de FE	1	/*
	2	* Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
	3	*
	4	* Author: Fabio Estevam <fabio.estevam@freescale.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
ec9be0de FE	15	*/
ec9be0de FE	16
8fdca37a UKK	17	/*
	18	* This machine is known as:
	19	* - i.MX27 3-Stack Development System
	20	* - i.MX27 Platform Development Kit (i.MX27 PDK)
	21	*/
	22
ec9be0de FE	23	#include <linux/platform_device.h>
ec9be0de FE	24	#include <linux/gpio.h>
b5ec73eb	25	#include <linux/irq.h>
96cf4239 FE	26	#include <linux/usb/otg.h>
	27	#include <linux/usb/ulpi.h>
	28	#include <linux/delay.h>
c67a3e09 FE	29	#include <linux/mfd/mc13783.h>
	30	#include <linux/spi/spi.h>
	31	#include <linux/regulator/machine.h>
1abcb4cc	32	#include <linux/spi/l4f00242t03.h>
96cf4239	33
ec9be0de FE	34	#include <asm/mach-types.h>
	35	#include <asm/mach/arch.h>
	36	#include <asm/mach/time.h>
	37	#include <mach/hardware.h>
	38	#include <mach/common.h>
e835d88e	39	#include <mach/iomux-mx27.h>
96cf4239	40	#include <mach/ulpi.h>
92cb33f1 FE	41	#include <mach/irqs.h>
92cb33f1 FE	42	#include <mach/3ds_debugboard.h>
ec9be0de	43
d5dac4a6	44	#include "devices-imx27.h"
ec9be0de	45
98618cfe FE	46	#define SD1_EN_GPIO IMX_GPIO_NR(2, 25)
	47	#define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23)
	48	#define SPI2_SS0 IMX_GPIO_NR(4, 21)
	49	#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28))
aec250dc	50	#define PMIC_INT IMX_GPIO_NR(3, 14)
1abcb4cc	51	#define SPI1_SS0 IMX_GPIO_NR(4, 28)
c084473d	52	#define SD1_CD IMX_GPIO_NR(2, 26)
1abcb4cc FE	53	#define LCD_RESET IMX_GPIO_NR(1, 3)
1abcb4cc FE	54	#define LCD_ENABLE IMX_GPIO_NR(1, 31)
b5ec73eb	55
6c80ee51	56	static const int mx27pdk_pins[] __initconst = {
ec9be0de FE	57	/* UART1 */
	58	PE12_PF_UART1_TXD,
	59	PE13_PF_UART1_RXD,
	60	PE14_PF_UART1_CTS,
	61	PE15_PF_UART1_RTS,
	62	/* FEC */
	63	PD0_AIN_FEC_TXD0,
	64	PD1_AIN_FEC_TXD1,
	65	PD2_AIN_FEC_TXD2,
	66	PD3_AIN_FEC_TXD3,
	67	PD4_AOUT_FEC_RX_ER,
	68	PD5_AOUT_FEC_RXD1,
	69	PD6_AOUT_FEC_RXD2,
	70	PD7_AOUT_FEC_RXD3,
	71	PD8_AF_FEC_MDIO,
	72	PD9_AIN_FEC_MDC,
	73	PD10_AOUT_FEC_CRS,
	74	PD11_AOUT_FEC_TX_CLK,
	75	PD12_AOUT_FEC_RXD0,
	76	PD13_AOUT_FEC_RX_DV,
	77	PD14_AOUT_FEC_RX_CLK,
	78	PD15_AOUT_FEC_COL,
	79	PD16_AIN_FEC_TX_ER,
	80	PF23_AIN_FEC_TX_EN,
b5ec73eb RP	81	/* SDHC1 */
	82	PE18_PF_SD1_D0,
	83	PE19_PF_SD1_D1,
	84	PE20_PF_SD1_D2,
	85	PE21_PF_SD1_D3,
	86	PE22_PF_SD1_CMD,
	87	PE23_PF_SD1_CLK,
	88	SD1_EN_GPIO \| GPIO_GPIO \| GPIO_OUT,
96cf4239 FE	89	/* OTG */
	90	OTG_PHY_RESET_GPIO \| GPIO_GPIO \| GPIO_OUT,
	91	PC7_PF_USBOTG_DATA5,
	92	PC8_PF_USBOTG_DATA6,
	93	PC9_PF_USBOTG_DATA0,
	94	PC10_PF_USBOTG_DATA2,
	95	PC11_PF_USBOTG_DATA1,
	96	PC12_PF_USBOTG_DATA4,
	97	PC13_PF_USBOTG_DATA3,
	98	PE0_PF_USBOTG_NXT,
	99	PE1_PF_USBOTG_STP,
	100	PE2_PF_USBOTG_DIR,
	101	PE24_PF_USBOTG_CLK,
	102	PE25_PF_USBOTG_DATA7,
1abcb4cc FE	103	/* CSPI1 */
	104	PD31_PF_CSPI1_MOSI,
	105	PD30_PF_CSPI1_MISO,
	106	PD29_PF_CSPI1_SCLK,
	107	PD25_PF_CSPI1_RDY,
	108	SPI1_SS0 \| GPIO_GPIO \| GPIO_OUT,
c67a3e09 FE	109	/* CSPI2 */
	110	PD22_PF_CSPI2_SCLK,
	111	PD23_PF_CSPI2_MISO,
	112	PD24_PF_CSPI2_MOSI,
aec250dc	113	SPI2_SS0 \| GPIO_GPIO \| GPIO_OUT,
5885f036 FE	114	/* I2C1 */
	115	PD17_PF_I2C_DATA,
	116	PD18_PF_I2C_CLK,
aec250dc FE	117	/* PMIC INT */
aec250dc FE	118	PMIC_INT \| GPIO_GPIO \| GPIO_IN,
1abcb4cc FE	119	/* LCD */
	120	PA5_PF_LSCLK,
	121	PA6_PF_LD0,
	122	PA7_PF_LD1,
	123	PA8_PF_LD2,
	124	PA9_PF_LD3,
	125	PA10_PF_LD4,
	126	PA11_PF_LD5,
	127	PA12_PF_LD6,
	128	PA13_PF_LD7,
	129	PA14_PF_LD8,
	130	PA15_PF_LD9,
	131	PA16_PF_LD10,
	132	PA17_PF_LD11,
	133	PA18_PF_LD12,
	134	PA19_PF_LD13,
	135	PA20_PF_LD14,
	136	PA21_PF_LD15,
	137	PA22_PF_LD16,
	138	PA23_PF_LD17,
	139	PA28_PF_HSYNC,
	140	PA29_PF_VSYNC,
	141	PA30_PF_CONTRAST,
	142	LCD_ENABLE \| GPIO_GPIO \| GPIO_OUT,
	143	LCD_RESET \| GPIO_GPIO \| GPIO_OUT,
ec9be0de FE	144	};
ec9be0de FE	145
d5dac4a6	146	static const struct imxuart_platform_data uart_pdata __initconst = {
ec9be0de FE	147	.flags = IMXUART_HAVE_RTSCTS,
	148	};
	149
3fac6cf3 RP	150	/*
	151	* Matrix keyboard
	152	*/
	153
	154	static const uint32_t mx27_3ds_keymap[] = {
	155	KEY(0, 0, KEY_UP),
	156	KEY(0, 1, KEY_DOWN),
	157	KEY(1, 0, KEY_RIGHT),
	158	KEY(1, 1, KEY_LEFT),
	159	KEY(1, 2, KEY_ENTER),
	160	KEY(2, 0, KEY_F6),
	161	KEY(2, 1, KEY_F8),
	162	KEY(2, 2, KEY_F9),
	163	KEY(2, 3, KEY_F10),
	164	};
	165
3f880141	166	static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
3fac6cf3 RP	167	.keymap = mx27_3ds_keymap,
	168	.keymap_size = ARRAY_SIZE(mx27_3ds_keymap),
	169	};
	170
b5ec73eb RP	171	static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
	172	void *data)
	173	{
c084473d FE	174	return request_irq(gpio_to_irq(SD1_CD), detect_irq,
c084473d FE	175	IRQF_TRIGGER_FALLING \| IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
b5ec73eb RP	176	}
	177
	178	static void mx27_3ds_sdhc1_exit(struct device dev, void data)
	179	{
c084473d	180	free_irq(gpio_to_irq(SD1_CD), data);
b5ec73eb RP	181	}
b5ec73eb RP	182
9d3d945a	183	static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
b5ec73eb RP	184	.init = mx27_3ds_sdhc1_init,
	185	.exit = mx27_3ds_sdhc1_exit,
	186	};
	187
	188	static void mx27_3ds_sdhc1_enable_level_translator(void)
	189	{
	190	/* Turn on TXB0108 OE pin */
	191	gpio_request(SD1_EN_GPIO, "sd1_enable");
	192	gpio_direction_output(SD1_EN_GPIO, 1);
	193	}
	194
96cf4239 FE	195
	196	static int otg_phy_init(void)
	197	{
	198	gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset");
	199	gpio_direction_output(OTG_PHY_RESET_GPIO, 0);
	200	mdelay(1);
	201	gpio_set_value(OTG_PHY_RESET_GPIO, 1);
	202	return 0;
	203	}
	204
4bd597b6 SH	205	static int mx27_3ds_otg_init(struct platform_device *pdev)
	206	{
	207	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
	208	}
96cf4239 FE	209
96cf4239 FE	210	static struct mxc_usbh_platform_data otg_pdata __initdata = {
4bd597b6	211	.init = mx27_3ds_otg_init,
96cf4239	212	.portsc = MXC_EHCI_MODE_ULPI,
96cf4239	213	};
96cf4239 FE	214
	215	static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
	216	.operating_mode = FSL_USB2_DR_DEVICE,
	217	.phy_mode = FSL_USB2_PHY_ULPI,
	218	};
	219
	220	static int otg_mode_host;
	221
	222	static int __init mx27_3ds_otg_mode(char *options)
	223	{
	224	if (!strcmp(options, "host"))
	225	otg_mode_host = 1;
	226	else if (!strcmp(options, "device"))
	227	otg_mode_host = 0;
	228	else
	229	pr_info("otg_mode neither \"host\" nor \"device\". "
	230	"Defaulting to device\n");
	231	return 0;
	232	}
	233	__setup("otg_mode=", mx27_3ds_otg_mode);
	234
c67a3e09	235	/* Regulators */
aec250dc FE	236	static struct regulator_init_data gpo_init = {
	237	.constraints = {
	238	.boot_on = 1,
	239	.always_on = 1,
	240	}
	241	};
	242
c67a3e09 FE	243	static struct regulator_consumer_supply vmmc1_consumers[] = {
	244	REGULATOR_SUPPLY("lcd_2v8", NULL),
	245	};
	246
	247	static struct regulator_init_data vmmc1_init = {
	248	.constraints = {
	249	.min_uV = 2800000,
	250	.max_uV = 2800000,
aec250dc FE	251	.apply_uV = 1,
	252	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	253	REGULATOR_CHANGE_STATUS,
c67a3e09 FE	254	},
	255	.num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
	256	.consumer_supplies = vmmc1_consumers,
	257	};
	258
	259	static struct regulator_consumer_supply vgen_consumers[] = {
	260	REGULATOR_SUPPLY("vdd_lcdio", NULL),
	261	};
	262
	263	static struct regulator_init_data vgen_init = {
	264	.constraints = {
	265	.min_uV = 1800000,
	266	.max_uV = 1800000,
	267	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	268	},
	269	.num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
	270	.consumer_supplies = vgen_consumers,
	271	};
	272
5836372e	273	static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
c67a3e09	274	{
074cee92	275	.id = MC13783_REG_VMMC1,
c67a3e09 FE	276	.init_data = &vmmc1_init,
c67a3e09 FE	277	}, {
074cee92	278	.id = MC13783_REG_VGEN,
c67a3e09	279	.init_data = &vgen_init,
aec250dc FE	280	}, {
	281	.id = MC13783_REG_GPO1, /* Turn on 1.8V */
	282	.init_data = &gpo_init,
	283	}, {
	284	.id = MC13783_REG_GPO3, /* Turn on 3.3V */
	285	.init_data = &gpo_init,
c67a3e09 FE	286	},
	287	};
	288
	289	/* MC13783 */
4ec1b54c AS	290	static struct mc13xxx_platform_data mc13783_pdata = {
	291	.regulators = {
	292	.regulators = mx27_3ds_regulators,
	293	.num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
	294
	295	},
1459fc5f JL	296	.flags = MC13783_USE_REGULATOR \| MC13783_USE_TOUCHSCREEN \|
1459fc5f JL	297	MC13783_USE_RTC,
c67a3e09 FE	298	};
	299
	300	/* SPI */
1abcb4cc FE	301	static int spi1_chipselect[] = {SPI1_SS0};
	302
	303	static const struct spi_imx_master spi1_pdata __initconst = {
	304	.chipselect = spi1_chipselect,
	305	.num_chipselect = ARRAY_SIZE(spi1_chipselect),
	306	};
	307
6d2385ab	308	static int spi2_chipselect[] = {SPI2_SS0};
c67a3e09 FE	309
c67a3e09 FE	310	static const struct spi_imx_master spi2_pdata __initconst = {
6d2385ab FE	311	.chipselect = spi2_chipselect,
6d2385ab FE	312	.num_chipselect = ARRAY_SIZE(spi2_chipselect),
c67a3e09 FE	313	};
c67a3e09 FE	314
1abcb4cc FE	315	static struct imx_fb_videomode mx27_3ds_modes[] = {
	316	{ /* 480x640 @ 60 Hz */
	317	.mode = {
	318	.name = "Epson-VGA",
	319	.refresh = 60,
	320	.xres = 480,
	321	.yres = 640,
	322	.pixclock = 41701,
	323	.left_margin = 20,
	324	.right_margin = 41,
	325	.upper_margin = 10,
	326	.lower_margin = 5,
	327	.hsync_len = 20,
	328	.vsync_len = 10,
	329	.sync = FB_SYNC_OE_ACT_HIGH \|
	330	FB_SYNC_CLK_INVERT,
	331	.vmode = FB_VMODE_NONINTERLACED,
	332	.flag = 0,
	333	},
	334	.bpp = 16,
	335	.pcr = 0xFAC08B82,
	336	},
	337	};
	338
	339	static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = {
	340	.mode = mx27_3ds_modes,
	341	.num_modes = ARRAY_SIZE(mx27_3ds_modes),
	342	.pwmr = 0x00A903FF,
	343	.lscr1 = 0x00120300,
	344	.dmacr = 0x00020010,
	345	};
	346
	347	/* LCD */
	348	static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = {
	349	.reset_gpio = LCD_RESET,
	350	.data_enable_gpio = LCD_ENABLE,
	351	.core_supply = "lcd_2v8",
	352	.io_supply = "vdd_lcdio",
	353	};
	354
c67a3e09 FE	355	static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
	356	{
	357	.modalias = "mc13783",
	358	.max_speed_hz = 1000000,
	359	.bus_num = 1,
	360	.chip_select = 0, /* SS0 */
	361	.platform_data = &mc13783_pdata,
c084473d	362	.irq = gpio_to_irq(PMIC_INT),
c67a3e09	363	.mode = SPI_CS_HIGH,
1abcb4cc FE	364	}, {
	365	.modalias = "l4f00242t03",
	366	.max_speed_hz = 5000000,
	367	.bus_num = 0,
	368	.chip_select = 0, /* SS0 */
	369	.platform_data = &mx27_3ds_lcd_pdata,
c67a3e09 FE	370	},
	371	};
	372
5885f036 FE	373	static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = {
	374	.bitrate = 100000,
	375	};
96cf4239	376
ec9be0de FE	377	static void __init mx27pdk_init(void)
ec9be0de FE	378	{
b78d8e59 SG	379	imx27_soc_init();
b78d8e59 SG	380
ec9be0de FE	381	mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
ec9be0de FE	382	"mx27pdk");
b5ec73eb	383	mx27_3ds_sdhc1_enable_level_translator();
d5dac4a6	384	imx27_add_imx_uart0(&uart_pdata);
6bd96f3c	385	imx27_add_fec(NULL);
3f880141	386	imx27_add_imx_keypad(&mx27_3ds_keymap_data);
9d3d945a	387	imx27_add_mxc_mmc(0, &sdhc1_pdata);
8be9252f	388	imx27_add_imx2_wdt(NULL);
96cf4239	389	otg_phy_init();
48f6b099	390
96cf4239	391	if (otg_mode_host) {
48f6b099 SH	392	otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
48f6b099 SH	393	ULPI_OTG_DRVVBUS_EXT);
96cf4239	394
48f6b099 SH	395	if (otg_pdata.otg)
48f6b099 SH	396	imx27_add_mxc_ehci_otg(&otg_pdata);
96cf4239	397	}
48f6b099	398
96cf4239 FE	399	if (!otg_mode_host)
	400	imx27_add_fsl_usb2_udc(&otg_device_pdata);
	401
c67a3e09	402	imx27_add_spi_imx1(&spi2_pdata);
1abcb4cc	403	imx27_add_spi_imx0(&spi1_pdata);
c67a3e09 FE	404	spi_register_board_info(mx27_3ds_spi_devs,
c67a3e09 FE	405	ARRAY_SIZE(mx27_3ds_spi_devs));
92cb33f1 FE	406
	407	if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT))
	408	pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
5885f036	409	imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
1abcb4cc	410	imx27_add_imx_fb(&mx27_3ds_fb_data);
ec9be0de FE	411	}
	412
	413	static void __init mx27pdk_timer_init(void)
	414	{
	415	mx27_clocks_init(26000000);
	416	}
	417
	418	static struct sys_timer mx27pdk_timer = {
	419	.init = mx27pdk_timer_init,
	420	};
	421
	422	MACHINE_START(MX27_3DS, "Freescale MX27PDK")
	423	/* maintainer: Freescale Semiconductor, Inc. */
3dac2196 UKK	424	.boot_params = MX27_PHYS_OFFSET + 0x100,
	425	.map_io = mx27_map_io,
	426	.init_early = imx27_init_early,
	427	.init_irq = mx27_init_irq,
	428	.timer = &mx27pdk_timer,
	429	.init_machine = mx27pdk_init,
ec9be0de	430	MACHINE_END