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ec9be0de FE |
1 | /* |
2 | * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * Author: Fabio Estevam <fabio.estevam@freescale.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
ec9be0de FE |
15 | */ |
16 | ||
8fdca37a UKK |
17 | /* |
18 | * This machine is known as: | |
19 | * - i.MX27 3-Stack Development System | |
20 | * - i.MX27 Platform Development Kit (i.MX27 PDK) | |
21 | */ | |
22 | ||
ec9be0de FE |
23 | #include <linux/platform_device.h> |
24 | #include <linux/gpio.h> | |
b5ec73eb | 25 | #include <linux/irq.h> |
96cf4239 FE |
26 | #include <linux/usb/otg.h> |
27 | #include <linux/usb/ulpi.h> | |
28 | #include <linux/delay.h> | |
29 | ||
ec9be0de FE |
30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | |
32 | #include <asm/mach/time.h> | |
33 | #include <mach/hardware.h> | |
34 | #include <mach/common.h> | |
e835d88e | 35 | #include <mach/iomux-mx27.h> |
96cf4239 | 36 | #include <mach/ulpi.h> |
ec9be0de | 37 | |
d5dac4a6 | 38 | #include "devices-imx27.h" |
ec9be0de | 39 | |
b5ec73eb | 40 | #define SD1_EN_GPIO (GPIO_PORTB + 25) |
96cf4239 | 41 | #define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23) |
b5ec73eb | 42 | |
6c80ee51 | 43 | static const int mx27pdk_pins[] __initconst = { |
ec9be0de FE |
44 | /* UART1 */ |
45 | PE12_PF_UART1_TXD, | |
46 | PE13_PF_UART1_RXD, | |
47 | PE14_PF_UART1_CTS, | |
48 | PE15_PF_UART1_RTS, | |
49 | /* FEC */ | |
50 | PD0_AIN_FEC_TXD0, | |
51 | PD1_AIN_FEC_TXD1, | |
52 | PD2_AIN_FEC_TXD2, | |
53 | PD3_AIN_FEC_TXD3, | |
54 | PD4_AOUT_FEC_RX_ER, | |
55 | PD5_AOUT_FEC_RXD1, | |
56 | PD6_AOUT_FEC_RXD2, | |
57 | PD7_AOUT_FEC_RXD3, | |
58 | PD8_AF_FEC_MDIO, | |
59 | PD9_AIN_FEC_MDC, | |
60 | PD10_AOUT_FEC_CRS, | |
61 | PD11_AOUT_FEC_TX_CLK, | |
62 | PD12_AOUT_FEC_RXD0, | |
63 | PD13_AOUT_FEC_RX_DV, | |
64 | PD14_AOUT_FEC_RX_CLK, | |
65 | PD15_AOUT_FEC_COL, | |
66 | PD16_AIN_FEC_TX_ER, | |
67 | PF23_AIN_FEC_TX_EN, | |
b5ec73eb RP |
68 | /* SDHC1 */ |
69 | PE18_PF_SD1_D0, | |
70 | PE19_PF_SD1_D1, | |
71 | PE20_PF_SD1_D2, | |
72 | PE21_PF_SD1_D3, | |
73 | PE22_PF_SD1_CMD, | |
74 | PE23_PF_SD1_CLK, | |
75 | SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT, | |
96cf4239 FE |
76 | /* OTG */ |
77 | OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT, | |
78 | PC7_PF_USBOTG_DATA5, | |
79 | PC8_PF_USBOTG_DATA6, | |
80 | PC9_PF_USBOTG_DATA0, | |
81 | PC10_PF_USBOTG_DATA2, | |
82 | PC11_PF_USBOTG_DATA1, | |
83 | PC12_PF_USBOTG_DATA4, | |
84 | PC13_PF_USBOTG_DATA3, | |
85 | PE0_PF_USBOTG_NXT, | |
86 | PE1_PF_USBOTG_STP, | |
87 | PE2_PF_USBOTG_DIR, | |
88 | PE24_PF_USBOTG_CLK, | |
89 | PE25_PF_USBOTG_DATA7, | |
ec9be0de FE |
90 | }; |
91 | ||
d5dac4a6 | 92 | static const struct imxuart_platform_data uart_pdata __initconst = { |
ec9be0de FE |
93 | .flags = IMXUART_HAVE_RTSCTS, |
94 | }; | |
95 | ||
3fac6cf3 RP |
96 | /* |
97 | * Matrix keyboard | |
98 | */ | |
99 | ||
100 | static const uint32_t mx27_3ds_keymap[] = { | |
101 | KEY(0, 0, KEY_UP), | |
102 | KEY(0, 1, KEY_DOWN), | |
103 | KEY(1, 0, KEY_RIGHT), | |
104 | KEY(1, 1, KEY_LEFT), | |
105 | KEY(1, 2, KEY_ENTER), | |
106 | KEY(2, 0, KEY_F6), | |
107 | KEY(2, 1, KEY_F8), | |
108 | KEY(2, 2, KEY_F9), | |
109 | KEY(2, 3, KEY_F10), | |
110 | }; | |
111 | ||
3f880141 | 112 | static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = { |
3fac6cf3 RP |
113 | .keymap = mx27_3ds_keymap, |
114 | .keymap_size = ARRAY_SIZE(mx27_3ds_keymap), | |
115 | }; | |
116 | ||
b5ec73eb RP |
117 | static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq, |
118 | void *data) | |
119 | { | |
120 | return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING | | |
121 | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); | |
122 | } | |
123 | ||
124 | static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) | |
125 | { | |
126 | free_irq(IRQ_GPIOB(26), data); | |
127 | } | |
128 | ||
9d3d945a | 129 | static const struct imxmmc_platform_data sdhc1_pdata __initconst = { |
b5ec73eb RP |
130 | .init = mx27_3ds_sdhc1_init, |
131 | .exit = mx27_3ds_sdhc1_exit, | |
132 | }; | |
133 | ||
134 | static void mx27_3ds_sdhc1_enable_level_translator(void) | |
135 | { | |
136 | /* Turn on TXB0108 OE pin */ | |
137 | gpio_request(SD1_EN_GPIO, "sd1_enable"); | |
138 | gpio_direction_output(SD1_EN_GPIO, 1); | |
139 | } | |
140 | ||
96cf4239 FE |
141 | |
142 | static int otg_phy_init(void) | |
143 | { | |
144 | gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset"); | |
145 | gpio_direction_output(OTG_PHY_RESET_GPIO, 0); | |
146 | mdelay(1); | |
147 | gpio_set_value(OTG_PHY_RESET_GPIO, 1); | |
148 | return 0; | |
149 | } | |
150 | ||
151 | #if defined(CONFIG_USB_ULPI) | |
152 | ||
153 | static struct mxc_usbh_platform_data otg_pdata __initdata = { | |
154 | .portsc = MXC_EHCI_MODE_ULPI, | |
155 | .flags = MXC_EHCI_INTERFACE_DIFF_UNI, | |
156 | }; | |
157 | #endif | |
158 | ||
159 | static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |
160 | .operating_mode = FSL_USB2_DR_DEVICE, | |
161 | .phy_mode = FSL_USB2_PHY_ULPI, | |
162 | }; | |
163 | ||
164 | static int otg_mode_host; | |
165 | ||
166 | static int __init mx27_3ds_otg_mode(char *options) | |
167 | { | |
168 | if (!strcmp(options, "host")) | |
169 | otg_mode_host = 1; | |
170 | else if (!strcmp(options, "device")) | |
171 | otg_mode_host = 0; | |
172 | else | |
173 | pr_info("otg_mode neither \"host\" nor \"device\". " | |
174 | "Defaulting to device\n"); | |
175 | return 0; | |
176 | } | |
177 | __setup("otg_mode=", mx27_3ds_otg_mode); | |
178 | ||
179 | ||
ec9be0de FE |
180 | static void __init mx27pdk_init(void) |
181 | { | |
182 | mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), | |
183 | "mx27pdk"); | |
b5ec73eb | 184 | mx27_3ds_sdhc1_enable_level_translator(); |
d5dac4a6 | 185 | imx27_add_imx_uart0(&uart_pdata); |
6bd96f3c | 186 | imx27_add_fec(NULL); |
3f880141 | 187 | imx27_add_imx_keypad(&mx27_3ds_keymap_data); |
9d3d945a | 188 | imx27_add_mxc_mmc(0, &sdhc1_pdata); |
8be9252f | 189 | imx27_add_imx2_wdt(NULL); |
96cf4239 FE |
190 | otg_phy_init(); |
191 | #if defined(CONFIG_USB_ULPI) | |
192 | if (otg_mode_host) { | |
193 | otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | |
194 | ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); | |
195 | ||
196 | imx27_add_mxc_ehci_otg(&otg_pdata); | |
197 | } | |
198 | #endif | |
199 | if (!otg_mode_host) | |
200 | imx27_add_fsl_usb2_udc(&otg_device_pdata); | |
201 | ||
ec9be0de FE |
202 | } |
203 | ||
204 | static void __init mx27pdk_timer_init(void) | |
205 | { | |
206 | mx27_clocks_init(26000000); | |
207 | } | |
208 | ||
209 | static struct sys_timer mx27pdk_timer = { | |
210 | .init = mx27pdk_timer_init, | |
211 | }; | |
212 | ||
213 | MACHINE_START(MX27_3DS, "Freescale MX27PDK") | |
214 | /* maintainer: Freescale Semiconductor, Inc. */ | |
34101237 | 215 | .boot_params = MX27_PHYS_OFFSET + 0x100, |
add85a41 | 216 | .map_io = mx27_map_io, |
c5aa0ad0 | 217 | .init_irq = mx27_init_irq, |
ec9be0de FE |
218 | .init_machine = mx27pdk_init, |
219 | .timer = &mx27pdk_timer, | |
220 | MACHINE_END |