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ec9be0de FE |
1 | /* |
2 | * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * Author: Fabio Estevam <fabio.estevam@freescale.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
ec9be0de FE |
15 | */ |
16 | ||
8fdca37a UKK |
17 | /* |
18 | * This machine is known as: | |
19 | * - i.MX27 3-Stack Development System | |
20 | * - i.MX27 Platform Development Kit (i.MX27 PDK) | |
21 | */ | |
22 | ||
ec9be0de FE |
23 | #include <linux/platform_device.h> |
24 | #include <linux/gpio.h> | |
b5ec73eb | 25 | #include <linux/irq.h> |
96cf4239 FE |
26 | #include <linux/usb/otg.h> |
27 | #include <linux/usb/ulpi.h> | |
28 | #include <linux/delay.h> | |
c67a3e09 FE |
29 | #include <linux/mfd/mc13783.h> |
30 | #include <linux/spi/spi.h> | |
31 | #include <linux/regulator/machine.h> | |
96cf4239 | 32 | |
ec9be0de FE |
33 | #include <asm/mach-types.h> |
34 | #include <asm/mach/arch.h> | |
35 | #include <asm/mach/time.h> | |
36 | #include <mach/hardware.h> | |
37 | #include <mach/common.h> | |
e835d88e | 38 | #include <mach/iomux-mx27.h> |
96cf4239 | 39 | #include <mach/ulpi.h> |
92cb33f1 FE |
40 | #include <mach/irqs.h> |
41 | #include <mach/3ds_debugboard.h> | |
ec9be0de | 42 | |
d5dac4a6 | 43 | #include "devices-imx27.h" |
ec9be0de | 44 | |
b5ec73eb | 45 | #define SD1_EN_GPIO (GPIO_PORTB + 25) |
96cf4239 | 46 | #define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23) |
c67a3e09 | 47 | #define SPI2_SS0 (GPIO_PORTD + 21) |
92cb33f1 | 48 | #define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTC + 28) |
b5ec73eb | 49 | |
6c80ee51 | 50 | static const int mx27pdk_pins[] __initconst = { |
ec9be0de FE |
51 | /* UART1 */ |
52 | PE12_PF_UART1_TXD, | |
53 | PE13_PF_UART1_RXD, | |
54 | PE14_PF_UART1_CTS, | |
55 | PE15_PF_UART1_RTS, | |
56 | /* FEC */ | |
57 | PD0_AIN_FEC_TXD0, | |
58 | PD1_AIN_FEC_TXD1, | |
59 | PD2_AIN_FEC_TXD2, | |
60 | PD3_AIN_FEC_TXD3, | |
61 | PD4_AOUT_FEC_RX_ER, | |
62 | PD5_AOUT_FEC_RXD1, | |
63 | PD6_AOUT_FEC_RXD2, | |
64 | PD7_AOUT_FEC_RXD3, | |
65 | PD8_AF_FEC_MDIO, | |
66 | PD9_AIN_FEC_MDC, | |
67 | PD10_AOUT_FEC_CRS, | |
68 | PD11_AOUT_FEC_TX_CLK, | |
69 | PD12_AOUT_FEC_RXD0, | |
70 | PD13_AOUT_FEC_RX_DV, | |
71 | PD14_AOUT_FEC_RX_CLK, | |
72 | PD15_AOUT_FEC_COL, | |
73 | PD16_AIN_FEC_TX_ER, | |
74 | PF23_AIN_FEC_TX_EN, | |
b5ec73eb RP |
75 | /* SDHC1 */ |
76 | PE18_PF_SD1_D0, | |
77 | PE19_PF_SD1_D1, | |
78 | PE20_PF_SD1_D2, | |
79 | PE21_PF_SD1_D3, | |
80 | PE22_PF_SD1_CMD, | |
81 | PE23_PF_SD1_CLK, | |
82 | SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT, | |
96cf4239 FE |
83 | /* OTG */ |
84 | OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT, | |
85 | PC7_PF_USBOTG_DATA5, | |
86 | PC8_PF_USBOTG_DATA6, | |
87 | PC9_PF_USBOTG_DATA0, | |
88 | PC10_PF_USBOTG_DATA2, | |
89 | PC11_PF_USBOTG_DATA1, | |
90 | PC12_PF_USBOTG_DATA4, | |
91 | PC13_PF_USBOTG_DATA3, | |
92 | PE0_PF_USBOTG_NXT, | |
93 | PE1_PF_USBOTG_STP, | |
94 | PE2_PF_USBOTG_DIR, | |
95 | PE24_PF_USBOTG_CLK, | |
96 | PE25_PF_USBOTG_DATA7, | |
c67a3e09 FE |
97 | /* CSPI2 */ |
98 | PD22_PF_CSPI2_SCLK, | |
99 | PD23_PF_CSPI2_MISO, | |
100 | PD24_PF_CSPI2_MOSI, | |
5885f036 FE |
101 | /* I2C1 */ |
102 | PD17_PF_I2C_DATA, | |
103 | PD18_PF_I2C_CLK, | |
ec9be0de FE |
104 | }; |
105 | ||
d5dac4a6 | 106 | static const struct imxuart_platform_data uart_pdata __initconst = { |
ec9be0de FE |
107 | .flags = IMXUART_HAVE_RTSCTS, |
108 | }; | |
109 | ||
3fac6cf3 RP |
110 | /* |
111 | * Matrix keyboard | |
112 | */ | |
113 | ||
114 | static const uint32_t mx27_3ds_keymap[] = { | |
115 | KEY(0, 0, KEY_UP), | |
116 | KEY(0, 1, KEY_DOWN), | |
117 | KEY(1, 0, KEY_RIGHT), | |
118 | KEY(1, 1, KEY_LEFT), | |
119 | KEY(1, 2, KEY_ENTER), | |
120 | KEY(2, 0, KEY_F6), | |
121 | KEY(2, 1, KEY_F8), | |
122 | KEY(2, 2, KEY_F9), | |
123 | KEY(2, 3, KEY_F10), | |
124 | }; | |
125 | ||
3f880141 | 126 | static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = { |
3fac6cf3 RP |
127 | .keymap = mx27_3ds_keymap, |
128 | .keymap_size = ARRAY_SIZE(mx27_3ds_keymap), | |
129 | }; | |
130 | ||
b5ec73eb RP |
131 | static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq, |
132 | void *data) | |
133 | { | |
134 | return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING | | |
135 | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data); | |
136 | } | |
137 | ||
138 | static void mx27_3ds_sdhc1_exit(struct device *dev, void *data) | |
139 | { | |
140 | free_irq(IRQ_GPIOB(26), data); | |
141 | } | |
142 | ||
9d3d945a | 143 | static const struct imxmmc_platform_data sdhc1_pdata __initconst = { |
b5ec73eb RP |
144 | .init = mx27_3ds_sdhc1_init, |
145 | .exit = mx27_3ds_sdhc1_exit, | |
146 | }; | |
147 | ||
148 | static void mx27_3ds_sdhc1_enable_level_translator(void) | |
149 | { | |
150 | /* Turn on TXB0108 OE pin */ | |
151 | gpio_request(SD1_EN_GPIO, "sd1_enable"); | |
152 | gpio_direction_output(SD1_EN_GPIO, 1); | |
153 | } | |
154 | ||
96cf4239 FE |
155 | |
156 | static int otg_phy_init(void) | |
157 | { | |
158 | gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset"); | |
159 | gpio_direction_output(OTG_PHY_RESET_GPIO, 0); | |
160 | mdelay(1); | |
161 | gpio_set_value(OTG_PHY_RESET_GPIO, 1); | |
162 | return 0; | |
163 | } | |
164 | ||
4bd597b6 SH |
165 | static int mx27_3ds_otg_init(struct platform_device *pdev) |
166 | { | |
167 | return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI); | |
168 | } | |
96cf4239 FE |
169 | |
170 | static struct mxc_usbh_platform_data otg_pdata __initdata = { | |
4bd597b6 | 171 | .init = mx27_3ds_otg_init, |
96cf4239 | 172 | .portsc = MXC_EHCI_MODE_ULPI, |
96cf4239 | 173 | }; |
96cf4239 FE |
174 | |
175 | static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |
176 | .operating_mode = FSL_USB2_DR_DEVICE, | |
177 | .phy_mode = FSL_USB2_PHY_ULPI, | |
178 | }; | |
179 | ||
180 | static int otg_mode_host; | |
181 | ||
182 | static int __init mx27_3ds_otg_mode(char *options) | |
183 | { | |
184 | if (!strcmp(options, "host")) | |
185 | otg_mode_host = 1; | |
186 | else if (!strcmp(options, "device")) | |
187 | otg_mode_host = 0; | |
188 | else | |
189 | pr_info("otg_mode neither \"host\" nor \"device\". " | |
190 | "Defaulting to device\n"); | |
191 | return 0; | |
192 | } | |
193 | __setup("otg_mode=", mx27_3ds_otg_mode); | |
194 | ||
c67a3e09 FE |
195 | /* Regulators */ |
196 | static struct regulator_consumer_supply vmmc1_consumers[] = { | |
197 | REGULATOR_SUPPLY("lcd_2v8", NULL), | |
198 | }; | |
199 | ||
200 | static struct regulator_init_data vmmc1_init = { | |
201 | .constraints = { | |
202 | .min_uV = 2800000, | |
203 | .max_uV = 2800000, | |
204 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
205 | }, | |
206 | .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers), | |
207 | .consumer_supplies = vmmc1_consumers, | |
208 | }; | |
209 | ||
210 | static struct regulator_consumer_supply vgen_consumers[] = { | |
211 | REGULATOR_SUPPLY("vdd_lcdio", NULL), | |
212 | }; | |
213 | ||
214 | static struct regulator_init_data vgen_init = { | |
215 | .constraints = { | |
216 | .min_uV = 1800000, | |
217 | .max_uV = 1800000, | |
218 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
219 | }, | |
220 | .num_consumer_supplies = ARRAY_SIZE(vgen_consumers), | |
221 | .consumer_supplies = vgen_consumers, | |
222 | }; | |
223 | ||
5836372e | 224 | static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = { |
c67a3e09 | 225 | { |
074cee92 | 226 | .id = MC13783_REG_VMMC1, |
c67a3e09 FE |
227 | .init_data = &vmmc1_init, |
228 | }, { | |
074cee92 | 229 | .id = MC13783_REG_VGEN, |
c67a3e09 FE |
230 | .init_data = &vgen_init, |
231 | }, | |
232 | }; | |
233 | ||
234 | /* MC13783 */ | |
4ec1b54c AS |
235 | static struct mc13xxx_platform_data mc13783_pdata = { |
236 | .regulators = { | |
237 | .regulators = mx27_3ds_regulators, | |
238 | .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), | |
239 | ||
240 | }, | |
241 | .flags = MC13783_USE_REGULATOR, | |
c67a3e09 FE |
242 | }; |
243 | ||
244 | /* SPI */ | |
245 | static int spi2_internal_chipselect[] = {SPI2_SS0}; | |
246 | ||
247 | static const struct spi_imx_master spi2_pdata __initconst = { | |
248 | .chipselect = spi2_internal_chipselect, | |
249 | .num_chipselect = ARRAY_SIZE(spi2_internal_chipselect), | |
250 | }; | |
251 | ||
252 | static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { | |
253 | { | |
254 | .modalias = "mc13783", | |
255 | .max_speed_hz = 1000000, | |
256 | .bus_num = 1, | |
257 | .chip_select = 0, /* SS0 */ | |
258 | .platform_data = &mc13783_pdata, | |
259 | .irq = IRQ_GPIOC(14), | |
260 | .mode = SPI_CS_HIGH, | |
261 | }, | |
262 | }; | |
263 | ||
5885f036 FE |
264 | static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = { |
265 | .bitrate = 100000, | |
266 | }; | |
96cf4239 | 267 | |
ec9be0de FE |
268 | static void __init mx27pdk_init(void) |
269 | { | |
270 | mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), | |
271 | "mx27pdk"); | |
b5ec73eb | 272 | mx27_3ds_sdhc1_enable_level_translator(); |
d5dac4a6 | 273 | imx27_add_imx_uart0(&uart_pdata); |
6bd96f3c | 274 | imx27_add_fec(NULL); |
3f880141 | 275 | imx27_add_imx_keypad(&mx27_3ds_keymap_data); |
9d3d945a | 276 | imx27_add_mxc_mmc(0, &sdhc1_pdata); |
8be9252f | 277 | imx27_add_imx2_wdt(NULL); |
96cf4239 | 278 | otg_phy_init(); |
48f6b099 | 279 | |
96cf4239 | 280 | if (otg_mode_host) { |
48f6b099 SH |
281 | otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | |
282 | ULPI_OTG_DRVVBUS_EXT); | |
96cf4239 | 283 | |
48f6b099 SH |
284 | if (otg_pdata.otg) |
285 | imx27_add_mxc_ehci_otg(&otg_pdata); | |
96cf4239 | 286 | } |
48f6b099 | 287 | |
96cf4239 FE |
288 | if (!otg_mode_host) |
289 | imx27_add_fsl_usb2_udc(&otg_device_pdata); | |
290 | ||
c67a3e09 FE |
291 | imx27_add_spi_imx1(&spi2_pdata); |
292 | spi_register_board_info(mx27_3ds_spi_devs, | |
293 | ARRAY_SIZE(mx27_3ds_spi_devs)); | |
92cb33f1 FE |
294 | |
295 | if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) | |
296 | pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); | |
5885f036 | 297 | imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); |
ec9be0de FE |
298 | } |
299 | ||
300 | static void __init mx27pdk_timer_init(void) | |
301 | { | |
302 | mx27_clocks_init(26000000); | |
303 | } | |
304 | ||
305 | static struct sys_timer mx27pdk_timer = { | |
306 | .init = mx27pdk_timer_init, | |
307 | }; | |
308 | ||
309 | MACHINE_START(MX27_3DS, "Freescale MX27PDK") | |
310 | /* maintainer: Freescale Semiconductor, Inc. */ | |
3dac2196 UKK |
311 | .boot_params = MX27_PHYS_OFFSET + 0x100, |
312 | .map_io = mx27_map_io, | |
313 | .init_early = imx27_init_early, | |
314 | .init_irq = mx27_init_irq, | |
315 | .timer = &mx27pdk_timer, | |
316 | .init_machine = mx27pdk_init, | |
ec9be0de | 317 | MACHINE_END |