ARM: restart: mv78xx0: use new restart hook
[deliverable/linux.git] / arch / arm / mach-imx / mach-mx27_3ds.c
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1/*
2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * Author: Fabio Estevam <fabio.estevam@freescale.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
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15 */
16
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17/*
18 * This machine is known as:
19 * - i.MX27 3-Stack Development System
20 * - i.MX27 Platform Development Kit (i.MX27 PDK)
21 */
22
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23#include <linux/platform_device.h>
24#include <linux/gpio.h>
b5ec73eb 25#include <linux/irq.h>
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26#include <linux/usb/otg.h>
27#include <linux/usb/ulpi.h>
28#include <linux/delay.h>
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29#include <linux/mfd/mc13783.h>
30#include <linux/spi/spi.h>
31#include <linux/regulator/machine.h>
1abcb4cc 32#include <linux/spi/l4f00242t03.h>
96cf4239 33
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34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/time.h>
37#include <mach/hardware.h>
38#include <mach/common.h>
e835d88e 39#include <mach/iomux-mx27.h>
96cf4239 40#include <mach/ulpi.h>
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41#include <mach/irqs.h>
42#include <mach/3ds_debugboard.h>
ec9be0de 43
d5dac4a6 44#include "devices-imx27.h"
ec9be0de 45
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46#define SD1_EN_GPIO IMX_GPIO_NR(2, 25)
47#define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23)
48#define SPI2_SS0 IMX_GPIO_NR(4, 21)
49#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28))
aec250dc 50#define PMIC_INT IMX_GPIO_NR(3, 14)
1abcb4cc 51#define SPI1_SS0 IMX_GPIO_NR(4, 28)
c084473d 52#define SD1_CD IMX_GPIO_NR(2, 26)
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53#define LCD_RESET IMX_GPIO_NR(1, 3)
54#define LCD_ENABLE IMX_GPIO_NR(1, 31)
b5ec73eb 55
6c80ee51 56static const int mx27pdk_pins[] __initconst = {
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57 /* UART1 */
58 PE12_PF_UART1_TXD,
59 PE13_PF_UART1_RXD,
60 PE14_PF_UART1_CTS,
61 PE15_PF_UART1_RTS,
62 /* FEC */
63 PD0_AIN_FEC_TXD0,
64 PD1_AIN_FEC_TXD1,
65 PD2_AIN_FEC_TXD2,
66 PD3_AIN_FEC_TXD3,
67 PD4_AOUT_FEC_RX_ER,
68 PD5_AOUT_FEC_RXD1,
69 PD6_AOUT_FEC_RXD2,
70 PD7_AOUT_FEC_RXD3,
71 PD8_AF_FEC_MDIO,
72 PD9_AIN_FEC_MDC,
73 PD10_AOUT_FEC_CRS,
74 PD11_AOUT_FEC_TX_CLK,
75 PD12_AOUT_FEC_RXD0,
76 PD13_AOUT_FEC_RX_DV,
77 PD14_AOUT_FEC_RX_CLK,
78 PD15_AOUT_FEC_COL,
79 PD16_AIN_FEC_TX_ER,
80 PF23_AIN_FEC_TX_EN,
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81 /* SDHC1 */
82 PE18_PF_SD1_D0,
83 PE19_PF_SD1_D1,
84 PE20_PF_SD1_D2,
85 PE21_PF_SD1_D3,
86 PE22_PF_SD1_CMD,
87 PE23_PF_SD1_CLK,
88 SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT,
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89 /* OTG */
90 OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT,
91 PC7_PF_USBOTG_DATA5,
92 PC8_PF_USBOTG_DATA6,
93 PC9_PF_USBOTG_DATA0,
94 PC10_PF_USBOTG_DATA2,
95 PC11_PF_USBOTG_DATA1,
96 PC12_PF_USBOTG_DATA4,
97 PC13_PF_USBOTG_DATA3,
98 PE0_PF_USBOTG_NXT,
99 PE1_PF_USBOTG_STP,
100 PE2_PF_USBOTG_DIR,
101 PE24_PF_USBOTG_CLK,
102 PE25_PF_USBOTG_DATA7,
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103 /* CSPI1 */
104 PD31_PF_CSPI1_MOSI,
105 PD30_PF_CSPI1_MISO,
106 PD29_PF_CSPI1_SCLK,
107 PD25_PF_CSPI1_RDY,
108 SPI1_SS0 | GPIO_GPIO | GPIO_OUT,
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109 /* CSPI2 */
110 PD22_PF_CSPI2_SCLK,
111 PD23_PF_CSPI2_MISO,
112 PD24_PF_CSPI2_MOSI,
aec250dc 113 SPI2_SS0 | GPIO_GPIO | GPIO_OUT,
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114 /* I2C1 */
115 PD17_PF_I2C_DATA,
116 PD18_PF_I2C_CLK,
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117 /* PMIC INT */
118 PMIC_INT | GPIO_GPIO | GPIO_IN,
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119 /* LCD */
120 PA5_PF_LSCLK,
121 PA6_PF_LD0,
122 PA7_PF_LD1,
123 PA8_PF_LD2,
124 PA9_PF_LD3,
125 PA10_PF_LD4,
126 PA11_PF_LD5,
127 PA12_PF_LD6,
128 PA13_PF_LD7,
129 PA14_PF_LD8,
130 PA15_PF_LD9,
131 PA16_PF_LD10,
132 PA17_PF_LD11,
133 PA18_PF_LD12,
134 PA19_PF_LD13,
135 PA20_PF_LD14,
136 PA21_PF_LD15,
137 PA22_PF_LD16,
138 PA23_PF_LD17,
139 PA28_PF_HSYNC,
140 PA29_PF_VSYNC,
141 PA30_PF_CONTRAST,
142 LCD_ENABLE | GPIO_GPIO | GPIO_OUT,
143 LCD_RESET | GPIO_GPIO | GPIO_OUT,
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144};
145
d5dac4a6 146static const struct imxuart_platform_data uart_pdata __initconst = {
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147 .flags = IMXUART_HAVE_RTSCTS,
148};
149
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150/*
151 * Matrix keyboard
152 */
153
154static const uint32_t mx27_3ds_keymap[] = {
155 KEY(0, 0, KEY_UP),
156 KEY(0, 1, KEY_DOWN),
157 KEY(1, 0, KEY_RIGHT),
158 KEY(1, 1, KEY_LEFT),
159 KEY(1, 2, KEY_ENTER),
160 KEY(2, 0, KEY_F6),
161 KEY(2, 1, KEY_F8),
162 KEY(2, 2, KEY_F9),
163 KEY(2, 3, KEY_F10),
164};
165
3f880141 166static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
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167 .keymap = mx27_3ds_keymap,
168 .keymap_size = ARRAY_SIZE(mx27_3ds_keymap),
169};
170
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171static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
172 void *data)
173{
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174 return request_irq(gpio_to_irq(SD1_CD), detect_irq,
175 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
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176}
177
178static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
179{
c084473d 180 free_irq(gpio_to_irq(SD1_CD), data);
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181}
182
9d3d945a 183static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
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184 .init = mx27_3ds_sdhc1_init,
185 .exit = mx27_3ds_sdhc1_exit,
186};
187
188static void mx27_3ds_sdhc1_enable_level_translator(void)
189{
190 /* Turn on TXB0108 OE pin */
191 gpio_request(SD1_EN_GPIO, "sd1_enable");
192 gpio_direction_output(SD1_EN_GPIO, 1);
193}
194
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195
196static int otg_phy_init(void)
197{
198 gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset");
199 gpio_direction_output(OTG_PHY_RESET_GPIO, 0);
200 mdelay(1);
201 gpio_set_value(OTG_PHY_RESET_GPIO, 1);
202 return 0;
203}
204
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205static int mx27_3ds_otg_init(struct platform_device *pdev)
206{
207 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
208}
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209
210static struct mxc_usbh_platform_data otg_pdata __initdata = {
4bd597b6 211 .init = mx27_3ds_otg_init,
96cf4239 212 .portsc = MXC_EHCI_MODE_ULPI,
96cf4239 213};
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214
215static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
216 .operating_mode = FSL_USB2_DR_DEVICE,
217 .phy_mode = FSL_USB2_PHY_ULPI,
218};
219
220static int otg_mode_host;
221
222static int __init mx27_3ds_otg_mode(char *options)
223{
224 if (!strcmp(options, "host"))
225 otg_mode_host = 1;
226 else if (!strcmp(options, "device"))
227 otg_mode_host = 0;
228 else
229 pr_info("otg_mode neither \"host\" nor \"device\". "
230 "Defaulting to device\n");
231 return 0;
232}
233__setup("otg_mode=", mx27_3ds_otg_mode);
234
c67a3e09 235/* Regulators */
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236static struct regulator_init_data gpo_init = {
237 .constraints = {
238 .boot_on = 1,
239 .always_on = 1,
240 }
241};
242
c67a3e09 243static struct regulator_consumer_supply vmmc1_consumers[] = {
0556dc34 244 REGULATOR_SUPPLY("vcore", "spi0.0"),
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245};
246
247static struct regulator_init_data vmmc1_init = {
248 .constraints = {
249 .min_uV = 2800000,
250 .max_uV = 2800000,
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251 .apply_uV = 1,
252 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
253 REGULATOR_CHANGE_STATUS,
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254 },
255 .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
256 .consumer_supplies = vmmc1_consumers,
257};
258
259static struct regulator_consumer_supply vgen_consumers[] = {
0556dc34 260 REGULATOR_SUPPLY("vdd", "spi0.0"),
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261};
262
263static struct regulator_init_data vgen_init = {
264 .constraints = {
265 .min_uV = 1800000,
266 .max_uV = 1800000,
267 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
268 },
269 .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
270 .consumer_supplies = vgen_consumers,
271};
272
5836372e 273static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
c67a3e09 274 {
074cee92 275 .id = MC13783_REG_VMMC1,
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276 .init_data = &vmmc1_init,
277 }, {
074cee92 278 .id = MC13783_REG_VGEN,
c67a3e09 279 .init_data = &vgen_init,
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280 }, {
281 .id = MC13783_REG_GPO1, /* Turn on 1.8V */
282 .init_data = &gpo_init,
283 }, {
284 .id = MC13783_REG_GPO3, /* Turn on 3.3V */
285 .init_data = &gpo_init,
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286 },
287};
288
289/* MC13783 */
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290static struct mc13xxx_platform_data mc13783_pdata = {
291 .regulators = {
292 .regulators = mx27_3ds_regulators,
293 .num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
294
295 },
46621ebb 296 .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC,
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297};
298
299/* SPI */
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300static int spi1_chipselect[] = {SPI1_SS0};
301
302static const struct spi_imx_master spi1_pdata __initconst = {
303 .chipselect = spi1_chipselect,
304 .num_chipselect = ARRAY_SIZE(spi1_chipselect),
305};
306
6d2385ab 307static int spi2_chipselect[] = {SPI2_SS0};
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308
309static const struct spi_imx_master spi2_pdata __initconst = {
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310 .chipselect = spi2_chipselect,
311 .num_chipselect = ARRAY_SIZE(spi2_chipselect),
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312};
313
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314static struct imx_fb_videomode mx27_3ds_modes[] = {
315 { /* 480x640 @ 60 Hz */
316 .mode = {
317 .name = "Epson-VGA",
318 .refresh = 60,
319 .xres = 480,
320 .yres = 640,
321 .pixclock = 41701,
322 .left_margin = 20,
323 .right_margin = 41,
324 .upper_margin = 10,
325 .lower_margin = 5,
326 .hsync_len = 20,
327 .vsync_len = 10,
328 .sync = FB_SYNC_OE_ACT_HIGH |
329 FB_SYNC_CLK_INVERT,
330 .vmode = FB_VMODE_NONINTERLACED,
331 .flag = 0,
332 },
333 .bpp = 16,
334 .pcr = 0xFAC08B82,
335 },
336};
337
338static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = {
339 .mode = mx27_3ds_modes,
340 .num_modes = ARRAY_SIZE(mx27_3ds_modes),
341 .pwmr = 0x00A903FF,
342 .lscr1 = 0x00120300,
343 .dmacr = 0x00020010,
344};
345
346/* LCD */
347static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = {
348 .reset_gpio = LCD_RESET,
349 .data_enable_gpio = LCD_ENABLE,
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350};
351
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352static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
353 {
354 .modalias = "mc13783",
355 .max_speed_hz = 1000000,
356 .bus_num = 1,
357 .chip_select = 0, /* SS0 */
358 .platform_data = &mc13783_pdata,
e309fb18 359 .irq = IMX_GPIO_TO_IRQ(PMIC_INT),
c67a3e09 360 .mode = SPI_CS_HIGH,
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361 }, {
362 .modalias = "l4f00242t03",
363 .max_speed_hz = 5000000,
364 .bus_num = 0,
365 .chip_select = 0, /* SS0 */
366 .platform_data = &mx27_3ds_lcd_pdata,
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367 },
368};
369
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370static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = {
371 .bitrate = 100000,
372};
96cf4239 373
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374static void __init mx27pdk_init(void)
375{
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376 imx27_soc_init();
377
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378 mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
379 "mx27pdk");
b5ec73eb 380 mx27_3ds_sdhc1_enable_level_translator();
d5dac4a6 381 imx27_add_imx_uart0(&uart_pdata);
6bd96f3c 382 imx27_add_fec(NULL);
3f880141 383 imx27_add_imx_keypad(&mx27_3ds_keymap_data);
9d3d945a 384 imx27_add_mxc_mmc(0, &sdhc1_pdata);
8be9252f 385 imx27_add_imx2_wdt(NULL);
96cf4239 386 otg_phy_init();
48f6b099 387
96cf4239 388 if (otg_mode_host) {
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389 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
390 ULPI_OTG_DRVVBUS_EXT);
96cf4239 391
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392 if (otg_pdata.otg)
393 imx27_add_mxc_ehci_otg(&otg_pdata);
96cf4239 394 }
48f6b099 395
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396 if (!otg_mode_host)
397 imx27_add_fsl_usb2_udc(&otg_device_pdata);
398
c67a3e09 399 imx27_add_spi_imx1(&spi2_pdata);
1abcb4cc 400 imx27_add_spi_imx0(&spi1_pdata);
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401 spi_register_board_info(mx27_3ds_spi_devs,
402 ARRAY_SIZE(mx27_3ds_spi_devs));
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403
404 if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT))
405 pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
5885f036 406 imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
1abcb4cc 407 imx27_add_imx_fb(&mx27_3ds_fb_data);
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408}
409
410static void __init mx27pdk_timer_init(void)
411{
412 mx27_clocks_init(26000000);
413}
414
415static struct sys_timer mx27pdk_timer = {
416 .init = mx27pdk_timer_init,
417};
418
419MACHINE_START(MX27_3DS, "Freescale MX27PDK")
420 /* maintainer: Freescale Semiconductor, Inc. */
dc8f1907 421 .atag_offset = 0x100,
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422 .map_io = mx27_map_io,
423 .init_early = imx27_init_early,
424 .init_irq = mx27_init_irq,
ffa2ea3f 425 .handle_irq = imx27_handle_irq,
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426 .timer = &mx27pdk_timer,
427 .init_machine = mx27pdk_init,
ec9be0de 428MACHINE_END
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