Commit | Line | Data |
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988d2d49 VL |
1 | /* |
2 | * Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
988d2d49 VL |
13 | */ |
14 | ||
b23f1534 | 15 | #include <linux/delay.h> |
04ea3c80 | 16 | #include <linux/dma-mapping.h> |
5a0e3ad6 | 17 | #include <linux/gfp.h> |
45b131a7 | 18 | #include <linux/gpio.h> |
988d2d49 | 19 | #include <linux/init.h> |
45b131a7 | 20 | #include <linux/interrupt.h> |
9e907416 | 21 | #include <linux/moduleparam.h> |
77aa561d | 22 | #include <linux/leds.h> |
220bbcea | 23 | #include <linux/memory.h> |
988d2d49 VL |
24 | #include <linux/mtd/physmap.h> |
25 | #include <linux/mtd/partitions.h> | |
220bbcea | 26 | #include <linux/platform_device.h> |
65da9791 VL |
27 | #include <linux/regulator/machine.h> |
28 | #include <linux/mfd/mc13783.h> | |
29 | #include <linux/spi/spi.h> | |
220bbcea | 30 | #include <linux/types.h> |
031e9127 | 31 | #include <linux/memblock.h> |
40d97b89 PR |
32 | #include <linux/clk.h> |
33 | #include <linux/io.h> | |
34 | #include <linux/err.h> | |
1f08c112 | 35 | #include <linux/input.h> |
988d2d49 | 36 | |
d67d1075 VL |
37 | #include <linux/usb/otg.h> |
38 | #include <linux/usb/ulpi.h> | |
39 | ||
988d2d49 VL |
40 | #include <asm/mach-types.h> |
41 | #include <asm/mach/arch.h> | |
42 | #include <asm/mach/time.h> | |
43 | #include <asm/mach/map.h> | |
716a3dc2 | 44 | #include <asm/memblock.h> |
82906b13 | 45 | #include <linux/platform_data/asoc-imx-ssi.h> |
988d2d49 | 46 | |
3ed0bcb4 | 47 | #include "board-mx31moboard.h" |
e3372474 | 48 | #include "common.h" |
4a9b8b0b | 49 | #include "devices-imx31.h" |
641dfe8b | 50 | #include "ehci.h" |
50f2de61 | 51 | #include "hardware.h" |
267dd34c | 52 | #include "iomux-mx3.h" |
39ef6340 | 53 | #include "ulpi.h" |
988d2d49 | 54 | |
220bbcea VL |
55 | static unsigned int moboard_pins[] = { |
56 | /* UART0 */ | |
220bbcea | 57 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, |
421bf82e | 58 | MX31_PIN_CTS1__GPIO2_7, |
220bbcea VL |
59 | /* UART4 */ |
60 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | |
61 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | |
56c7a45b VL |
62 | /* I2C0 */ |
63 | MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL, | |
64 | /* I2C1 */ | |
65 | MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL, | |
66 | /* SDHC1 */ | |
67 | MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2, | |
68 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, | |
69 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, | |
70 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, | |
b23f1534 VL |
71 | /* USB reset */ |
72 | MX31_PIN_GPIO1_0__GPIO1_0, | |
88b05647 VL |
73 | /* USB OTG */ |
74 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | |
75 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | |
76 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | |
77 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | |
78 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | |
79 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | |
80 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | |
81 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | |
82 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | |
83 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | |
84 | MX31_PIN_USB_OC__GPIO1_30, | |
d67d1075 VL |
85 | /* USB H2 */ |
86 | MX31_PIN_USBH2_DATA0__USBH2_DATA0, | |
87 | MX31_PIN_USBH2_DATA1__USBH2_DATA1, | |
88 | MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3, | |
89 | MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5, | |
90 | MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7, | |
91 | MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR, | |
92 | MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP, | |
93 | MX31_PIN_SCK6__GPIO1_25, | |
77aa561d VL |
94 | /* LEDs */ |
95 | MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, | |
96 | MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, | |
65da9791 VL |
97 | /* SPI1 */ |
98 | MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO, | |
99 | MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | |
100 | MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2, | |
101 | /* Atlas IRQ */ | |
102 | MX31_PIN_GPIO1_3__GPIO1_3, | |
103 | /* SPI2 */ | |
104 | MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO, | |
105 | MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY, | |
106 | MX31_PIN_CSPI2_SS1__CSPI3_SS1, | |
2f7b9451 PR |
107 | /* SSI */ |
108 | MX31_PIN_STXD4__STXD4, MX31_PIN_SRXD4__SRXD4, | |
109 | MX31_PIN_SCK4__SCK4, MX31_PIN_SFS4__SFS4, | |
220bbcea VL |
110 | }; |
111 | ||
988d2d49 | 112 | static struct physmap_flash_data mx31moboard_flash_data = { |
27ad4bf7 | 113 | .width = 2, |
988d2d49 VL |
114 | }; |
115 | ||
116 | static struct resource mx31moboard_flash_resource = { | |
117 | .start = 0xa0000000, | |
118 | .end = 0xa1ffffff, | |
119 | .flags = IORESOURCE_MEM, | |
120 | }; | |
121 | ||
122 | static struct platform_device mx31moboard_flash = { | |
123 | .name = "physmap-flash", | |
124 | .id = 0, | |
125 | .dev = { | |
126 | .platform_data = &mx31moboard_flash_data, | |
127 | }, | |
128 | .resource = &mx31moboard_flash_resource, | |
129 | .num_resources = 1, | |
130 | }; | |
131 | ||
45af780a | 132 | static void __init moboard_uart0_init(void) |
421bf82e | 133 | { |
45af780a AS |
134 | if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack")) { |
135 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0); | |
5109a459 | 136 | gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1)); |
45af780a | 137 | } |
421bf82e VL |
138 | } |
139 | ||
16cf5c41 | 140 | static const struct imxuart_platform_data uart0_pdata __initconst = { |
421bf82e VL |
141 | }; |
142 | ||
16cf5c41 | 143 | static const struct imxuart_platform_data uart4_pdata __initconst = { |
988d2d49 VL |
144 | .flags = IMXUART_HAVE_RTSCTS, |
145 | }; | |
146 | ||
4a9b8b0b | 147 | static const struct imxi2c_platform_data moboard_i2c0_data __initconst = { |
4ec6ecc7 VL |
148 | .bitrate = 400000, |
149 | }; | |
150 | ||
4a9b8b0b | 151 | static const struct imxi2c_platform_data moboard_i2c1_data __initconst = { |
4ec6ecc7 VL |
152 | .bitrate = 100000, |
153 | }; | |
154 | ||
65da9791 VL |
155 | static int moboard_spi1_cs[] = { |
156 | MXC_SPI_CS(0), | |
157 | MXC_SPI_CS(2), | |
158 | }; | |
159 | ||
06606ff1 | 160 | static const struct spi_imx_master moboard_spi1_pdata __initconst = { |
65da9791 VL |
161 | .chipselect = moboard_spi1_cs, |
162 | .num_chipselect = ARRAY_SIZE(moboard_spi1_cs), | |
163 | }; | |
164 | ||
165 | static struct regulator_consumer_supply sdhc_consumers[] = { | |
166 | { | |
7f917a8d | 167 | .dev_name = "imx31-mmc.0", |
65da9791 VL |
168 | .supply = "sdhc0_vcc", |
169 | }, | |
170 | { | |
7f917a8d | 171 | .dev_name = "imx31-mmc.1", |
65da9791 VL |
172 | .supply = "sdhc1_vcc", |
173 | }, | |
174 | }; | |
175 | ||
176 | static struct regulator_init_data sdhc_vreg_data = { | |
177 | .constraints = { | |
178 | .min_uV = 2700000, | |
179 | .max_uV = 3000000, | |
180 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
181 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | |
182 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
183 | REGULATOR_MODE_FAST, | |
184 | .always_on = 0, | |
185 | .boot_on = 1, | |
186 | }, | |
187 | .num_consumer_supplies = ARRAY_SIZE(sdhc_consumers), | |
188 | .consumer_supplies = sdhc_consumers, | |
189 | }; | |
190 | ||
191 | static struct regulator_consumer_supply cam_consumers[] = { | |
192 | { | |
afa77ef3 UKK |
193 | .dev_name = "mx3_camera.0", |
194 | .supply = "cam_vcc", | |
65da9791 VL |
195 | }, |
196 | }; | |
197 | ||
198 | static struct regulator_init_data cam_vreg_data = { | |
199 | .constraints = { | |
200 | .min_uV = 2700000, | |
201 | .max_uV = 3000000, | |
202 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
203 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | |
204 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
205 | REGULATOR_MODE_FAST, | |
206 | .always_on = 0, | |
207 | .boot_on = 1, | |
208 | }, | |
209 | .num_consumer_supplies = ARRAY_SIZE(cam_consumers), | |
210 | .consumer_supplies = cam_consumers, | |
211 | }; | |
212 | ||
5836372e | 213 | static struct mc13xxx_regulator_init_data moboard_regulators[] = { |
65da9791 | 214 | { |
57c78e35 | 215 | .id = MC13783_REG_VMMC1, |
65da9791 VL |
216 | .init_data = &sdhc_vreg_data, |
217 | }, | |
218 | { | |
57c78e35 | 219 | .id = MC13783_REG_VCAM, |
65da9791 VL |
220 | .init_data = &cam_vreg_data, |
221 | }, | |
222 | }; | |
223 | ||
d3efa4ed | 224 | static struct mc13xxx_led_platform_data moboard_led[] = { |
a7cca8ae PR |
225 | { |
226 | .id = MC13783_LED_R1, | |
227 | .name = "coreboard-led-4:red", | |
a7cca8ae PR |
228 | }, |
229 | { | |
230 | .id = MC13783_LED_G1, | |
231 | .name = "coreboard-led-4:green", | |
a7cca8ae PR |
232 | }, |
233 | { | |
234 | .id = MC13783_LED_B1, | |
235 | .name = "coreboard-led-4:blue", | |
a7cca8ae PR |
236 | }, |
237 | { | |
238 | .id = MC13783_LED_R2, | |
239 | .name = "coreboard-led-5:red", | |
a7cca8ae PR |
240 | }, |
241 | { | |
242 | .id = MC13783_LED_G2, | |
243 | .name = "coreboard-led-5:green", | |
a7cca8ae PR |
244 | }, |
245 | { | |
246 | .id = MC13783_LED_B2, | |
247 | .name = "coreboard-led-5:blue", | |
a7cca8ae PR |
248 | }, |
249 | }; | |
250 | ||
d3efa4ed | 251 | static struct mc13xxx_leds_platform_data moboard_leds = { |
a7cca8ae PR |
252 | .num_leds = ARRAY_SIZE(moboard_led), |
253 | .led = moboard_led, | |
9d263813 AS |
254 | .led_control[0] = MC13783_LED_C0_ENABLE | MC13783_LED_C0_ABMODE(0), |
255 | .led_control[1] = MC13783_LED_C1_SLEWLIM, | |
256 | .led_control[2] = MC13783_LED_C2_SLEWLIM, | |
01a7a063 AS |
257 | .led_control[3] = MC13783_LED_C3_PERIOD(0) | |
258 | MC13783_LED_C3_CURRENT_R1(2) | | |
259 | MC13783_LED_C3_CURRENT_G1(2) | | |
260 | MC13783_LED_C3_CURRENT_B1(2), | |
261 | .led_control[4] = MC13783_LED_C4_PERIOD(0) | | |
262 | MC13783_LED_C4_CURRENT_R2(3) | | |
263 | MC13783_LED_C4_CURRENT_G2(3) | | |
264 | MC13783_LED_C4_CURRENT_B2(3), | |
a7cca8ae PR |
265 | }; |
266 | ||
d3efa4ed | 267 | static struct mc13xxx_buttons_platform_data moboard_buttons = { |
1f08c112 PR |
268 | .b1on_flags = MC13783_BUTTON_DBNC_750MS | MC13783_BUTTON_ENABLE | |
269 | MC13783_BUTTON_POL_INVERT, | |
270 | .b1on_key = KEY_POWER, | |
271 | }; | |
272 | ||
2f7b9451 PR |
273 | static struct mc13xxx_codec_platform_data moboard_codec = { |
274 | .dac_ssi_port = MC13783_SSI1_PORT, | |
275 | .adc_ssi_port = MC13783_SSI1_PORT, | |
276 | }; | |
277 | ||
5836372e | 278 | static struct mc13xxx_platform_data moboard_pmic = { |
4ec1b54c AS |
279 | .regulators = { |
280 | .regulators = moboard_regulators, | |
281 | .num_regulators = ARRAY_SIZE(moboard_regulators), | |
282 | }, | |
a7cca8ae | 283 | .leds = &moboard_leds, |
1f08c112 | 284 | .buttons = &moboard_buttons, |
2f7b9451 PR |
285 | .codec = &moboard_codec, |
286 | .flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC | MC13XXX_USE_CODEC, | |
287 | }; | |
288 | ||
289 | static struct imx_ssi_platform_data moboard_ssi_pdata = { | |
290 | .flags = IMX_SSI_DMA | IMX_SSI_NET, | |
65da9791 VL |
291 | }; |
292 | ||
293 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | |
294 | { | |
295 | .modalias = "mc13783", | |
ed175343 | 296 | /* irq number is run-time assigned */ |
65da9791 VL |
297 | .max_speed_hz = 300000, |
298 | .bus_num = 1, | |
299 | .chip_select = 0, | |
300 | .platform_data = &moboard_pmic, | |
301 | .mode = SPI_CS_HIGH, | |
302 | }, | |
65da9791 VL |
303 | }; |
304 | ||
305 | static int moboard_spi2_cs[] = { | |
306 | MXC_SPI_CS(1), | |
307 | }; | |
308 | ||
06606ff1 | 309 | static const struct spi_imx_master moboard_spi2_pdata __initconst = { |
65da9791 VL |
310 | .chipselect = moboard_spi2_cs, |
311 | .num_chipselect = ARRAY_SIZE(moboard_spi2_cs), | |
312 | }; | |
313 | ||
45b131a7 VL |
314 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) |
315 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) | |
316 | ||
317 | static int moboard_sdhc1_get_ro(struct device *dev) | |
318 | { | |
563abb4b | 319 | return !gpio_get_value(SDHC1_WP); |
45b131a7 VL |
320 | } |
321 | ||
322 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | |
323 | void *data) | |
324 | { | |
4f163eb8 SH |
325 | int ret; |
326 | ||
327 | ret = gpio_request(SDHC1_CD, "sdhc-detect"); | |
328 | if (ret) | |
329 | return ret; | |
330 | ||
331 | gpio_direction_input(SDHC1_CD); | |
332 | ||
333 | ret = gpio_request(SDHC1_WP, "sdhc-wp"); | |
334 | if (ret) | |
335 | goto err_gpio_free; | |
336 | gpio_direction_input(SDHC1_WP); | |
337 | ||
338 | ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq, | |
45b131a7 VL |
339 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
340 | "sdhc1-card-detect", data); | |
4f163eb8 SH |
341 | if (ret) |
342 | goto err_gpio_free_2; | |
343 | ||
344 | return 0; | |
345 | ||
346 | err_gpio_free_2: | |
347 | gpio_free(SDHC1_WP); | |
348 | err_gpio_free: | |
349 | gpio_free(SDHC1_CD); | |
350 | ||
351 | return ret; | |
45b131a7 VL |
352 | } |
353 | ||
354 | static void moboard_sdhc1_exit(struct device *dev, void *data) | |
355 | { | |
356 | free_irq(gpio_to_irq(SDHC1_CD), data); | |
4f163eb8 SH |
357 | gpio_free(SDHC1_WP); |
358 | gpio_free(SDHC1_CD); | |
45b131a7 VL |
359 | } |
360 | ||
6a697e3d | 361 | static const struct imxmmc_platform_data sdhc1_pdata __initconst = { |
45b131a7 VL |
362 | .get_ro = moboard_sdhc1_get_ro, |
363 | .init = moboard_sdhc1_init, | |
364 | .exit = moboard_sdhc1_exit, | |
365 | }; | |
366 | ||
b23f1534 VL |
367 | /* |
368 | * this pin is dedicated for all mx31moboard systems, so we do it here | |
369 | */ | |
370 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | |
88b05647 | 371 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
25783602 | 372 | PAD_CTL_ODE_CMOS) |
88b05647 VL |
373 | |
374 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | |
25783602 | 375 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) |
88b05647 | 376 | |
25783602 | 377 | static void usb_xcvr_reset(void) |
88b05647 | 378 | { |
25783602 PR |
379 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); |
380 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | |
381 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG | PAD_CTL_100K_PD); | |
382 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
383 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG | PAD_CTL_100K_PD); | |
384 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG | PAD_CTL_100K_PD); | |
385 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
386 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG | PAD_CTL_100K_PD); | |
387 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | |
388 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | |
389 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | |
390 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | |
391 | ||
392 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | |
393 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | |
394 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | |
395 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | |
396 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | |
397 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); | |
398 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | |
399 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
400 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
401 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
402 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
403 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
404 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
88b05647 VL |
405 | |
406 | gpio_request(OTG_EN_B, "usb-udc-en"); | |
407 | gpio_direction_output(OTG_EN_B, 0); | |
25783602 PR |
408 | gpio_request(USBH2_EN_B, "usbh2-en"); |
409 | gpio_direction_output(USBH2_EN_B, 0); | |
410 | ||
411 | gpio_request(USB_RESET_B, "usb-reset"); | |
412 | gpio_direction_output(USB_RESET_B, 0); | |
413 | mdelay(1); | |
414 | gpio_set_value(USB_RESET_B, 1); | |
415 | mdelay(1); | |
88b05647 VL |
416 | } |
417 | ||
4bd597b6 SH |
418 | static int moboard_usbh2_init_hw(struct platform_device *pdev) |
419 | { | |
420 | return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED); | |
421 | } | |
f9ffaa9c | 422 | |
2d58de28 | 423 | static struct mxc_usbh_platform_data usbh2_pdata __initdata = { |
4bd597b6 | 424 | .init = moboard_usbh2_init_hw, |
d67d1075 | 425 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, |
d67d1075 VL |
426 | }; |
427 | ||
428 | static int __init moboard_usbh2_init(void) | |
429 | { | |
2d58de28 UKK |
430 | struct platform_device *pdev; |
431 | ||
48f6b099 SH |
432 | usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | |
433 | ULPI_OTG_DRVVBUS_EXT); | |
434 | if (!usbh2_pdata.otg) | |
435 | return -ENODEV; | |
d67d1075 | 436 | |
2d58de28 | 437 | pdev = imx31_add_mxc_ehci_hs(2, &usbh2_pdata); |
2d58de28 | 438 | |
d3a22442 | 439 | return PTR_ERR_OR_ZERO(pdev); |
d67d1075 | 440 | } |
d67d1075 | 441 | |
47e837b5 | 442 | static const struct gpio_led mx31moboard_leds[] __initconst = { |
77aa561d | 443 | { |
27ad4bf7 | 444 | .name = "coreboard-led-0:red:running", |
77aa561d | 445 | .default_trigger = "heartbeat", |
27ad4bf7 | 446 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0), |
77aa561d VL |
447 | }, { |
448 | .name = "coreboard-led-1:red", | |
449 | .gpio = IOMUX_TO_GPIO(MX31_PIN_STX0), | |
450 | }, { | |
451 | .name = "coreboard-led-2:red", | |
452 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0), | |
453 | }, { | |
454 | .name = "coreboard-led-3:red", | |
455 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0), | |
456 | }, | |
457 | }; | |
458 | ||
47e837b5 | 459 | static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = { |
27ad4bf7 | 460 | .num_leds = ARRAY_SIZE(mx31moboard_leds), |
77aa561d VL |
461 | .leds = mx31moboard_leds, |
462 | }; | |
463 | ||
988d2d49 VL |
464 | static struct platform_device *devices[] __initdata = { |
465 | &mx31moboard_flash, | |
466 | }; | |
467 | ||
afa77ef3 | 468 | static struct mx3_camera_pdata camera_pdata __initdata = { |
04ea3c80 VL |
469 | .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10, |
470 | .mclk_10khz = 4800, | |
471 | }; | |
472 | ||
031e9127 UKK |
473 | static phys_addr_t mx3_camera_base __initdata; |
474 | #define MX3_CAMERA_BUF_SIZE SZ_4M | |
04ea3c80 | 475 | |
afa77ef3 | 476 | static int __init mx31moboard_init_cam(void) |
04ea3c80 | 477 | { |
afa77ef3 UKK |
478 | int dma, ret = -ENOMEM; |
479 | struct platform_device *pdev; | |
480 | ||
88289c80 | 481 | imx31_add_ipu_core(); |
04ea3c80 | 482 | |
afa77ef3 UKK |
483 | pdev = imx31_alloc_mx3_camera(&camera_pdata); |
484 | if (IS_ERR(pdev)) | |
485 | return PTR_ERR(pdev); | |
04ea3c80 | 486 | |
afa77ef3 | 487 | dma = dma_declare_coherent_memory(&pdev->dev, |
031e9127 UKK |
488 | mx3_camera_base, mx3_camera_base, |
489 | MX3_CAMERA_BUF_SIZE, | |
04ea3c80 | 490 | DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE); |
afa77ef3 UKK |
491 | if (!(dma & DMA_MEMORY_MAP)) |
492 | goto err; | |
493 | ||
494 | ret = platform_device_add(pdev); | |
495 | if (ret) | |
496 | err: | |
497 | platform_device_put(pdev); | |
498 | ||
499 | return ret; | |
04ea3c80 | 500 | |
04ea3c80 VL |
501 | } |
502 | ||
40d97b89 PR |
503 | static void mx31moboard_poweroff(void) |
504 | { | |
505 | struct clk *clk = clk_get_sys("imx2-wdt.0", NULL); | |
506 | ||
507 | if (!IS_ERR(clk)) | |
8186064c | 508 | clk_prepare_enable(clk); |
40d97b89 PR |
509 | |
510 | mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST); | |
511 | ||
512 | __raw_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | |
513 | } | |
514 | ||
e00f0b4a VL |
515 | static int mx31moboard_baseboard; |
516 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | |
517 | ||
988d2d49 VL |
518 | /* |
519 | * Board specific initialization. | |
520 | */ | |
e134fb2b | 521 | static void __init mx31moboard_init(void) |
988d2d49 | 522 | { |
b78d8e59 SG |
523 | imx31_soc_init(); |
524 | ||
220bbcea VL |
525 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), |
526 | "moboard"); | |
527 | ||
988d2d49 | 528 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
47e837b5 | 529 | gpio_led_register_device(-1, &mx31moboard_led_pdata); |
988d2d49 | 530 | |
bec31a85 | 531 | imx31_add_imx2_wdt(); |
31776fbc | 532 | |
45af780a | 533 | moboard_uart0_init(); |
16cf5c41 UKK |
534 | imx31_add_imx_uart0(&uart0_pdata); |
535 | imx31_add_imx_uart4(&uart4_pdata); | |
e00f0b4a | 536 | |
4a9b8b0b UKK |
537 | imx31_add_imx_i2c0(&moboard_i2c0_data); |
538 | imx31_add_imx_i2c1(&moboard_i2c1_data); | |
4ec6ecc7 | 539 | |
06606ff1 UKK |
540 | imx31_add_spi_imx1(&moboard_spi1_pdata); |
541 | imx31_add_spi_imx2(&moboard_spi2_pdata); | |
65da9791 VL |
542 | |
543 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq"); | |
544 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | |
ed175343 SG |
545 | moboard_spi_board_info[0].irq = |
546 | gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | |
65da9791 VL |
547 | spi_register_board_info(moboard_spi_board_info, |
548 | ARRAY_SIZE(moboard_spi_board_info)); | |
549 | ||
6a697e3d | 550 | imx31_add_mxc_mmc(0, &sdhc1_pdata); |
45b131a7 | 551 | |
afa77ef3 | 552 | mx31moboard_init_cam(); |
4dd71293 | 553 | |
b23f1534 VL |
554 | usb_xcvr_reset(); |
555 | ||
d67d1075 | 556 | moboard_usbh2_init(); |
88b05647 | 557 | |
2f7b9451 PR |
558 | imx31_add_imx_ssi(0, &moboard_ssi_pdata); |
559 | ||
560 | imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); | |
561 | ||
40d97b89 PR |
562 | pm_power_off = mx31moboard_poweroff; |
563 | ||
e00f0b4a VL |
564 | switch (mx31moboard_baseboard) { |
565 | case MX31NOBOARD: | |
566 | break; | |
567 | case MX31DEVBOARD: | |
568 | mx31moboard_devboard_init(); | |
569 | break; | |
570 | case MX31MARXBOT: | |
571 | mx31moboard_marxbot_init(); | |
572 | break; | |
e335c75c | 573 | case MX31SMARTBOT: |
3a47b1a4 PR |
574 | case MX31EYEBOT: |
575 | mx31moboard_smartbot_init(mx31moboard_baseboard); | |
e335c75c | 576 | break; |
e00f0b4a | 577 | default: |
220bbcea VL |
578 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", |
579 | mx31moboard_baseboard); | |
e00f0b4a | 580 | } |
988d2d49 VL |
581 | } |
582 | ||
988d2d49 VL |
583 | static void __init mx31moboard_timer_init(void) |
584 | { | |
30c730f8 | 585 | mx31_clocks_init(26000000); |
988d2d49 VL |
586 | } |
587 | ||
031e9127 UKK |
588 | static void __init mx31moboard_reserve(void) |
589 | { | |
590 | /* reserve 4 MiB for mx3-camera */ | |
716a3dc2 | 591 | mx3_camera_base = arm_memblock_steal(MX3_CAMERA_BUF_SIZE, |
031e9127 | 592 | MX3_CAMERA_BUF_SIZE); |
031e9127 UKK |
593 | } |
594 | ||
988d2d49 | 595 | MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") |
0fbe6b07 | 596 | /* Maintainer: Philippe Retornaz, EPFL Mobots group */ |
dc8f1907 | 597 | .atag_offset = 0x100, |
031e9127 | 598 | .reserve = mx31moboard_reserve, |
97976e22 UKK |
599 | .map_io = mx31_map_io, |
600 | .init_early = imx31_init_early, | |
601 | .init_irq = mx31_init_irq, | |
6bb27d73 | 602 | .init_time = mx31moboard_timer_init, |
e134fb2b | 603 | .init_machine = mx31moboard_init, |
65ea7884 | 604 | .restart = mxc_restart, |
988d2d49 | 605 | MACHINE_END |