ARM: imx: Change the way nand devices are registered (imx27)
[deliverable/linux.git] / arch / arm / mach-imx / mach-pcm038.c
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1/*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
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20#include <linux/i2c.h>
21#include <linux/i2c/at24.h>
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22#include <linux/io.h>
23#include <linux/mtd/plat-ram.h>
24#include <linux/mtd/physmap.h>
25#include <linux/platform_device.h>
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26#include <linux/regulator/machine.h>
27#include <linux/mfd/mc13783.h>
28#include <linux/spi/spi.h>
29#include <linux/irq.h>
a4e9a65a 30
7e5e9f54 31#include <asm/mach-types.h>
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32#include <asm/mach/arch.h>
33#include <asm/mach/time.h>
34
35#include <mach/board-pcm038.h>
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36#include <mach/common.h>
37#include <mach/hardware.h>
a4e9a65a 38#include <mach/i2c.h>
e835d88e 39#include <mach/iomux-mx27.h>
a09e64fb 40#include <mach/imx-uart.h>
01f71a37 41#include <mach/mxc_nand.h>
61533841 42#include <mach/spi.h>
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43#include <mach/mxc_ehci.h>
44#include <mach/ulpi.h>
7e5e9f54 45
0e7a29a8 46#include "devices-imx27.h"
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47#include "devices.h"
48
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49static int pcm038_pins[] = {
50 /* UART1 */
51 PE12_PF_UART1_TXD,
52 PE13_PF_UART1_RXD,
53 PE14_PF_UART1_CTS,
54 PE15_PF_UART1_RTS,
55 /* UART2 */
56 PE3_PF_UART2_CTS,
57 PE4_PF_UART2_RTS,
58 PE6_PF_UART2_TXD,
59 PE7_PF_UART2_RXD,
60 /* UART3 */
61 PE8_PF_UART3_TXD,
62 PE9_PF_UART3_RXD,
63 PE10_PF_UART3_CTS,
64 PE11_PF_UART3_RTS,
65 /* FEC */
66 PD0_AIN_FEC_TXD0,
67 PD1_AIN_FEC_TXD1,
68 PD2_AIN_FEC_TXD2,
69 PD3_AIN_FEC_TXD3,
70 PD4_AOUT_FEC_RX_ER,
71 PD5_AOUT_FEC_RXD1,
72 PD6_AOUT_FEC_RXD2,
73 PD7_AOUT_FEC_RXD3,
74 PD8_AF_FEC_MDIO,
75 PD9_AIN_FEC_MDC,
76 PD10_AOUT_FEC_CRS,
77 PD11_AOUT_FEC_TX_CLK,
78 PD12_AOUT_FEC_RXD0,
79 PD13_AOUT_FEC_RX_DV,
80 PD14_AOUT_FEC_RX_CLK,
81 PD15_AOUT_FEC_COL,
82 PD16_AIN_FEC_TX_ER,
83 PF23_AIN_FEC_TX_EN,
84 /* I2C2 */
85 PC5_PF_I2C2_SDA,
86 PC6_PF_I2C2_SCL,
87 /* SPI1 */
88 PD25_PF_CSPI1_RDY,
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89 PD29_PF_CSPI1_SCLK,
90 PD30_PF_CSPI1_MISO,
91 PD31_PF_CSPI1_MOSI,
92 /* SSI1 */
93 PC20_PF_SSI1_FS,
94 PC21_PF_SSI1_RXD,
95 PC22_PF_SSI1_TXD,
96 PC23_PF_SSI1_CLK,
97 /* SSI4 */
98 PC16_PF_SSI4_FS,
99 PC17_PF_SSI4_RXD,
100 PC18_PF_SSI4_TXD,
101 PC19_PF_SSI4_CLK,
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102 /* USB host */
103 PA0_PF_USBH2_CLK,
104 PA1_PF_USBH2_DIR,
105 PA2_PF_USBH2_DATA7,
106 PA3_PF_USBH2_NXT,
107 PA4_PF_USBH2_STP,
108 PD19_AF_USBH2_DATA4,
109 PD20_AF_USBH2_DATA3,
110 PD21_AF_USBH2_DATA6,
111 PD22_AF_USBH2_DATA0,
112 PD23_AF_USBH2_DATA2,
113 PD24_AF_USBH2_DATA1,
114 PD26_AF_USBH2_DATA5,
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115};
116
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117/*
118 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
119 * 16 bit width
120 */
121
122static struct platdata_mtd_ram pcm038_sram_data = {
123 .bankwidth = 2,
124};
125
126static struct resource pcm038_sram_resource = {
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127 .start = MX27_CS1_BASE_ADDR,
128 .end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
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129 .flags = IORESOURCE_MEM,
130};
131
132static struct platform_device pcm038_sram_mtd_device = {
133 .name = "mtd-ram",
134 .id = 0,
135 .dev = {
136 .platform_data = &pcm038_sram_data,
137 },
138 .num_resources = 1,
139 .resource = &pcm038_sram_resource,
140};
141
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142/*
143 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
144 * 16 bit width
145 */
146static struct physmap_flash_data pcm038_flash_data = {
147 .width = 2,
148};
149
150static struct resource pcm038_flash_resource = {
151 .start = 0xc0000000,
152 .end = 0xc1ffffff,
153 .flags = IORESOURCE_MEM,
154};
155
156static struct platform_device pcm038_nor_mtd_device = {
157 .name = "physmap-flash",
158 .id = 0,
159 .dev = {
160 .platform_data = &pcm038_flash_data,
161 },
162 .num_resources = 1,
163 .resource = &pcm038_flash_resource,
164};
165
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166static struct imxuart_platform_data uart_pdata[] = {
167 {
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168 .flags = IMXUART_HAVE_RTSCTS,
169 }, {
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170 .flags = IMXUART_HAVE_RTSCTS,
171 }, {
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172 .flags = IMXUART_HAVE_RTSCTS,
173 },
174};
175
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176static const struct mxc_nand_platform_data
177pcm038_nand_board_info __initconst = {
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178 .width = 1,
179 .hw_ecc = 1,
180};
181
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182static struct platform_device *platform_devices[] __initdata = {
183 &pcm038_nor_mtd_device,
d40a0992 184 &mxc_w1_master_device,
879fea1b 185 &mxc_fec_device,
3620c0dc 186 &pcm038_sram_mtd_device,
f13899da 187 &mxc_wdt,
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188};
189
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190/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
191 * setup other stuffs to access the sram. */
192static void __init pcm038_init_sram(void)
193{
a8dfb646 194 mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
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195}
196
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197static struct imxi2c_platform_data pcm038_i2c_1_data = {
198 .bitrate = 100000,
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199};
200
201static struct at24_platform_data board_eeprom = {
202 .byte_len = 4096,
203 .page_size = 32,
204 .flags = AT24_FLAG_ADDR16,
205};
206
207static struct i2c_board_info pcm038_i2c_devices[] = {
cf87a6e2 208 {
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209 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
210 .platform_data = &board_eeprom,
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211 }, {
212 I2C_BOARD_INFO("pcf8563", 0x51),
213 }, {
a4e9a65a 214 I2C_BOARD_INFO("lm75", 0x4a),
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215 }
216};
a4e9a65a 217
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218static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
219
220static struct spi_imx_master pcm038_spi_0_data = {
221 .chipselect = pcm038_spi_cs,
222 .num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
223};
224
225static struct regulator_consumer_supply sdhc1_consumers[] = {
226 {
227 .dev = &mxc_sdhc_device1.dev,
228 .supply = "sdhc_vcc",
229 },
230};
231
232static struct regulator_init_data sdhc1_data = {
233 .constraints = {
234 .min_uV = 3000000,
235 .max_uV = 3400000,
236 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
237 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
238 .valid_modes_mask = REGULATOR_MODE_NORMAL |
239 REGULATOR_MODE_FAST,
240 .always_on = 0,
241 .boot_on = 0,
242 },
243 .num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
244 .consumer_supplies = sdhc1_consumers,
245};
246
247static struct regulator_consumer_supply cam_consumers[] = {
248 {
249 .dev = NULL,
250 .supply = "imx_cam_vcc",
251 },
252};
253
254static struct regulator_init_data cam_data = {
255 .constraints = {
256 .min_uV = 3000000,
257 .max_uV = 3400000,
258 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
259 REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
260 .valid_modes_mask = REGULATOR_MODE_NORMAL |
261 REGULATOR_MODE_FAST,
262 .always_on = 0,
263 .boot_on = 0,
264 },
265 .num_consumer_supplies = ARRAY_SIZE(cam_consumers),
266 .consumer_supplies = cam_consumers,
267};
268
269struct mc13783_regulator_init_data pcm038_regulators[] = {
270 {
271 .id = MC13783_REGU_VCAM,
272 .init_data = &cam_data,
273 }, {
274 .id = MC13783_REGU_VMMC1,
275 .init_data = &sdhc1_data,
276 },
277};
278
279static struct mc13783_platform_data pcm038_pmic = {
280 .regulators = pcm038_regulators,
281 .num_regulators = ARRAY_SIZE(pcm038_regulators),
282 .flags = MC13783_USE_ADC | MC13783_USE_REGULATOR |
283 MC13783_USE_TOUCHSCREEN,
284};
285
286static struct spi_board_info pcm038_spi_board_info[] __initdata = {
287 {
288 .modalias = "mc13783",
289 .irq = IRQ_GPIOB(23),
290 .max_speed_hz = 300000,
291 .bus_num = 0,
292 .chip_select = 0,
293 .platform_data = &pcm038_pmic,
294 .mode = SPI_CS_HIGH,
295 }
296};
297
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298static struct mxc_usbh_platform_data usbh2_pdata = {
299 .portsc = MXC_EHCI_MODE_ULPI,
300 .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
301};
302
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303static void __init pcm038_init(void)
304{
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305 mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
306 "PCM038");
307
3620c0dc 308 pcm038_init_sram();
7e5e9f54 309
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310 mxc_register_device(&imx2x_uart_device0, &uart_pdata[0]);
311 mxc_register_device(&imx2x_uart_device1, &uart_pdata[1]);
312 mxc_register_device(&imx2x_uart_device2, &uart_pdata[2]);
01f71a37 313
ccfe30a7 314 mxc_gpio_mode(PE16_AF_OWIRE);
0e7a29a8 315 imx27_add_mxc_nand(&pcm038_nand_board_info);
7e5e9f54 316
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317 /* only the i2c master 1 is used on this CPU card */
318 i2c_register_board_info(1, pcm038_i2c_devices,
319 ARRAY_SIZE(pcm038_i2c_devices));
320
321 mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
a4e9a65a 322
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323 /* PE18 for user-LED D40 */
324 mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
325
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326 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
327
328 /* MC13783 IRQ */
329 mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);
330
331 mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data);
332 spi_register_board_info(pcm038_spi_board_info,
333 ARRAY_SIZE(pcm038_spi_board_info));
334
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335 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
336
7e5e9f54 337 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
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338
339#ifdef CONFIG_MACH_PCM970_BASEBOARD
340 pcm970_baseboard_init();
341#endif
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342}
343
344static void __init pcm038_timer_init(void)
345{
30c730f8 346 mx27_clocks_init(26000000);
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347}
348
058b7a6f 349static struct sys_timer pcm038_timer = {
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350 .init = pcm038_timer_init,
351};
352
353MACHINE_START(PCM038, "phyCORE-i.MX27")
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354 .phys_io = MX27_AIPI_BASE_ADDR,
355 .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
34101237 356 .boot_params = MX27_PHYS_OFFSET + 0x100,
cd4a05f9 357 .map_io = mx27_map_io,
c5aa0ad0 358 .init_irq = mx27_init_irq,
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359 .init_machine = pcm038_init,
360 .timer = &pcm038_timer,
361MACHINE_END
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