[deliverable/linux.git] / arch / arm / mach-imx / mach-pcm038.c

/*
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/io.h>
#include <linux/mtd/plat-ram.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/regulator/machine.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/irq.h>
#include <linux/gpio.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>

#include "board-pcm038.h"
#include "common.h"
#include "devices-imx27.h"
#include "hardware.h"
#include "iomux-mx27.h"
#include "ulpi.h"

static const int pcm038_pins[] __initconst = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART2 */
	PE3_PF_UART2_CTS,
	PE4_PF_UART2_RTS,
	PE6_PF_UART2_TXD,
	PE7_PF_UART2_RXD,
	/* UART3 */
	PE8_PF_UART3_TXD,
	PE9_PF_UART3_RXD,
	PE10_PF_UART3_CTS,
	PE11_PF_UART3_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C2 */
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* SPI1 */
	PD25_PF_CSPI1_RDY,
	PD29_PF_CSPI1_SCLK,
	PD30_PF_CSPI1_MISO,
	PD31_PF_CSPI1_MOSI,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* SSI4 */
	PC16_PF_SSI4_FS,
	PC17_PF_SSI4_RXD,
	PC18_PF_SSI4_TXD,
	PC19_PF_SSI4_CLK,
	/* USB host */
	PA0_PF_USBH2_CLK,
	PA1_PF_USBH2_DIR,
	PA2_PF_USBH2_DATA7,
	PA3_PF_USBH2_NXT,
	PA4_PF_USBH2_STP,
	PD19_AF_USBH2_DATA4,
	PD20_AF_USBH2_DATA3,
	PD21_AF_USBH2_DATA6,
	PD22_AF_USBH2_DATA0,
	PD23_AF_USBH2_DATA2,
	PD24_AF_USBH2_DATA1,
	PD26_AF_USBH2_DATA5,
};

/*
 * Phytec's PCM038 comes with 2MiB battery buffered SRAM,
 * 16 bit width
 */

static struct platdata_mtd_ram pcm038_sram_data = {
	.bankwidth = 2,
};

static struct resource pcm038_sram_resource = {
	.start = MX27_CS1_BASE_ADDR,
	.end   = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_sram_mtd_device = {
	.name = "mtd-ram",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_sram_data,
	},
	.num_resources = 1,
	.resource = &pcm038_sram_resource,
};

/*
 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
 * 16 bit width
 */
static struct physmap_flash_data pcm038_flash_data = {
	.width = 2,
};

static struct resource pcm038_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc1ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_flash_data,
	},
	.num_resources = 1,
	.resource = &pcm038_flash_resource,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static const struct mxc_nand_platform_data
pcm038_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static struct platform_device *platform_devices[] __initdata = {
	&pcm038_nor_mtd_device,
	&pcm038_sram_mtd_device,
};

/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
 * setup other stuffs to access the sram. */
static void __init pcm038_init_sram(void)
{
	__raw_writel(0x0000d843, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(1)));
	__raw_writel(0x22252521, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(1)));
	__raw_writel(0x22220a00, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(1)));
}

static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
	.bitrate = 100000,
};

static struct at24_platform_data board_eeprom = {
	.byte_len = 4096,
	.page_size = 32,
	.flags = AT24_FLAG_ADDR16,
};

static struct i2c_board_info pcm038_i2c_devices[] = {
	{
		I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
		.platform_data = &board_eeprom,
	}, {
		I2C_BOARD_INFO("pcf8563", 0x51),
	}, {
		I2C_BOARD_INFO("lm75", 0x4a),
	}
};

static int pcm038_spi_cs[] = {GPIO_PORTD + 28};

static const struct spi_imx_master pcm038_spi0_data __initconst = {
	.chipselect = pcm038_spi_cs,
	.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
};

static struct regulator_consumer_supply sdhc1_consumers[] = {
	{
		.dev_name = "imx21-mmc.1",
		.supply	= "sdhc_vcc",
	},
};

static struct regulator_init_data sdhc1_data = {
	.constraints = {
		.min_uV = 3000000,
		.max_uV = 3400000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
			REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
		.valid_modes_mask = REGULATOR_MODE_NORMAL |
			REGULATOR_MODE_FAST,
		.always_on = 0,
		.boot_on = 0,
	},
	.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
	.consumer_supplies = sdhc1_consumers,
};

static struct regulator_consumer_supply cam_consumers[] = {
	{
		.dev_name = NULL,
		.supply	= "imx_cam_vcc",
	},
};

static struct regulator_init_data cam_data = {
	.constraints = {
		.min_uV = 3000000,
		.max_uV = 3400000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
			REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
		.valid_modes_mask = REGULATOR_MODE_NORMAL |
			REGULATOR_MODE_FAST,
		.always_on = 0,
		.boot_on = 0,
	},
	.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
	.consumer_supplies = cam_consumers,
};

static struct mc13xxx_regulator_init_data pcm038_regulators[] = {
	{
		.id = MC13783_REG_VCAM,
		.init_data = &cam_data,
	}, {
		.id = MC13783_REG_VMMC1,
		.init_data = &sdhc1_data,
	},
};

static struct mc13xxx_platform_data pcm038_pmic = {
	.regulators = {
		.regulators = pcm038_regulators,
		.num_regulators = ARRAY_SIZE(pcm038_regulators),
	},
	.flags = MC13XXX_USE_ADC | MC13XXX_USE_TOUCHSCREEN,
};

static struct spi_board_info pcm038_spi_board_info[] __initdata = {
	{
		.modalias = "mc13783",
		/* irq number is run-time assigned */
		.max_speed_hz = 300000,
		.bus_num = 0,
		.chip_select = 0,
		.platform_data = &pcm038_pmic,
		.mode = SPI_CS_HIGH,
	}
};

static int pcm038_usbh2_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
			MXC_EHCI_INTERFACE_DIFF_UNI);
}

static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
	.init	= pcm038_usbh2_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
};

static void __init pcm038_init(void)
{
	imx27_soc_init();

	mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
			"PCM038");

	pcm038_init_sram();

	imx27_add_imx_uart0(&uart_pdata);
	imx27_add_imx_uart1(&uart_pdata);
	imx27_add_imx_uart2(&uart_pdata);

	mxc_gpio_mode(PE16_AF_OWIRE);
	imx27_add_mxc_nand(&pcm038_nand_board_info);

	/* only the i2c master 1 is used on this CPU card */
	i2c_register_board_info(1, pcm038_i2c_devices,
				ARRAY_SIZE(pcm038_i2c_devices));

	imx27_add_imx_i2c(1, &pcm038_i2c1_data);

	/* PE18 for user-LED D40 */
	mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);

	mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);

	/* MC13783 IRQ */
	mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);

	imx27_add_spi_imx0(&pcm038_spi0_data);
	pcm038_spi_board_info[0].irq = gpio_to_irq(IMX_GPIO_NR(2, 23));
	spi_register_board_info(pcm038_spi_board_info,
				ARRAY_SIZE(pcm038_spi_board_info));

	imx27_add_mxc_ehci_hs(2, &usbh2_pdata);

	imx27_add_fec(NULL);
	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
	imx27_add_imx2_wdt();
	imx27_add_mxc_w1();

#ifdef CONFIG_MACH_PCM970_BASEBOARD
	pcm970_baseboard_init();
#endif
}

static void __init pcm038_timer_init(void)
{
	mx27_clocks_init(26000000);
}

MACHINE_START(PCM038, "phyCORE-i.MX27")
	.atag_offset = 0x100,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.handle_irq = imx27_handle_irq,
	.init_time	= pcm038_timer_init,
	.init_machine = pcm038_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
7e5e9f54 JB	1	/*
	2	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	3	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	17	* MA 02110-1301, USA.
	18	*/
	19
a4e9a65a SH	20	#include <linux/i2c.h>
a4e9a65a SH	21	#include <linux/i2c/at24.h>
bff0b53b SH	22	#include <linux/io.h>
	23	#include <linux/mtd/plat-ram.h>
	24	#include <linux/mtd/physmap.h>
	25	#include <linux/platform_device.h>
61533841 SH	26	#include <linux/regulator/machine.h>
	27	#include <linux/mfd/mc13783.h>
	28	#include <linux/spi/spi.h>
	29	#include <linux/irq.h>
438196c3	30	#include <linux/gpio.h>
a4e9a65a	31
7e5e9f54	32	#include <asm/mach-types.h>
bff0b53b SH	33	#include <asm/mach/arch.h>
	34	#include <asm/mach/time.h>
	35
3ed0bcb4	36	#include "board-pcm038.h"
e3372474	37	#include "common.h"
0e7a29a8	38	#include "devices-imx27.h"
50f2de61	39	#include "hardware.h"
267dd34c	40	#include "iomux-mx27.h"
39ef6340	41	#include "ulpi.h"
7e90534a	42
6c80ee51	43	static const int pcm038_pins[] __initconst = {
f231ea44 SH	44	/* UART1 */
	45	PE12_PF_UART1_TXD,
	46	PE13_PF_UART1_RXD,
	47	PE14_PF_UART1_CTS,
	48	PE15_PF_UART1_RTS,
	49	/* UART2 */
	50	PE3_PF_UART2_CTS,
	51	PE4_PF_UART2_RTS,
	52	PE6_PF_UART2_TXD,
	53	PE7_PF_UART2_RXD,
	54	/* UART3 */
	55	PE8_PF_UART3_TXD,
	56	PE9_PF_UART3_RXD,
	57	PE10_PF_UART3_CTS,
	58	PE11_PF_UART3_RTS,
	59	/* FEC */
	60	PD0_AIN_FEC_TXD0,
	61	PD1_AIN_FEC_TXD1,
	62	PD2_AIN_FEC_TXD2,
	63	PD3_AIN_FEC_TXD3,
	64	PD4_AOUT_FEC_RX_ER,
	65	PD5_AOUT_FEC_RXD1,
	66	PD6_AOUT_FEC_RXD2,
	67	PD7_AOUT_FEC_RXD3,
	68	PD8_AF_FEC_MDIO,
	69	PD9_AIN_FEC_MDC,
	70	PD10_AOUT_FEC_CRS,
	71	PD11_AOUT_FEC_TX_CLK,
	72	PD12_AOUT_FEC_RXD0,
	73	PD13_AOUT_FEC_RX_DV,
	74	PD14_AOUT_FEC_RX_CLK,
	75	PD15_AOUT_FEC_COL,
	76	PD16_AIN_FEC_TX_ER,
	77	PF23_AIN_FEC_TX_EN,
	78	/* I2C2 */
	79	PC5_PF_I2C2_SDA,
	80	PC6_PF_I2C2_SCL,
	81	/* SPI1 */
	82	PD25_PF_CSPI1_RDY,
f231ea44 SH	83	PD29_PF_CSPI1_SCLK,
	84	PD30_PF_CSPI1_MISO,
	85	PD31_PF_CSPI1_MOSI,
	86	/* SSI1 */
	87	PC20_PF_SSI1_FS,
	88	PC21_PF_SSI1_RXD,
	89	PC22_PF_SSI1_TXD,
	90	PC23_PF_SSI1_CLK,
	91	/* SSI4 */
	92	PC16_PF_SSI4_FS,
	93	PC17_PF_SSI4_RXD,
	94	PC18_PF_SSI4_TXD,
	95	PC19_PF_SSI4_CLK,
773f206b SH	96	/* USB host */
	97	PA0_PF_USBH2_CLK,
	98	PA1_PF_USBH2_DIR,
	99	PA2_PF_USBH2_DATA7,
	100	PA3_PF_USBH2_NXT,
	101	PA4_PF_USBH2_STP,
	102	PD19_AF_USBH2_DATA4,
	103	PD20_AF_USBH2_DATA3,
	104	PD21_AF_USBH2_DATA6,
	105	PD22_AF_USBH2_DATA0,
	106	PD23_AF_USBH2_DATA2,
	107	PD24_AF_USBH2_DATA1,
	108	PD26_AF_USBH2_DATA5,
f231ea44 SH	109	};
f231ea44 SH	110
3620c0dc SH	111	/*
	112	* Phytec's PCM038 comes with 2MiB battery buffered SRAM,
	113	* 16 bit width
	114	*/
	115
	116	static struct platdata_mtd_ram pcm038_sram_data = {
	117	.bankwidth = 2,
	118	};
	119
	120	static struct resource pcm038_sram_resource = {
3f35d1f5 UKK	121	.start = MX27_CS1_BASE_ADDR,
3f35d1f5 UKK	122	.end = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
3620c0dc SH	123	.flags = IORESOURCE_MEM,
	124	};
	125
	126	static struct platform_device pcm038_sram_mtd_device = {
	127	.name = "mtd-ram",
	128	.id = 0,
	129	.dev = {
	130	.platform_data = &pcm038_sram_data,
	131	},
	132	.num_resources = 1,
	133	.resource = &pcm038_sram_resource,
	134	};
	135
7e5e9f54 JB	136	/*
	137	* Phytec's phyCORE-i.MX27 comes with 32MiB flash,
	138	* 16 bit width
	139	*/
	140	static struct physmap_flash_data pcm038_flash_data = {
	141	.width = 2,
	142	};
	143
	144	static struct resource pcm038_flash_resource = {
	145	.start = 0xc0000000,
	146	.end = 0xc1ffffff,
	147	.flags = IORESOURCE_MEM,
	148	};
	149
	150	static struct platform_device pcm038_nor_mtd_device = {
	151	.name = "physmap-flash",
	152	.id = 0,
	153	.dev = {
	154	.platform_data = &pcm038_flash_data,
	155	},
	156	.num_resources = 1,
	157	.resource = &pcm038_flash_resource,
	158	};
	159
d5dac4a6 UKK	160	static const struct imxuart_platform_data uart_pdata __initconst = {
d5dac4a6 UKK	161	.flags = IMXUART_HAVE_RTSCTS,
7e5e9f54 JB	162	};
7e5e9f54 JB	163
0e7a29a8 UKK	164	static const struct mxc_nand_platform_data
0e7a29a8 UKK	165	pcm038_nand_board_info __initconst = {
01f71a37 SH	166	.width = 1,
	167	.hw_ecc = 1,
	168	};
	169
7e5e9f54 JB	170	static struct platform_device *platform_devices[] __initdata = {
7e5e9f54 JB	171	&pcm038_nor_mtd_device,
3620c0dc	172	&pcm038_sram_mtd_device,
7e5e9f54 JB	173	};
7e5e9f54 JB	174
3620c0dc SH	175	/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and
	176	* setup other stuffs to access the sram. */
	177	static void __init pcm038_init_sram(void)
	178	{
25971426 SG	179	__raw_writel(0x0000d843, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(1)));
	180	__raw_writel(0x22252521, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(1)));
	181	__raw_writel(0x22220a00, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(1)));
3620c0dc SH	182	}
3620c0dc SH	183
c6987159	184	static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
a4e9a65a	185	.bitrate = 100000,
a4e9a65a SH	186	};
	187
	188	static struct at24_platform_data board_eeprom = {
	189	.byte_len = 4096,
	190	.page_size = 32,
	191	.flags = AT24_FLAG_ADDR16,
	192	};
	193
	194	static struct i2c_board_info pcm038_i2c_devices[] = {
cf87a6e2	195	{
a4e9a65a SH	196	I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
a4e9a65a SH	197	.platform_data = &board_eeprom,
cf87a6e2 SH	198	}, {
	199	I2C_BOARD_INFO("pcf8563", 0x51),
	200	}, {
a4e9a65a	201	I2C_BOARD_INFO("lm75", 0x4a),
a4e9a65a SH	202	}
a4e9a65a SH	203	};
a4e9a65a	204
61533841 SH	205	static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
61533841 SH	206
7536cf99	207	static const struct spi_imx_master pcm038_spi0_data __initconst = {
61533841 SH	208	.chipselect = pcm038_spi_cs,
	209	.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
	210	};
	211
	212	static struct regulator_consumer_supply sdhc1_consumers[] = {
	213	{
7f917a8d	214	.dev_name = "imx21-mmc.1",
61533841 SH	215	.supply = "sdhc_vcc",
	216	},
	217	};
	218
	219	static struct regulator_init_data sdhc1_data = {
	220	.constraints = {
	221	.min_uV = 3000000,
	222	.max_uV = 3400000,
	223	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	224	REGULATOR_CHANGE_MODE \| REGULATOR_CHANGE_STATUS,
	225	.valid_modes_mask = REGULATOR_MODE_NORMAL \|
	226	REGULATOR_MODE_FAST,
	227	.always_on = 0,
	228	.boot_on = 0,
	229	},
	230	.num_consumer_supplies = ARRAY_SIZE(sdhc1_consumers),
	231	.consumer_supplies = sdhc1_consumers,
	232	};
	233
	234	static struct regulator_consumer_supply cam_consumers[] = {
	235	{
dcc5abf0	236	.dev_name = NULL,
61533841 SH	237	.supply = "imx_cam_vcc",
	238	},
	239	};
	240
	241	static struct regulator_init_data cam_data = {
	242	.constraints = {
	243	.min_uV = 3000000,
	244	.max_uV = 3400000,
	245	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	246	REGULATOR_CHANGE_MODE \| REGULATOR_CHANGE_STATUS,
	247	.valid_modes_mask = REGULATOR_MODE_NORMAL \|
	248	REGULATOR_MODE_FAST,
	249	.always_on = 0,
	250	.boot_on = 0,
	251	},
	252	.num_consumer_supplies = ARRAY_SIZE(cam_consumers),
	253	.consumer_supplies = cam_consumers,
	254	};
	255
5836372e	256	static struct mc13xxx_regulator_init_data pcm038_regulators[] = {
61533841	257	{
57c78e35	258	.id = MC13783_REG_VCAM,
61533841 SH	259	.init_data = &cam_data,
61533841 SH	260	}, {
57c78e35	261	.id = MC13783_REG_VMMC1,
61533841 SH	262	.init_data = &sdhc1_data,
	263	},
	264	};
	265
5836372e	266	static struct mc13xxx_platform_data pcm038_pmic = {
4ec1b54c AS	267	.regulators = {
	268	.regulators = pcm038_regulators,
	269	.num_regulators = ARRAY_SIZE(pcm038_regulators),
	270	},
46621ebb	271	.flags = MC13XXX_USE_ADC \| MC13XXX_USE_TOUCHSCREEN,
61533841 SH	272	};
	273
	274	static struct spi_board_info pcm038_spi_board_info[] __initdata = {
	275	{
	276	.modalias = "mc13783",
438196c3	277	/* irq number is run-time assigned */
61533841 SH	278	.max_speed_hz = 300000,
	279	.bus_num = 0,
	280	.chip_select = 0,
	281	.platform_data = &pcm038_pmic,
	282	.mode = SPI_CS_HIGH,
	283	}
	284	};
	285
4bd597b6 SH	286	static int pcm038_usbh2_init(struct platform_device *pdev)
	287	{
	288	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED \|
	289	MXC_EHCI_INTERFACE_DIFF_UNI);
	290	}
	291
2eb42d5c	292	static const struct mxc_usbh_platform_data usbh2_pdata __initconst = {
4bd597b6	293	.init = pcm038_usbh2_init,
773f206b	294	.portsc = MXC_EHCI_MODE_ULPI,
773f206b SH	295	};
773f206b SH	296
7e5e9f54 JB	297	static void __init pcm038_init(void)
7e5e9f54 JB	298	{
b78d8e59 SG	299	imx27_soc_init();
b78d8e59 SG	300
f231ea44 SH	301	mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins),
	302	"PCM038");
	303
3620c0dc	304	pcm038_init_sram();
7e5e9f54	305
d5dac4a6 UKK	306	imx27_add_imx_uart0(&uart_pdata);
	307	imx27_add_imx_uart1(&uart_pdata);
	308	imx27_add_imx_uart2(&uart_pdata);
01f71a37	309
ccfe30a7	310	mxc_gpio_mode(PE16_AF_OWIRE);
0e7a29a8	311	imx27_add_mxc_nand(&pcm038_nand_board_info);
7e5e9f54	312
a4e9a65a SH	313	/* only the i2c master 1 is used on this CPU card */
	314	i2c_register_board_info(1, pcm038_i2c_devices,
	315	ARRAY_SIZE(pcm038_i2c_devices));
	316
77a406da	317	imx27_add_imx_i2c(1, &pcm038_i2c1_data);
a4e9a65a	318
0160651a LF	319	/* PE18 for user-LED D40 */
	320	mxc_gpio_mode(GPIO_PORTE \| 18 \| GPIO_GPIO \| GPIO_OUT);
	321
61533841 SH	322	mxc_gpio_mode(GPIO_PORTD \| 28 \| GPIO_GPIO \| GPIO_OUT);
	323
	324	/* MC13783 IRQ */
	325	mxc_gpio_mode(GPIO_PORTB \| 23 \| GPIO_GPIO \| GPIO_IN);
	326
7536cf99	327	imx27_add_spi_imx0(&pcm038_spi0_data);
438196c3	328	pcm038_spi_board_info[0].irq = gpio_to_irq(IMX_GPIO_NR(2, 23));
61533841 SH	329	spi_register_board_info(pcm038_spi_board_info,
	330	ARRAY_SIZE(pcm038_spi_board_info));
	331
2eb42d5c	332	imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
773f206b	333
6bd96f3c	334	imx27_add_fec(NULL);
7e5e9f54	335	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
bec31a85 BT	336	imx27_add_imx2_wdt();
bec31a85 BT	337	imx27_add_mxc_w1();
ff6552e4 JB	338
	339	#ifdef CONFIG_MACH_PCM970_BASEBOARD
	340	pcm970_baseboard_init();
	341	#endif
7e5e9f54 JB	342	}
	343
	344	static void __init pcm038_timer_init(void)
	345	{
30c730f8	346	mx27_clocks_init(26000000);
7e5e9f54 JB	347	}
7e5e9f54 JB	348
7e5e9f54	349	MACHINE_START(PCM038, "phyCORE-i.MX27")
dc8f1907	350	.atag_offset = 0x100,
3dac2196 UKK	351	.map_io = mx27_map_io,
	352	.init_early = imx27_init_early,
	353	.init_irq = mx27_init_irq,
ffa2ea3f	354	.handle_irq = imx27_handle_irq,
6bb27d73	355	.init_time = pcm038_timer_init,
3dac2196	356	.init_machine = pcm038_init,
65ea7884	357	.restart = mxc_restart,
7e5e9f54	358	MACHINE_END