[deliverable/linux.git] / arch / arm / mach-imx / mach-scb9328.c

/*
 * linux/arch/arm/mach-mx1/mach-scb9328.c
 *
 * Copyright (c) 2004 Sascha Hauer <saschahauer@web.de>
 * Copyright (c) 2006-2008 Juergen Beisert <jbeisert@netscape.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/interrupt.h>
#include <linux/dm9000.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>

#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/iomux-mx1.h>

#include "devices-imx1.h"

/*
 * This scb9328 has a 32MiB flash
 */
static struct resource flash_resource = {
	.start	= MX1_CS0_PHYS,
	.end	= MX1_CS0_PHYS + (32 * 1024 * 1024) - 1,
	.flags	= IORESOURCE_MEM,
};

static struct physmap_flash_data scb_flash_data = {
	.width  = 2,
};

static struct platform_device scb_flash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev = {
		.platform_data = &scb_flash_data,
	},
	.resource = &flash_resource,
	.num_resources = 1,
};

/*
 * scb9328 has a DM9000 network controller
 * connected to CS5, with 16 bit data path
 * and interrupt connected to GPIO 3
 */

/*
 * internal datapath is fixed 16 bit
 */
static struct dm9000_plat_data dm9000_platdata = {
	.flags	= DM9000_PLATF_16BITONLY,
};

/*
 * the DM9000 drivers wants two defined address spaces
 * to gain access to address latch registers and the data path.
 */
static struct resource dm9000x_resources[] = {
	{
		.name	= "address area",
		.start	= MX1_CS5_PHYS,
		.end	= MX1_CS5_PHYS + 1,
		.flags	= IORESOURCE_MEM,	/* address access */
	}, {
		.name	= "data area",
		.start	= MX1_CS5_PHYS + 4,
		.end	= MX1_CS5_PHYS + 5,
		.flags	= IORESOURCE_MEM,	/* data access */
	}, {
		.start	= IRQ_GPIOC(3),
		.end	= IRQ_GPIOC(3),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	},
};

static struct platform_device dm9000x_device = {
	.name		= "dm9000",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(dm9000x_resources),
	.resource	= dm9000x_resources,
	.dev		= {
		.platform_data = &dm9000_platdata,
	}
};

static const int mxc_uart1_pins[] = {
	PC9_PF_UART1_CTS,
	PC10_PF_UART1_RTS,
	PC11_PF_UART1_TXD,
	PC12_PF_UART1_RXD,
};

static int uart1_mxc_init(struct platform_device *pdev)
{
	return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
			ARRAY_SIZE(mxc_uart1_pins), "UART1");
}

static void uart1_mxc_exit(struct platform_device *pdev)
{
	mxc_gpio_release_multiple_pins(mxc_uart1_pins,
			ARRAY_SIZE(mxc_uart1_pins));
}

static const struct imxuart_platform_data uart_pdata __initconst = {
	.init = uart1_mxc_init,
	.exit = uart1_mxc_exit,
	.flags = IMXUART_HAVE_RTSCTS,
};

static struct platform_device *devices[] __initdata = {
	&scb_flash_device,
	&dm9000x_device,
};

/*
 * scb9328_init - Init the CPU card itself
 */
static void __init scb9328_init(void)
{
	imx1_add_imx_uart0(&uart_pdata);

	printk(KERN_INFO"Scb9328: Adding devices\n");
	platform_add_devices(devices, ARRAY_SIZE(devices));
}

static void __init scb9328_timer_init(void)
{
	mx1_clocks_init(32000);
}

static struct sys_timer scb9328_timer = {
	.init	= scb9328_timer_init,
};

MACHINE_START(SCB9328, "Synertronixx scb9328")
    /* Sascha Hauer */
	.boot_params	= 0x08000100,
	.map_io		= mx1_map_io,
	.init_irq	= mx1_init_irq,
	.timer		= &scb9328_timer,
	.init_machine	= scb9328_init,
MACHINE_END
Commit	Line	Data
24205632	1	/*
95c00464	2	* linux/arch/arm/mach-mx1/mach-scb9328.c
24205632 SH	3	*
	4	* Copyright (c) 2004 Sascha Hauer <saschahauer@web.de>
	5	* Copyright (c) 2006-2008 Juergen Beisert <jbeisert@netscape.net>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	*/
	12
	13	#include <linux/platform_device.h>
	14	#include <linux/mtd/physmap.h>
	15	#include <linux/interrupt.h>
	16	#include <linux/dm9000.h>
	17
	18	#include <asm/mach-types.h>
	19	#include <asm/mach/arch.h>
	20	#include <asm/mach/time.h>
	21
	22	#include <mach/common.h>
	23	#include <mach/hardware.h>
	24	#include <mach/irqs.h>
e835d88e	25	#include <mach/iomux-mx1.h>
24205632	26
d112f4e4	27	#include "devices-imx1.h"
24205632 SH	28
	29	/*
	30	* This scb9328 has a 32MiB flash
	31	*/
	32	static struct resource flash_resource = {
05a3185c UKK	33	.start = MX1_CS0_PHYS,
05a3185c UKK	34	.end = MX1_CS0_PHYS + (32 * 1024 * 1024) - 1,
24205632 SH	35	.flags = IORESOURCE_MEM,
	36	};
	37
	38	static struct physmap_flash_data scb_flash_data = {
	39	.width = 2,
	40	};
	41
	42	static struct platform_device scb_flash_device = {
	43	.name = "physmap-flash",
	44	.id = 0,
	45	.dev = {
	46	.platform_data = &scb_flash_data,
	47	},
	48	.resource = &flash_resource,
	49	.num_resources = 1,
	50	};
	51
	52	/*
	53	* scb9328 has a DM9000 network controller
	54	* connected to CS5, with 16 bit data path
	55	* and interrupt connected to GPIO 3
	56	*/
	57
	58	/*
	59	* internal datapath is fixed 16 bit
	60	*/
	61	static struct dm9000_plat_data dm9000_platdata = {
	62	.flags = DM9000_PLATF_16BITONLY,
	63	};
	64
	65	/*
	66	* the DM9000 drivers wants two defined address spaces
	67	* to gain access to address latch registers and the data path.
	68	*/
	69	static struct resource dm9000x_resources[] = {
9b0e6db0	70	{
24205632	71	.name = "address area",
05a3185c UKK	72	.start = MX1_CS5_PHYS,
05a3185c UKK	73	.end = MX1_CS5_PHYS + 1,
9b0e6db0 SH	74	.flags = IORESOURCE_MEM, /* address access */
9b0e6db0 SH	75	}, {
24205632	76	.name = "data area",
05a3185c UKK	77	.start = MX1_CS5_PHYS + 4,
05a3185c UKK	78	.end = MX1_CS5_PHYS + 5,
9b0e6db0 SH	79	.flags = IORESOURCE_MEM, /* data access */
9b0e6db0 SH	80	}, {
24205632 SH	81	.start = IRQ_GPIOC(3),
24205632 SH	82	.end = IRQ_GPIOC(3),
9b0e6db0	83	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
24205632 SH	84	},
	85	};
	86
	87	static struct platform_device dm9000x_device = {
	88	.name = "dm9000",
	89	.id = 0,
	90	.num_resources = ARRAY_SIZE(dm9000x_resources),
	91	.resource = dm9000x_resources,
	92	.dev = {
	93	.platform_data = &dm9000_platdata,
	94	}
	95	};
	96
6c80ee51	97	static const int mxc_uart1_pins[] = {
24205632 SH	98	PC9_PF_UART1_CTS,
	99	PC10_PF_UART1_RTS,
	100	PC11_PF_UART1_TXD,
	101	PC12_PF_UART1_RXD,
	102	};
	103
	104	static int uart1_mxc_init(struct platform_device *pdev)
	105	{
	106	return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
	107	ARRAY_SIZE(mxc_uart1_pins), "UART1");
	108	}
	109
a02b0420	110	static void uart1_mxc_exit(struct platform_device *pdev)
24205632 SH	111	{
	112	mxc_gpio_release_multiple_pins(mxc_uart1_pins,
	113	ARRAY_SIZE(mxc_uart1_pins));
24205632 SH	114	}
24205632 SH	115
d112f4e4	116	static const struct imxuart_platform_data uart_pdata __initconst = {
24205632 SH	117	.init = uart1_mxc_init,
	118	.exit = uart1_mxc_exit,
	119	.flags = IMXUART_HAVE_RTSCTS,
	120	};
	121
	122	static struct platform_device *devices[] __initdata = {
	123	&scb_flash_device,
	124	&dm9000x_device,
	125	};
	126
	127	/*
	128	* scb9328_init - Init the CPU card itself
	129	*/
	130	static void __init scb9328_init(void)
	131	{
d112f4e4	132	imx1_add_imx_uart0(&uart_pdata);
24205632 SH	133
	134	printk(KERN_INFO"Scb9328: Adding devices\n");
	135	platform_add_devices(devices, ARRAY_SIZE(devices));
	136	}
	137
	138	static void __init scb9328_timer_init(void)
	139	{
	140	mx1_clocks_init(32000);
	141	}
	142
	143	static struct sys_timer scb9328_timer = {
	144	.init = scb9328_timer_init,
	145	};
	146
	147	MACHINE_START(SCB9328, "Synertronixx scb9328")
	148	/* Sascha Hauer */
24205632	149	.boot_params = 0x08000100,
cd4a05f9	150	.map_io = mx1_map_io,
c5aa0ad0	151	.init_irq = mx1_init_irq,
24205632 SH	152	.timer = &scb9328_timer,
	153	.init_machine = scb9328_init,
	154	MACHINE_END