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cfca8b53 PZ |
1 | /* |
2 | * author: Sascha Hauer | |
3 | * Created: april 20th, 2004 | |
4 | * Copyright: Synertronixx GmbH | |
5 | * | |
07469495 | 6 | * Common code for i.MX1 machines |
cfca8b53 PZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
cfca8b53 PZ |
17 | */ |
18 | #include <linux/kernel.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/io.h> | |
21 | ||
22 | #include <asm/mach/map.h> | |
23 | ||
345569a2 | 24 | #include <mach/common.h> |
cfca8b53 | 25 | #include <mach/hardware.h> |
5ae30b47 | 26 | #include <mach/irqs.h> |
ff255feb | 27 | #include <mach/iomux-v1.h> |
cfca8b53 PZ |
28 | |
29 | static struct map_desc imx_io_desc[] __initdata = { | |
08ff97b5 | 30 | imx_map_entry(MX1, IO, MT_DEVICE), |
cfca8b53 PZ |
31 | }; |
32 | ||
cd4a05f9 | 33 | void __init mx1_map_io(void) |
3dac2196 UKK |
34 | { |
35 | iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); | |
36 | } | |
37 | ||
38 | void __init imx1_init_early(void) | |
cfca8b53 | 39 | { |
cd4a05f9 | 40 | mxc_set_cpu_type(MXC_CPU_MX1); |
05a3185c | 41 | mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); |
ff255feb SH |
42 | imx_iomuxv1_init(MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR), |
43 | MX1_NUM_GPIO_PORT); | |
cfca8b53 | 44 | } |
c5aa0ad0 SH |
45 | |
46 | void __init mx1_init_irq(void) | |
47 | { | |
05a3185c | 48 | mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); |
b78d8e59 SG |
49 | } |
50 | ||
51 | void __init imx1_soc_init(void) | |
52 | { | |
e7fc6ae7 SG |
53 | mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256, |
54 | MX1_GPIO_INT_PORTA, 0); | |
55 | mxc_register_gpio("imx1-gpio", 1, MX1_GPIO2_BASE_ADDR, SZ_256, | |
56 | MX1_GPIO_INT_PORTB, 0); | |
57 | mxc_register_gpio("imx1-gpio", 2, MX1_GPIO3_BASE_ADDR, SZ_256, | |
58 | MX1_GPIO_INT_PORTC, 0); | |
59 | mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, | |
60 | MX1_GPIO_INT_PORTD, 0); | |
c5aa0ad0 | 61 | } |