gpio/mxc: Change gpio-mxc into an upstanding gpio driver
[deliverable/linux.git] / arch / arm / mach-imx / mm-imx21.c
CommitLineData
eea643f7 1/*
d109167b 2 * arch/arm/mach-imx/mm-imx21.c
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JB
3 *
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#include <linux/mm.h>
22#include <linux/init.h>
a09e64fb 23#include <mach/hardware.h>
058b7a6f 24#include <mach/common.h>
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25#include <asm/pgtable.h>
26#include <asm/mach/map.h>
5ae30b47 27#include <mach/irqs.h>
ff255feb 28#include <mach/iomux-v1.h>
eea643f7 29
4a50d00c
UKK
30/* MX21 memory map definition */
31static struct map_desc imx21_io_desc[] __initdata = {
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32 /*
33 * this fixed mapping covers:
34 * - AIPI1
35 * - AIPI2
36 * - AITC
37 * - ROM Patch
38 * - and some reserved space
39 */
08ff97b5 40 imx_map_entry(MX21, AIPI, MT_DEVICE),
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41 /*
42 * this fixed mapping covers:
43 * - CSI
44 * - ATA
45 */
08ff97b5 46 imx_map_entry(MX21, SAHB1, MT_DEVICE),
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47 /*
48 * this fixed mapping covers:
49 * - EMI
50 */
08ff97b5 51 imx_map_entry(MX21, X_MEMC, MT_DEVICE),
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52};
53
54/*
55 * Initialize the memory map. It is called during the
56 * system startup to create static physical to virtual
57 * memory map for the IO modules.
58 */
cd4a05f9 59void __init mx21_map_io(void)
3dac2196
UKK
60{
61 iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
62}
63
64void __init imx21_init_early(void)
eea643f7 65{
cd4a05f9 66 mxc_set_cpu_type(MXC_CPU_MX21);
4a50d00c 67 mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR));
ff255feb
SH
68 imx_iomuxv1_init(MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR),
69 MX21_NUM_GPIO_PORT);
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SH
70}
71
72void __init mx21_init_irq(void)
73{
4a50d00c 74 mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
b78d8e59
SG
75}
76
77void __init imx21_soc_init(void)
78{
79 mxc_register_gpio(0, MX21_GPIO1_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0);
80 mxc_register_gpio(1, MX21_GPIO2_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0);
81 mxc_register_gpio(2, MX21_GPIO3_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0);
82 mxc_register_gpio(3, MX21_GPIO4_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0);
83 mxc_register_gpio(4, MX21_GPIO5_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0);
84 mxc_register_gpio(5, MX21_GPIO6_BASE_ADDR, SZ_4K, MX21_INT_GPIO, 0);
c5aa0ad0 85}
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