[deliverable/linux.git] / arch / arm / mach-imx / mx31lilly-db.c

/*
 *  LILLY-1131 development board support
 *
 *    Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
 *
 *  based on code for other MX31 boards,
 *
 *    Copyright 2005-2007 Freescale Semiconductor
 *    Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
 *    Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include "board-mx31lilly.h"
#include "common.h"
#include "devices-imx31.h"
#include "hardware.h"
#include "iomux-mx3.h"

/*
 * This file contains board-specific initialization routines for the
 * LILLY-1131 development board. If you design an own baseboard for the
 * module, use this file as base for support code.
 */

static unsigned int lilly_db_board_pins[] __initdata = {
	MX31_PIN_CTS1__CTS1,
	MX31_PIN_RTS1__RTS1,
	MX31_PIN_TXD1__TXD1,
	MX31_PIN_RXD1__RXD1,
	MX31_PIN_CTS2__CTS2,
	MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2,
	MX31_PIN_RXD2__RXD2,
	MX31_PIN_CSPI3_MOSI__RXD3,
	MX31_PIN_CSPI3_MISO__TXD3,
	MX31_PIN_CSPI3_SCLK__RTS3,
	MX31_PIN_CSPI3_SPI_RDY__CTS3,
	MX31_PIN_SD1_DATA3__SD1_DATA3,
	MX31_PIN_SD1_DATA2__SD1_DATA2,
	MX31_PIN_SD1_DATA1__SD1_DATA1,
	MX31_PIN_SD1_DATA0__SD1_DATA0,
	MX31_PIN_SD1_CLK__SD1_CLK,
	MX31_PIN_SD1_CMD__SD1_CMD,
	MX31_PIN_LD0__LD0,
	MX31_PIN_LD1__LD1,
	MX31_PIN_LD2__LD2,
	MX31_PIN_LD3__LD3,
	MX31_PIN_LD4__LD4,
	MX31_PIN_LD5__LD5,
	MX31_PIN_LD6__LD6,
	MX31_PIN_LD7__LD7,
	MX31_PIN_LD8__LD8,
	MX31_PIN_LD9__LD9,
	MX31_PIN_LD10__LD10,
	MX31_PIN_LD11__LD11,
	MX31_PIN_LD12__LD12,
	MX31_PIN_LD13__LD13,
	MX31_PIN_LD14__LD14,
	MX31_PIN_LD15__LD15,
	MX31_PIN_LD16__LD16,
	MX31_PIN_LD17__LD17,
	MX31_PIN_VSYNC3__VSYNC3,
	MX31_PIN_HSYNC__HSYNC,
	MX31_PIN_FPSHIFT__FPSHIFT,
	MX31_PIN_DRDY0__DRDY0,
	MX31_PIN_CONTRAST__CONTRAST,
};

/* UART */
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/* MMC support */

static int mxc_mmc1_get_ro(struct device *dev)
{
	return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
}

static int gpio_det, gpio_wp;

#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)

static int mxc_mmc1_init(struct device *dev,
			 irq_handler_t detect_irq, void *data)
{
	int ret;

	gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1);
	gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0);

	mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);

	ret = gpio_request(gpio_det, "MMC detect");
	if (ret)
		return ret;

	ret = gpio_request(gpio_wp, "MMC w/p");
	if (ret)
		goto exit_free_det;

	gpio_direction_input(gpio_det);
	gpio_direction_input(gpio_wp);

	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)),
			  detect_irq,
			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
			  "MMC detect", data);
	if (ret)
		goto exit_free_wp;

	return 0;

exit_free_wp:
	gpio_free(gpio_wp);

exit_free_det:
	gpio_free(gpio_det);

	return ret;
}

static void mxc_mmc1_exit(struct device *dev, void *data)
{
	gpio_free(gpio_det);
	gpio_free(gpio_wp);
	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)), data);
}

static const struct imxmmc_platform_data mmc_pdata __initconst = {
	.get_ro	= mxc_mmc1_get_ro,
	.init	= mxc_mmc1_init,
	.exit	= mxc_mmc1_exit,
};

/* Framebuffer support */
static const struct fb_videomode fb_modedb = {
	/* 640x480 TFT panel (IPS-056T) */
	.name		= "CRT-VGA",
	.refresh	= 64,
	.xres		= 640,
	.yres		= 480,
	.pixclock	= 30000,
	.left_margin	= 200,
	.right_margin	= 2,
	.upper_margin	= 2,
	.lower_margin	= 2,
	.hsync_len	= 3,
	.vsync_len	= 1,
	.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
	.vmode		= FB_VMODE_NONINTERLACED,
	.flag		= 0,
};

static struct mx3fb_platform_data fb_pdata __initdata = {
	.name		= "CRT-VGA",
	.mode		= &fb_modedb,
	.num_modes	= 1,
};

#define LCD_VCC_EN_GPIO	 (7)

static void __init mx31lilly_init_fb(void)
{
	if (gpio_request(LCD_VCC_EN_GPIO, "LCD enable") != 0) {
		printk(KERN_WARNING "unable to request LCD_VCC_EN pin.\n");
		return;
	}

	imx31_add_ipu_core();
	imx31_add_mx3_sdc_fb(&fb_pdata);
	gpio_direction_output(LCD_VCC_EN_GPIO, 1);
}

void __init mx31lilly_db_init(void)
{
	mxc_iomux_setup_multiple_pins(lilly_db_board_pins,
					ARRAY_SIZE(lilly_db_board_pins),
					"development board pins");
	imx31_add_imx_uart0(&uart_pdata);
	imx31_add_imx_uart1(&uart_pdata);
	imx31_add_imx_uart2(&uart_pdata);
	imx31_add_mxc_mmc(0, &mmc_pdata);
	mx31lilly_init_fb();
}
Commit	Line	Data
1bc34f79 DM	1	/*
	2	* LILLY-1131 development board support
	3	*
	4	* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
	5	*
	6	* based on code for other MX31 boards,
	7	*
	8	* Copyright 2005-2007 Freescale Semiconductor
	9	* Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
	10	* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2 of the License, or
	15	* (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
1bc34f79 DM	21	*/
	22
	23	#include <linux/kernel.h>
	24	#include <linux/types.h>
	25	#include <linux/init.h>
d0b1eabc	26	#include <linux/gpio.h>
b9923872	27	#include <linux/platform_device.h>
1bc34f79 DM	28
	29	#include <asm/mach-types.h>
	30	#include <asm/mach/arch.h>
	31	#include <asm/mach/map.h>
	32
3ed0bcb4	33	#include "board-mx31lilly.h"
e3372474	34	#include "common.h"
16cf5c41	35	#include "devices-imx31.h"
50f2de61	36	#include "hardware.h"
267dd34c	37	#include "iomux-mx3.h"
1bc34f79 DM	38
	39	/*
	40	* This file contains board-specific initialization routines for the
	41	* LILLY-1131 development board. If you design an own baseboard for the
	42	* module, use this file as base for support code.
	43	*/
	44
	45	static unsigned int lilly_db_board_pins[] __initdata = {
	46	MX31_PIN_CTS1__CTS1,
	47	MX31_PIN_RTS1__RTS1,
	48	MX31_PIN_TXD1__TXD1,
	49	MX31_PIN_RXD1__RXD1,
8d9fb9bb DM	50	MX31_PIN_CTS2__CTS2,
	51	MX31_PIN_RTS2__RTS2,
	52	MX31_PIN_TXD2__TXD2,
	53	MX31_PIN_RXD2__RXD2,
	54	MX31_PIN_CSPI3_MOSI__RXD3,
	55	MX31_PIN_CSPI3_MISO__TXD3,
	56	MX31_PIN_CSPI3_SCLK__RTS3,
	57	MX31_PIN_CSPI3_SPI_RDY__CTS3,
d0b1eabc DM	58	MX31_PIN_SD1_DATA3__SD1_DATA3,
	59	MX31_PIN_SD1_DATA2__SD1_DATA2,
	60	MX31_PIN_SD1_DATA1__SD1_DATA1,
	61	MX31_PIN_SD1_DATA0__SD1_DATA0,
	62	MX31_PIN_SD1_CLK__SD1_CLK,
	63	MX31_PIN_SD1_CMD__SD1_CMD,
b9923872 DM	64	MX31_PIN_LD0__LD0,
	65	MX31_PIN_LD1__LD1,
	66	MX31_PIN_LD2__LD2,
	67	MX31_PIN_LD3__LD3,
	68	MX31_PIN_LD4__LD4,
	69	MX31_PIN_LD5__LD5,
	70	MX31_PIN_LD6__LD6,
	71	MX31_PIN_LD7__LD7,
	72	MX31_PIN_LD8__LD8,
	73	MX31_PIN_LD9__LD9,
	74	MX31_PIN_LD10__LD10,
	75	MX31_PIN_LD11__LD11,
	76	MX31_PIN_LD12__LD12,
	77	MX31_PIN_LD13__LD13,
	78	MX31_PIN_LD14__LD14,
	79	MX31_PIN_LD15__LD15,
	80	MX31_PIN_LD16__LD16,
	81	MX31_PIN_LD17__LD17,
	82	MX31_PIN_VSYNC3__VSYNC3,
	83	MX31_PIN_HSYNC__HSYNC,
	84	MX31_PIN_FPSHIFT__FPSHIFT,
	85	MX31_PIN_DRDY0__DRDY0,
	86	MX31_PIN_CONTRAST__CONTRAST,
1bc34f79 DM	87	};
	88
	89	/* UART */
16cf5c41	90	static const struct imxuart_platform_data uart_pdata __initconst = {
1bc34f79 DM	91	.flags = IMXUART_HAVE_RTSCTS,
	92	};
	93
d0b1eabc DM	94	/* MMC support */
	95
	96	static int mxc_mmc1_get_ro(struct device *dev)
	97	{
	98	return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
	99	}
	100
	101	static int gpio_det, gpio_wp;
	102
24fb8422 DM	103	#define MMC_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
	104	PAD_CTL_ODE_CMOS \| PAD_CTL_100K_PU)
	105
d0b1eabc DM	106	static int mxc_mmc1_init(struct device *dev,
	107	irq_handler_t detect_irq, void *data)
	108	{
	109	int ret;
	110
	111	gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1);
	112	gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0);
	113
24fb8422 DM	114	mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
	115	mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
	116	mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
	117	mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
	118	mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
	119	mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
	120
d0b1eabc DM	121	ret = gpio_request(gpio_det, "MMC detect");
	122	if (ret)
	123	return ret;
	124
	125	ret = gpio_request(gpio_wp, "MMC w/p");
	126	if (ret)
	127	goto exit_free_det;
	128
	129	gpio_direction_input(gpio_det);
	130	gpio_direction_input(gpio_wp);
	131
ed175343 SG	132	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)),
ed175343 SG	133	detect_irq,
d0b1eabc DM	134	IRQF_DISABLED \| IRQF_TRIGGER_FALLING,
	135	"MMC detect", data);
	136	if (ret)
	137	goto exit_free_wp;
	138
	139	return 0;
	140
	141	exit_free_wp:
	142	gpio_free(gpio_wp);
	143
	144	exit_free_det:
	145	gpio_free(gpio_det);
	146
	147	return ret;
	148	}
	149
	150	static void mxc_mmc1_exit(struct device dev, void data)
	151	{
	152	gpio_free(gpio_det);
	153	gpio_free(gpio_wp);
ed175343	154	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)), data);
d0b1eabc DM	155	}
d0b1eabc DM	156
6a697e3d	157	static const struct imxmmc_platform_data mmc_pdata __initconst = {
d0b1eabc DM	158	.get_ro = mxc_mmc1_get_ro,
	159	.init = mxc_mmc1_init,
	160	.exit = mxc_mmc1_exit,
	161	};
	162
b9923872	163	/* Framebuffer support */
b9923872 DM	164	static const struct fb_videomode fb_modedb = {
b9923872 DM	165	/* 640x480 TFT panel (IPS-056T) */
27ad4bf7	166	.name = "CRT-VGA",
b9923872 DM	167	.refresh = 64,
	168	.xres = 640,
	169	.yres = 480,
	170	.pixclock = 30000,
	171	.left_margin = 200,
	172	.right_margin = 2,
	173	.upper_margin = 2,
	174	.lower_margin = 2,
	175	.hsync_len = 3,
	176	.vsync_len = 1,
	177	.sync = FB_SYNC_VERT_HIGH_ACT \| FB_SYNC_OE_ACT_HIGH,
	178	.vmode = FB_VMODE_NONINTERLACED,
	179	.flag = 0,
	180	};
	181
	182	static struct mx3fb_platform_data fb_pdata __initdata = {
b9923872 DM	183	.name = "CRT-VGA",
	184	.mode = &fb_modedb,
	185	.num_modes = 1,
	186	};
	187
	188	#define LCD_VCC_EN_GPIO (7)
	189
	190	static void __init mx31lilly_init_fb(void)
	191	{
	192	if (gpio_request(LCD_VCC_EN_GPIO, "LCD enable") != 0) {
	193	printk(KERN_WARNING "unable to request LCD_VCC_EN pin.\n");
	194	return;
	195	}
	196
88289c80	197	imx31_add_ipu_core();
afa77ef3	198	imx31_add_mx3_sdc_fb(&fb_pdata);
b9923872 DM	199	gpio_direction_output(LCD_VCC_EN_GPIO, 1);
	200	}
	201
1bc34f79 DM	202	void __init mx31lilly_db_init(void)
	203	{
	204	mxc_iomux_setup_multiple_pins(lilly_db_board_pins,
	205	ARRAY_SIZE(lilly_db_board_pins),
	206	"development board pins");
16cf5c41 UKK	207	imx31_add_imx_uart0(&uart_pdata);
	208	imx31_add_imx_uart1(&uart_pdata);
	209	imx31_add_imx_uart2(&uart_pdata);
6a697e3d	210	imx31_add_mxc_mmc(0, &mmc_pdata);
b9923872	211	mx31lilly_init_fb();
1bc34f79	212	}