[deliverable/linux.git] / arch / arm / mach-imx / mx31lite-db.c

/*
 *  LogicPD i.MX31 SOM-LV development board support
 *
 *    Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
 *
 *  based on code for other MX31 boards,
 *
 *    Copyright 2005-2007 Freescale Semiconductor
 *    Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
 *    Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/leds.h>
#include <linux/platform_device.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include "board-mx31lite.h"
#include "common.h"
#include "devices-imx31.h"
#include "hardware.h"
#include "iomux-mx3.h"

/*
 * This file contains board-specific initialization routines for the
 * LogicPD i.MX31 SOM-LV development board, aka 'LiteKit'.
 * If you design an own baseboard for the module, use this file as base
 * for support code.
 */

static unsigned int litekit_db_board_pins[] __initdata = {
	/* UART1 */
	MX31_PIN_CTS1__CTS1,
	MX31_PIN_RTS1__RTS1,
	MX31_PIN_TXD1__TXD1,
	MX31_PIN_RXD1__RXD1,
	/* SPI 0 */
	MX31_PIN_CSPI1_SCLK__SCLK,
	MX31_PIN_CSPI1_MOSI__MOSI,
	MX31_PIN_CSPI1_MISO__MISO,
	MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
	MX31_PIN_CSPI1_SS0__SS0,
	MX31_PIN_CSPI1_SS1__SS1,
	MX31_PIN_CSPI1_SS2__SS2,
	/* SDHC1 */
	MX31_PIN_SD1_DATA0__SD1_DATA0,
	MX31_PIN_SD1_DATA1__SD1_DATA1,
	MX31_PIN_SD1_DATA2__SD1_DATA2,
	MX31_PIN_SD1_DATA3__SD1_DATA3,
	MX31_PIN_SD1_CLK__SD1_CLK,
	MX31_PIN_SD1_CMD__SD1_CMD,
};

/* UART */
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/* MMC */

static int gpio_det, gpio_wp;

#define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
		     PAD_CTL_ODE_CMOS)

static int mxc_mmc1_get_ro(struct device *dev)
{
	return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_6));
}

static int mxc_mmc1_init(struct device *dev,
			 irq_handler_t detect_irq, void *data)
{
	int ret;

	gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1);
	gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6);

	mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
			  MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
	mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
			  MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
	mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
			  MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
	mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
			  MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
	mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
			  MMC_PAD_CFG | PAD_CTL_PUE_PUD | PAD_CTL_100K_PU);
	mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);

	ret = gpio_request(gpio_det, "MMC detect");
	if (ret)
		return ret;

	ret = gpio_request(gpio_wp, "MMC w/p");
	if (ret)
		goto exit_free_det;

	gpio_direction_input(gpio_det);
	gpio_direction_input(gpio_wp);

	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)),
			  detect_irq,
			  IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
			  "MMC detect", data);
	if (ret)
		goto exit_free_wp;

	return 0;

exit_free_wp:
	gpio_free(gpio_wp);

exit_free_det:
	gpio_free(gpio_det);

	return ret;
}

static void mxc_mmc1_exit(struct device *dev, void *data)
{
	gpio_free(gpio_det);
	gpio_free(gpio_wp);
	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)), data);
}

static const struct imxmmc_platform_data mmc_pdata __initconst = {
	.get_ro	 = mxc_mmc1_get_ro,
	.init	   = mxc_mmc1_init,
	.exit	   = mxc_mmc1_exit,
};

/* SPI */

static int spi_internal_chipselect[] = {
	MXC_SPI_CS(0),
	MXC_SPI_CS(1),
	MXC_SPI_CS(2),
};

static const struct spi_imx_master spi0_pdata __initconst = {
	.chipselect	= spi_internal_chipselect,
	.num_chipselect	= ARRAY_SIZE(spi_internal_chipselect),
};

/* GPIO LEDs */

static const struct gpio_led litekit_leds[] __initconst = {
	{
		.name           = "GPIO0",
		.gpio           = IOMUX_TO_GPIO(MX31_PIN_COMPARE),
		.active_low     = 1,
		.default_state  = LEDS_GPIO_DEFSTATE_OFF,
	},
	{
		.name           = "GPIO1",
		.gpio           = IOMUX_TO_GPIO(MX31_PIN_CAPTURE),
		.active_low     = 1,
		.default_state  = LEDS_GPIO_DEFSTATE_OFF,
	}
};

static const struct gpio_led_platform_data
		litekit_led_platform_data __initconst = {
	.leds           = litekit_leds,
	.num_leds       = ARRAY_SIZE(litekit_leds),
};

void __init mx31lite_db_init(void)
{
	mxc_iomux_setup_multiple_pins(litekit_db_board_pins,
					ARRAY_SIZE(litekit_db_board_pins),
					"development board pins");
	imx31_add_imx_uart0(&uart_pdata);
	imx31_add_mxc_mmc(0, &mmc_pdata);
	imx31_add_spi_imx0(&spi0_pdata);
	gpio_led_register_device(-1, &litekit_led_platform_data);
	imx31_add_imx2_wdt();
	imx31_add_mxc_rtc();
}
Commit	Line	Data
b7d91a62 DM	1	/*
	2	* LogicPD i.MX31 SOM-LV development board support
	3	*
	4	* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
	5	*
	6	* based on code for other MX31 boards,
	7	*
	8	* Copyright 2005-2007 Freescale Semiconductor
	9	* Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
	10	* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2 of the License, or
	15	* (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
b7d91a62 DM	21	*/
	22
	23	#include <linux/kernel.h>
	24	#include <linux/types.h>
	25	#include <linux/init.h>
	26	#include <linux/gpio.h>
81057f32 DM	27	#include <linux/leds.h>
81057f32 DM	28	#include <linux/platform_device.h>
b7d91a62 DM	29
	30	#include <asm/mach-types.h>
	31	#include <asm/mach/arch.h>
	32	#include <asm/mach/map.h>
	33
3ed0bcb4	34	#include "board-mx31lite.h"
e3372474	35	#include "common.h"
06606ff1	36	#include "devices-imx31.h"
50f2de61	37	#include "hardware.h"
267dd34c	38	#include "iomux-mx3.h"
b7d91a62 DM	39
	40	/*
	41	* This file contains board-specific initialization routines for the
	42	* LogicPD i.MX31 SOM-LV development board, aka 'LiteKit'.
	43	* If you design an own baseboard for the module, use this file as base
	44	* for support code.
	45	*/
	46
	47	static unsigned int litekit_db_board_pins[] __initdata = {
	48	/* UART1 */
	49	MX31_PIN_CTS1__CTS1,
	50	MX31_PIN_RTS1__RTS1,
	51	MX31_PIN_TXD1__TXD1,
	52	MX31_PIN_RXD1__RXD1,
84677d11 DM	53	/* SPI 0 */
	54	MX31_PIN_CSPI1_SCLK__SCLK,
	55	MX31_PIN_CSPI1_MOSI__MOSI,
	56	MX31_PIN_CSPI1_MISO__MISO,
	57	MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
	58	MX31_PIN_CSPI1_SS0__SS0,
	59	MX31_PIN_CSPI1_SS1__SS1,
	60	MX31_PIN_CSPI1_SS2__SS2,
70c91a38 VZ	61	/* SDHC1 */
	62	MX31_PIN_SD1_DATA0__SD1_DATA0,
	63	MX31_PIN_SD1_DATA1__SD1_DATA1,
	64	MX31_PIN_SD1_DATA2__SD1_DATA2,
	65	MX31_PIN_SD1_DATA3__SD1_DATA3,
	66	MX31_PIN_SD1_CLK__SD1_CLK,
	67	MX31_PIN_SD1_CMD__SD1_CMD,
b7d91a62 DM	68	};
	69
	70	/* UART */
16cf5c41	71	static const struct imxuart_platform_data uart_pdata __initconst = {
b7d91a62 DM	72	.flags = IMXUART_HAVE_RTSCTS,
	73	};
	74
364cd540 DM	75	/* MMC */
	76
	77	static int gpio_det, gpio_wp;
	78
	79	#define MMC_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
70c91a38	80	PAD_CTL_ODE_CMOS)
364cd540 DM	81
	82	static int mxc_mmc1_get_ro(struct device *dev)
	83	{
70c91a38	84	return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_GPIO1_6));
364cd540 DM	85	}
	86
	87	static int mxc_mmc1_init(struct device *dev,
	88	irq_handler_t detect_irq, void *data)
	89	{
	90	int ret;
	91
	92	gpio_det = IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1);
	93	gpio_wp = IOMUX_TO_GPIO(MX31_PIN_GPIO1_6);
	94
70c91a38 VZ	95	mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
	96	MMC_PAD_CFG \| PAD_CTL_PUE_PUD \| PAD_CTL_100K_PU);
	97	mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
	98	MMC_PAD_CFG \| PAD_CTL_PUE_PUD \| PAD_CTL_100K_PU);
	99	mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
	100	MMC_PAD_CFG \| PAD_CTL_PUE_PUD \| PAD_CTL_100K_PU);
	101	mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
	102	MMC_PAD_CFG \| PAD_CTL_PUE_PUD \| PAD_CTL_100K_PU);
	103	mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
	104	MMC_PAD_CFG \| PAD_CTL_PUE_PUD \| PAD_CTL_100K_PU);
364cd540	105	mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
364cd540 DM	106
	107	ret = gpio_request(gpio_det, "MMC detect");
	108	if (ret)
	109	return ret;
	110
	111	ret = gpio_request(gpio_wp, "MMC w/p");
	112	if (ret)
	113	goto exit_free_det;
	114
	115	gpio_direction_input(gpio_det);
	116	gpio_direction_input(gpio_wp);
	117
ed175343 SG	118	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)),
ed175343 SG	119	detect_irq,
70c91a38	120	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
364cd540 DM	121	"MMC detect", data);
	122	if (ret)
	123	goto exit_free_wp;
	124
	125	return 0;
	126
	127	exit_free_wp:
	128	gpio_free(gpio_wp);
	129
	130	exit_free_det:
	131	gpio_free(gpio_det);
	132
	133	return ret;
	134	}
	135
	136	static void mxc_mmc1_exit(struct device dev, void data)
	137	{
	138	gpio_free(gpio_det);
	139	gpio_free(gpio_wp);
ed175343	140	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)), data);
364cd540 DM	141	}
364cd540 DM	142
6a697e3d	143	static const struct imxmmc_platform_data mmc_pdata __initconst = {
364cd540 DM	144	.get_ro = mxc_mmc1_get_ro,
	145	.init = mxc_mmc1_init,
	146	.exit = mxc_mmc1_exit,
	147	};
	148
84677d11 DM	149	/* SPI */
	150
	151	static int spi_internal_chipselect[] = {
	152	MXC_SPI_CS(0),
	153	MXC_SPI_CS(1),
	154	MXC_SPI_CS(2),
	155	};
	156
06606ff1	157	static const struct spi_imx_master spi0_pdata __initconst = {
84677d11 DM	158	.chipselect = spi_internal_chipselect,
	159	.num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
	160	};
	161
81057f32 DM	162	/* GPIO LEDs */
81057f32 DM	163
47e837b5	164	static const struct gpio_led litekit_leds[] __initconst = {
81057f32 DM	165	{
	166	.name = "GPIO0",
	167	.gpio = IOMUX_TO_GPIO(MX31_PIN_COMPARE),
	168	.active_low = 1,
	169	.default_state = LEDS_GPIO_DEFSTATE_OFF,
	170	},
	171	{
	172	.name = "GPIO1",
	173	.gpio = IOMUX_TO_GPIO(MX31_PIN_CAPTURE),
	174	.active_low = 1,
	175	.default_state = LEDS_GPIO_DEFSTATE_OFF,
	176	}
	177	};
	178
47e837b5 UKK	179	static const struct gpio_led_platform_data
47e837b5 UKK	180	litekit_led_platform_data __initconst = {
81057f32 DM	181	.leds = litekit_leds,
	182	.num_leds = ARRAY_SIZE(litekit_leds),
	183	};
	184
b7d91a62 DM	185	void __init mx31lite_db_init(void)
	186	{
	187	mxc_iomux_setup_multiple_pins(litekit_db_board_pins,
	188	ARRAY_SIZE(litekit_db_board_pins),
	189	"development board pins");
16cf5c41	190	imx31_add_imx_uart0(&uart_pdata);
6a697e3d	191	imx31_add_mxc_mmc(0, &mmc_pdata);
06606ff1	192	imx31_add_spi_imx0(&spi0_pdata);
47e837b5	193	gpio_led_register_device(-1, &litekit_led_platform_data);
bec31a85 BT	194	imx31_add_imx2_wdt();
bec31a85 BT	195	imx31_add_mxc_rtc();
b7d91a62	196	}