Merge branch 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa...
[deliverable/linux.git] / arch / arm / mach-imx / mxc.h
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52c543f9 1/*
5739b919 2 * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
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3 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
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18 */
19
20#ifndef __ASM_ARCH_MXC_H__
21#define __ASM_ARCH_MXC_H__
22
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23#include <linux/types.h>
24
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25#ifndef __ASM_ARCH_MXC_HARDWARE_H__
26#error "Do not include directly."
27#endif
28
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29#define MXC_CPU_MX1 1
30#define MXC_CPU_MX21 21
8c25c36f 31#define MXC_CPU_MX25 25
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32#define MXC_CPU_MX27 27
33#define MXC_CPU_MX31 31
34#define MXC_CPU_MX35 35
438caa3f 35#define MXC_CPU_MX51 51
c0abefd3 36#define MXC_CPU_MX53 53
a2887546 37#define MXC_CPU_IMX6SL 0x60
3c03a2fe 38#define MXC_CPU_IMX6DL 0x61
d9654dce 39#define MXC_CPU_IMX6SX 0x62
3c03a2fe 40#define MXC_CPU_IMX6Q 0x63
022d0716 41#define MXC_CPU_IMX6UL 0x64
5739b919 42#define MXC_CPU_IMX7D 0x72
198016e1 43
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44#define IMX_DDR_TYPE_LPDDR2 1
45
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46#ifndef __ASSEMBLY__
47extern unsigned int __mxc_cpu_type;
48#endif
49
7bce7e8c 50#ifdef CONFIG_SOC_IMX1
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51# ifdef mxc_cpu_type
52# undef mxc_cpu_type
53# define mxc_cpu_type __mxc_cpu_type
54# else
55# define mxc_cpu_type MXC_CPU_MX1
56# endif
57# define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1)
58#else
59# define cpu_is_mx1() (0)
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60#endif
61
7bce7e8c 62#ifdef CONFIG_SOC_IMX21
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63# ifdef mxc_cpu_type
64# undef mxc_cpu_type
65# define mxc_cpu_type __mxc_cpu_type
66# else
67# define mxc_cpu_type MXC_CPU_MX21
68# endif
69# define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21)
70#else
71# define cpu_is_mx21() (0)
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72#endif
73
7bce7e8c 74#ifdef CONFIG_SOC_IMX25
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75# ifdef mxc_cpu_type
76# undef mxc_cpu_type
77# define mxc_cpu_type __mxc_cpu_type
78# else
79# define mxc_cpu_type MXC_CPU_MX25
80# endif
81# define cpu_is_mx25() (mxc_cpu_type == MXC_CPU_MX25)
82#else
83# define cpu_is_mx25() (0)
84#endif
85
7bce7e8c 86#ifdef CONFIG_SOC_IMX27
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87# ifdef mxc_cpu_type
88# undef mxc_cpu_type
89# define mxc_cpu_type __mxc_cpu_type
90# else
91# define mxc_cpu_type MXC_CPU_MX27
92# endif
93# define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27)
94#else
95# define cpu_is_mx27() (0)
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96#endif
97
c23eb89e 98#ifdef CONFIG_SOC_IMX31
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99# ifdef mxc_cpu_type
100# undef mxc_cpu_type
101# define mxc_cpu_type __mxc_cpu_type
102# else
103# define mxc_cpu_type MXC_CPU_MX31
104# endif
105# define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31)
106#else
107# define cpu_is_mx31() (0)
108#endif
109
c23eb89e 110#ifdef CONFIG_SOC_IMX35
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111# ifdef mxc_cpu_type
112# undef mxc_cpu_type
113# define mxc_cpu_type __mxc_cpu_type
114# else
115# define mxc_cpu_type MXC_CPU_MX35
116# endif
117# define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35)
118#else
119# define cpu_is_mx35() (0)
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120#endif
121
76851671 122#ifdef CONFIG_SOC_IMX51
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123# ifdef mxc_cpu_type
124# undef mxc_cpu_type
125# define mxc_cpu_type __mxc_cpu_type
126# else
127# define mxc_cpu_type MXC_CPU_MX51
128# endif
129# define cpu_is_mx51() (mxc_cpu_type == MXC_CPU_MX51)
130#else
131# define cpu_is_mx51() (0)
132#endif
133
76851671 134#ifdef CONFIG_SOC_IMX53
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135# ifdef mxc_cpu_type
136# undef mxc_cpu_type
137# define mxc_cpu_type __mxc_cpu_type
138# else
139# define mxc_cpu_type MXC_CPU_MX53
140# endif
141# define cpu_is_mx53() (mxc_cpu_type == MXC_CPU_MX53)
142#else
143# define cpu_is_mx53() (0)
144#endif
145
64f102b6 146#ifndef __ASSEMBLY__
a82eb09f 147#ifdef CONFIG_SOC_IMX6SL
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148static inline bool cpu_is_imx6sl(void)
149{
150 return __mxc_cpu_type == MXC_CPU_IMX6SL;
151}
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152#else
153static inline bool cpu_is_imx6sl(void)
154{
155 return false;
156}
157#endif
9ba64fe3 158
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159static inline bool cpu_is_imx6dl(void)
160{
161 return __mxc_cpu_type == MXC_CPU_IMX6DL;
162}
163
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164static inline bool cpu_is_imx6sx(void)
165{
166 return __mxc_cpu_type == MXC_CPU_IMX6SX;
167}
168
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169static inline bool cpu_is_imx6ul(void)
170{
171 return __mxc_cpu_type == MXC_CPU_IMX6UL;
172}
173
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174static inline bool cpu_is_imx6q(void)
175{
176 return __mxc_cpu_type == MXC_CPU_IMX6Q;
177}
64f102b6 178
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179static inline bool cpu_is_imx7d(void)
180{
181 return __mxc_cpu_type == MXC_CPU_IMX7D;
182}
183
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184struct cpu_op {
185 u32 cpu_rate;
186};
187
010dc8af 188int tzic_enable_wake(void);
0adf882b 189
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190extern struct cpu_op *(*get_cpu_op)(int *op);
191#endif
192
13cf8df9 193#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35())
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194#define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27())
195
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196#define imx_readl readl_relaxed
197#define imx_readw readw_relaxed
198#define imx_writel writel_relaxed
199#define imx_writew writew_relaxed
200
f304fc42 201#endif /* __ASM_ARCH_MXC_H__ */
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