ARM: imx: move clk_prepare() out from mxc_restart()
[deliverable/linux.git] / arch / arm / mach-imx / system.c
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1/*
2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
74bef9a4 6 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
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7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
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17 */
18
19#include <linux/kernel.h>
20#include <linux/clk.h>
21#include <linux/io.h>
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22#include <linux/err.h>
23#include <linux/delay.h>
eea643f7 24
9f97da78 25#include <asm/system_misc.h>
eea643f7 26#include <asm/proc-fns.h>
c2932bf4 27#include <asm/mach-types.h>
eea643f7 28
e3372474 29#include "common.h"
50f2de61 30#include "hardware.h"
e3372474 31
be124c94 32static void __iomem *wdog_base;
18cb680f 33static struct clk *wdog_clk;
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34
35/*
36 * Reset the system. It is called by machine_restart().
37 */
65ea7884 38void mxc_restart(char mode, const char *cmd)
eea643f7 39{
be124c94
SH
40 unsigned int wcr_enable;
41
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SG
42 if (wdog_clk)
43 clk_enable(wdog_clk);
eea643f7 44
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45 if (cpu_is_mx1())
46 wcr_enable = (1 << 0);
47 else
be124c94 48 wcr_enable = (1 << 2);
eea643f7 49
eea643f7 50 /* Assert SRS signal */
be124c94 51 __raw_writew(wcr_enable, wdog_base);
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52
53 /* wait for reset to assert... */
54 mdelay(500);
55
18cb680f 56 pr_err("%s: Watchdog reset failed to assert reset\n", __func__);
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57
58 /* delay to allow the serial port to show the message */
59 mdelay(50);
60
61 /* we'll take a jump through zero as a poor second */
e879c862 62 soft_restart(0);
eea643f7 63}
be124c94 64
18cb680f 65void __init mxc_arch_reset_init(void __iomem *base)
be124c94
SH
66{
67 wdog_base = base;
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SG
68
69 wdog_clk = clk_get_sys("imx2-wdt.0", NULL);
70 if (IS_ERR(wdog_clk)) {
71 pr_warn("%s: failed to get wdog clock\n", __func__);
72 wdog_clk = NULL;
73 return;
74 }
75
76 clk_prepare(wdog_clk);
be124c94 77}
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