Merge branch 'kirkwood/cleanup' of git://git.infradead.org/users/jcooper/linux into...
[deliverable/linux.git] / arch / arm / mach-integrator / core.c
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1da177e4
LT
1/*
2 * linux/arch/arm/mach-integrator/core.c
3 *
4 * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 */
10#include <linux/types.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/device.h>
b434f5c9 14#include <linux/export.h>
1da177e4
LT
15#include <linux/spinlock.h>
16#include <linux/interrupt.h>
a03d4d27 17#include <linux/irq.h>
8d717a52 18#include <linux/memblock.h>
1da177e4 19#include <linux/sched.h>
20cf33ea 20#include <linux/smp.h>
fbb18a27 21#include <linux/termios.h>
a62c80e5 22#include <linux/amba/bus.h>
fbb18a27 23#include <linux/amba/serial.h>
fced80c7 24#include <linux/io.h>
1da177e4 25
a09e64fb 26#include <mach/hardware.h>
a285edcf 27#include <mach/platform.h>
a09e64fb 28#include <mach/cm.h>
695436e3
LW
29#include <mach/irqs.h>
30
1da177e4 31#include <asm/leds.h>
ee35887e 32#include <asm/mach-types.h>
1da177e4 33#include <asm/mach/time.h>
98c672cf 34#include <asm/pgtable.h>
1da177e4 35
fbb18a27
RK
36static struct amba_pl010_data integrator_uart_data;
37
2f64ccd9
RK
38#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT }
39#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 }
40#define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 }
41#define KMI0_IRQ { IRQ_KMIINT0 }
42#define KMI1_IRQ { IRQ_KMIINT1 }
1da177e4 43
d59fdcfc 44static AMBA_APB_DEVICE(rtc, "rtc", 0,
2f64ccd9 45 INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
1da177e4 46
d59fdcfc 47static AMBA_APB_DEVICE(uart0, "uart0", 0,
2f64ccd9 48 INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data);
1da177e4 49
d59fdcfc 50static AMBA_APB_DEVICE(uart1, "uart1", 0,
2f64ccd9 51 INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data);
1da177e4 52
d59fdcfc
LW
53static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL);
54static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL);
1da177e4
LT
55
56static struct amba_device *amba_devs[] __initdata = {
57 &rtc_device,
58 &uart0_device,
59 &uart1_device,
60 &kmi0_device,
61 &kmi1_device,
62};
63
64static int __init integrator_init(void)
65{
66 int i;
67
ee35887e
LW
68 /*
69 * The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to
70 * hard-code them. The Integator/CP and forward have proper cell IDs.
71 * Else we leave them undefined to the bus driver can autoprobe them.
72 */
73 if (machine_is_integrator()) {
74 rtc_device.periphid = 0x00041030;
75 uart0_device.periphid = 0x00041010;
76 uart1_device.periphid = 0x00041010;
77 kmi0_device.periphid = 0x00041050;
78 kmi1_device.periphid = 0x00041050;
79 }
80
1da177e4
LT
81 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
82 struct amba_device *d = amba_devs[i];
83 amba_device_register(d, &iomem_resource);
84 }
85
86 return 0;
87}
88
89arch_initcall(integrator_init);
90
fbb18a27
RK
91/*
92 * On the Integrator platform, the port RTS and DTR are provided by
93 * bits in the following SC_CTRLS register bits:
94 * RTS DTR
95 * UART0 7 6
96 * UART1 5 4
97 */
b7a3f8db
AB
98#define SC_CTRLC __io_address(INTEGRATOR_SC_CTRLC)
99#define SC_CTRLS __io_address(INTEGRATOR_SC_CTRLS)
fbb18a27
RK
100
101static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
102{
103 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
104
105 if (dev == &uart0_device) {
106 rts_mask = 1 << 4;
107 dtr_mask = 1 << 5;
108 } else {
109 rts_mask = 1 << 6;
110 dtr_mask = 1 << 7;
111 }
112
113 if (mctrl & TIOCM_RTS)
114 ctrlc |= rts_mask;
115 else
116 ctrls |= rts_mask;
117
118 if (mctrl & TIOCM_DTR)
119 ctrlc |= dtr_mask;
120 else
121 ctrls |= dtr_mask;
122
123 __raw_writel(ctrls, SC_CTRLS);
124 __raw_writel(ctrlc, SC_CTRLC);
125}
126
127static struct amba_pl010_data integrator_uart_data = {
128 .set_mctrl = integrator_uart_set_mctrl,
129};
130
b830b9b5 131#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
1da177e4 132
bd31b859 133static DEFINE_RAW_SPINLOCK(cm_lock);
1da177e4
LT
134
135/**
136 * cm_control - update the CM_CTRL register.
137 * @mask: bits to change
138 * @set: bits to set
139 */
140void cm_control(u32 mask, u32 set)
141{
142 unsigned long flags;
143 u32 val;
144
bd31b859 145 raw_spin_lock_irqsave(&cm_lock, flags);
1da177e4
LT
146 val = readl(CM_CTRL) & ~mask;
147 writel(val | set, CM_CTRL);
bd31b859 148 raw_spin_unlock_irqrestore(&cm_lock, flags);
1da177e4
LT
149}
150
151EXPORT_SYMBOL(cm_control);
98c672cf
RK
152
153/*
154 * We need to stop things allocating the low memory; ideally we need a
155 * better implementation of GFP_DMA which does not assume that DMA-able
156 * memory starts at zero.
157 */
158void __init integrator_reserve(void)
159{
8d717a52 160 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
98c672cf 161}
6338b66f
RK
162
163/*
164 * To reset, we hit the on-board reset register in the system FPGA
165 */
166void integrator_restart(char mode, const char *cmd)
167{
168 cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
169}
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