Commit | Line | Data |
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1da177e4 | 1 | /* |
c852ac80 | 2 | * arch/arm/mach-iop32x/irq.c |
1da177e4 | 3 | * |
3f7e5815 | 4 | * Generic IOP32X IRQ handling functionality |
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5 | * |
6 | * Author: Rory Bolt <rorybolt@pacbell.net> | |
7 | * Copyright (C) 2002 Rory Bolt | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
1da177e4 | 12 | */ |
c852ac80 | 13 | |
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14 | #include <linux/init.h> |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/list.h> | |
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17 | #include <asm/mach/irq.h> |
18 | #include <asm/irq.h> | |
a09e64fb | 19 | #include <mach/hardware.h> |
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20 | #include <asm/mach-types.h> |
21 | ||
c852ac80 | 22 | static u32 iop32x_mask; |
1da177e4 | 23 | |
d73d8011 | 24 | static void intctl_write(u32 val) |
1da177e4 | 25 | { |
c852ac80 | 26 | asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); |
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27 | } |
28 | ||
d73d8011 | 29 | static void intstr_write(u32 val) |
1da177e4 | 30 | { |
c852ac80 | 31 | asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val)); |
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32 | } |
33 | ||
34 | static void | |
465b4079 | 35 | iop32x_irq_mask(struct irq_data *d) |
1da177e4 | 36 | { |
465b4079 | 37 | iop32x_mask &= ~(1 << d->irq); |
c852ac80 | 38 | intctl_write(iop32x_mask); |
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39 | } |
40 | ||
41 | static void | |
465b4079 | 42 | iop32x_irq_unmask(struct irq_data *d) |
1da177e4 | 43 | { |
465b4079 | 44 | iop32x_mask |= 1 << d->irq; |
c852ac80 | 45 | intctl_write(iop32x_mask); |
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46 | } |
47 | ||
38c677cb | 48 | struct irq_chip ext_chip = { |
465b4079 LB |
49 | .name = "IOP32x", |
50 | .irq_ack = iop32x_irq_mask, | |
51 | .irq_mask = iop32x_irq_mask, | |
52 | .irq_unmask = iop32x_irq_unmask, | |
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53 | }; |
54 | ||
c852ac80 | 55 | void __init iop32x_init_irq(void) |
1da177e4 | 56 | { |
c852ac80 | 57 | int i; |
1da177e4 | 58 | |
588ef769 DW |
59 | iop_init_cp6_handler(); |
60 | ||
c852ac80 LB |
61 | intctl_write(0); |
62 | intstr_write(0); | |
0c92e830 LB |
63 | if (machine_is_glantank() || |
64 | machine_is_iq80321() || | |
e60d07b6 | 65 | machine_is_iq31244() || |
a8135fcf AP |
66 | machine_is_n2100() || |
67 | machine_is_em7210()) | |
7e9740b1 | 68 | *IOP3XX_PCIIRSR = 0x0f; |
1da177e4 | 69 | |
c852ac80 | 70 | for (i = 0; i < NR_IRQS; i++) { |
6845664a TG |
71 | irq_set_chip(i, &ext_chip); |
72 | irq_set_handler(i, handle_level_irq); | |
1da177e4 | 73 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); |
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74 | } |
75 | } |