[ARM] 3816/1: iop3xx: rename config symbols
[deliverable/linux.git] / arch / arm / mach-iop3xx / iop331-setup.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/mach-iop3xx/iop331-setup.c
3 *
4 * Author: Dave Jiang (dave.jiang@intel.com)
5 * Copyright (C) 2004 Intel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12#include <linux/mm.h>
13#include <linux/init.h>
1da177e4
LT
14#include <linux/major.h>
15#include <linux/fs.h>
d052d1be 16#include <linux/platform_device.h>
1da177e4
LT
17#include <linux/serial.h>
18#include <linux/tty.h>
2b9ac7c1 19#include <linux/serial_8250.h>
1da177e4
LT
20
21#include <asm/io.h>
22#include <asm/pgtable.h>
23#include <asm/page.h>
24#include <asm/mach/map.h>
25#include <asm/setup.h>
26#include <asm/system.h>
27#include <asm/memory.h>
28#include <asm/hardware.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31
32#define IOP331_UART_XTAL 33334000
33
34/*
35 * Standard IO mapping for all IOP331 based systems
36 */
37static struct map_desc iop331_std_desc[] __initdata = {
4835e64a
DS
38 { /* mem mapped registers */
39 .virtual = IOP331_VIRT_MEM_BASE,
40 .pfn = __phys_to_pfn(IOP331_PHYS_MEM_BASE),
41 .length = 0x00002000,
42 .type = MT_DEVICE
43 }, { /* PCI IO space */
44 .virtual = IOP331_PCI_LOWER_IO_VA,
45 .pfn = __phys_to_pfn(IOP331_PCI_LOWER_IO_PA),
46 .length = IOP331_PCI_IO_WINDOW_SIZE,
47 .type = MT_DEVICE
48 }
1da177e4
LT
49};
50
2b9ac7c1
DW
51static struct resource iop33x_uart0_resources[] = {
52 [0] = {
53 .start = IOP331_UART0_PHYS,
54 .end = IOP331_UART0_PHYS + 0x3f,
55 .flags = IORESOURCE_MEM,
56 },
57 [1] = {
58 .start = IRQ_IOP331_UART0,
59 .end = IRQ_IOP331_UART0,
60 .flags = IORESOURCE_IRQ
61 }
62};
63
64static struct resource iop33x_uart1_resources[] = {
65 [0] = {
66 .start = IOP331_UART1_PHYS,
67 .end = IOP331_UART1_PHYS + 0x3f,
68 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
71 .start = IRQ_IOP331_UART1,
72 .end = IRQ_IOP331_UART1,
73 .flags = IORESOURCE_IRQ
1da177e4
LT
74 }
75};
76
2b9ac7c1
DW
77static struct plat_serial8250_port iop33x_uart0_data[] = {
78 {
79 .membase = (char*)(IOP331_UART0_VIRT),
80 .mapbase = (IOP331_UART0_PHYS),
81 .irq = IRQ_IOP331_UART0,
82 .uartclk = IOP331_UART_XTAL,
83 .regshift = 2,
84 .iotype = UPIO_MEM,
85 .flags = UPF_SKIP_TEST,
86 },
87 { },
88};
89
90static struct plat_serial8250_port iop33x_uart1_data[] = {
91 {
92 .membase = (char*)(IOP331_UART1_VIRT),
93 .mapbase = (IOP331_UART1_PHYS),
94 .irq = IRQ_IOP331_UART1,
95 .uartclk = IOP331_UART_XTAL,
96 .regshift = 2,
97 .iotype = UPIO_MEM,
98 .flags = UPF_SKIP_TEST,
99 },
100 { },
101};
102
103static struct platform_device iop33x_uart0 = {
104 .name = "serial8250",
7d420896 105 .id = PLAT8250_DEV_PLATFORM,
2b9ac7c1
DW
106 .dev.platform_data = iop33x_uart0_data,
107 .num_resources = 2,
108 .resource = iop33x_uart0_resources,
109};
110
111static struct platform_device iop33x_uart1 = {
112 .name = "serial8250",
7d420896 113 .id = PLAT8250_DEV_PLATFORM1,
2b9ac7c1
DW
114 .dev.platform_data = iop33x_uart1_data,
115 .num_resources = 2,
116 .resource = iop33x_uart1_resources,
117};
118
1da177e4
LT
119static struct resource iop33x_i2c_0_resources[] = {
120 [0] = {
121 .start = 0xfffff680,
122 .end = 0xfffff698,
123 .flags = IORESOURCE_MEM,
124 },
125 [1] = {
126 .start = IRQ_IOP331_I2C_0,
127 .end = IRQ_IOP331_I2C_0,
128 .flags = IORESOURCE_IRQ
129 }
130};
131
132static struct resource iop33x_i2c_1_resources[] = {
133 [0] = {
134 .start = 0xfffff6a0,
135 .end = 0xfffff6b8,
136 .flags = IORESOURCE_MEM,
137 },
138 [1] = {
139 .start = IRQ_IOP331_I2C_1,
140 .end = IRQ_IOP331_I2C_1,
141 .flags = IORESOURCE_IRQ
142 }
143};
144
145static struct platform_device iop33x_i2c_0_controller = {
146 .name = "IOP3xx-I2C",
147 .id = 0,
148 .num_resources = 2,
149 .resource = iop33x_i2c_0_resources
150};
151
152static struct platform_device iop33x_i2c_1_controller = {
153 .name = "IOP3xx-I2C",
154 .id = 1,
155 .num_resources = 2,
156 .resource = iop33x_i2c_1_resources
157};
158
159static struct platform_device *iop33x_devices[] __initdata = {
2b9ac7c1
DW
160 &iop33x_uart0,
161 &iop33x_uart1,
1da177e4
LT
162 &iop33x_i2c_0_controller,
163 &iop33x_i2c_1_controller
164};
165
166void __init iop33x_init(void)
167{
168 if(iop_is_331())
169 {
170 platform_add_devices(iop33x_devices,
171 ARRAY_SIZE(iop33x_devices));
172 }
173}
174
175void __init iop331_map_io(void)
176{
177 iotable_init(iop331_std_desc, ARRAY_SIZE(iop331_std_desc));
1da177e4
LT
178}
179
98954df6 180#ifdef CONFIG_ARCH_IOP33X
1da177e4
LT
181extern void iop331_init_irq(void);
182extern struct sys_timer iop331_timer;
183#endif
184
185#ifdef CONFIG_ARCH_IQ80331
186extern void iq80331_map_io(void);
187#endif
188
189#ifdef CONFIG_MACH_IQ80332
190extern void iq80332_map_io(void);
191#endif
192
193#if defined(CONFIG_ARCH_IQ80331)
194MACHINE_START(IQ80331, "Intel IQ80331")
e9dea0c6 195 /* Maintainer: Intel Corp. */
e9dea0c6
RK
196 .phys_io = 0xfefff000,
197 .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, // virtual, physical
198 .map_io = iq80331_map_io,
199 .init_irq = iop331_init_irq,
1da177e4 200 .timer = &iop331_timer,
e9dea0c6
RK
201 .boot_params = 0x0100,
202 .init_machine = iop33x_init,
1da177e4
LT
203MACHINE_END
204
205#elif defined(CONFIG_MACH_IQ80332)
206MACHINE_START(IQ80332, "Intel IQ80332")
e9dea0c6 207 /* Maintainer: Intel Corp. */
e9dea0c6
RK
208 .phys_io = 0xfefff000,
209 .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, // virtual, physical
210 .map_io = iq80332_map_io,
211 .init_irq = iop331_init_irq,
1da177e4 212 .timer = &iop331_timer,
e9dea0c6
RK
213 .boot_params = 0x0100,
214 .init_machine = iop33x_init,
1da177e4
LT
215MACHINE_END
216
217#else
218#error No machine descriptor defined for this IOP3XX implementation
219#endif
220
221
This page took 0.173054 seconds and 5 git commands to generate.