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Create platform_device.h to contain all the platform device details.
[deliverable/linux.git] / arch / arm / mach-ixp2000 / ixdp2x00.c
CommitLineData
1da177e4
LT		 1/*
2 * arch/arm/mach-ixp2000/ixdp2x00.c
3 *
4 * Code common to IXDP2400 and IXDP2800 platforms.
5 *
6 * Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
7 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
8 *
9 * Copyright (C) 2002 Intel Corp.
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 */
17#include <linux/config.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/mm.h>
21#include <linux/sched.h>
22#include <linux/interrupt.h>
d052d1be 23#include <linux/platform_device.h>
1da177e4
LT		 24#include <linux/bitops.h>
25#include <linux/pci.h>
26#include <linux/ioport.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29
30#include <asm/io.h>
31#include <asm/irq.h>
32#include <asm/pgtable.h>
33#include <asm/page.h>
34#include <asm/system.h>
35#include <asm/hardware.h>
36#include <asm/mach-types.h>
37
38#include <asm/mach/pci.h>
39#include <asm/mach/map.h>
40#include <asm/mach/irq.h>
41#include <asm/mach/time.h>
42#include <asm/mach/flash.h>
43#include <asm/mach/arch.h>
44
8144f56b
LB		 45#include <asm/arch/gpio.h>
46
47
1da177e4
LT		 48/*************************************************************************
49 * IXDP2x00 IRQ Initialization
50 *************************************************************************/
51static volatile unsigned long *board_irq_mask;
52static volatile unsigned long *board_irq_stat;
53static unsigned long board_irq_count;
54
55#ifdef CONFIG_ARCH_IXDP2400
56/*
57 * Slowport configuration for accessing CPLD registers on IXDP2x00
58 */
59static struct slowport_cfg slowport_cpld_cfg = {
60 .CCR = SLOWPORT_CCR_DIV_2,
61 .WTC = 0x00000070,
62 .RTC = 0x00000070,
63 .PCR = SLOWPORT_MODE_FLASH,
64 .ADC = SLOWPORT_ADDR_WIDTH_24 | SLOWPORT_DATA_WIDTH_8
65};
66#endif
67
68static void ixdp2x00_irq_mask(unsigned int irq)
69{
70 unsigned long dummy;
71 static struct slowport_cfg old_cfg;
72
73 /*
74 * This is ugly in common code but really don't know
75 * of a better way to handle it. :(
76 */
77#ifdef CONFIG_ARCH_IXDP2400
78 if (machine_is_ixdp2400())
79 ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
80#endif
81
82 dummy = *board_irq_mask;
83 dummy |= IXP2000_BOARD_IRQ_MASK(irq);
84 ixp2000_reg_write(board_irq_mask, dummy);
85
86#ifdef CONFIG_ARCH_IXDP2400
87 if (machine_is_ixdp2400())
88 ixp2000_release_slowport(&old_cfg);
89#endif
90}
91
92static void ixdp2x00_irq_unmask(unsigned int irq)
93{
94 unsigned long dummy;
95 static struct slowport_cfg old_cfg;
96
97#ifdef CONFIG_ARCH_IXDP2400
98 if (machine_is_ixdp2400())
99 ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
100#endif
101
102 dummy = *board_irq_mask;
103 dummy &= ~IXP2000_BOARD_IRQ_MASK(irq);
104 ixp2000_reg_write(board_irq_mask, dummy);
105
106 if (machine_is_ixdp2400())
107 ixp2000_release_slowport(&old_cfg);
108}
109
110static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
111{
112 volatile u32 ex_interrupt = 0;
113 static struct slowport_cfg old_cfg;
114 int i;
115
116 desc->chip->mask(irq);
117
118#ifdef CONFIG_ARCH_IXDP2400
119 if (machine_is_ixdp2400())
120 ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
121#endif
122 ex_interrupt = *board_irq_stat & 0xff;
123 if (machine_is_ixdp2400())
124 ixp2000_release_slowport(&old_cfg);
125
126 if(!ex_interrupt) {
127 printk(KERN_ERR "Spurious IXDP2x00 CPLD interrupt!\n");
128 return;
129 }
130
131 for(i = 0; i < board_irq_count; i++) {
132 if(ex_interrupt & (1 << i)) {
133 struct irqdesc *cpld_desc;
134 int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
135 cpld_desc = irq_desc + cpld_irq;
664399e1 136 desc_handle_irq(cpld_irq, cpld_desc, regs);
1da177e4
LT		 137 }
138 }
139
140 desc->chip->unmask(irq);
141}
142
143static struct irqchip ixdp2x00_cpld_irq_chip = {
144 .ack = ixdp2x00_irq_mask,
145 .mask = ixdp2x00_irq_mask,
146 .unmask = ixdp2x00_irq_unmask
147};
148
149void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_irqs)
150{
151 unsigned int irq;
152
153 ixp2000_init_irq();
154
155 if (!ixdp2x00_master_npu())
156 return;
157
158 board_irq_stat = stat_reg;
159 board_irq_mask = mask_reg;
160 board_irq_count = nr_irqs;
161
162 *board_irq_mask = 0xffffffff;
163
164 for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
165 set_irq_chip(irq, &ixdp2x00_cpld_irq_chip);
166 set_irq_handler(irq, do_level_IRQ);
167 set_irq_flags(irq, IRQF_VALID);
168 }
169
170 /* Hook into PCI interrupt */
171 set_irq_chained_handler(IRQ_IXP2000_PCIB, &ixdp2x00_irq_handler);
172}
173
174/*************************************************************************
175 * IXDP2x00 memory map
176 *************************************************************************/
177static struct map_desc ixdp2x00_io_desc __initdata = {
178 .virtual = IXDP2X00_VIRT_CPLD_BASE,
db0d087e 179 .pfn = __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE),
1da177e4
LT		 180 .length = IXDP2X00_CPLD_SIZE,
181 .type = MT_DEVICE
182};
183
184void __init ixdp2x00_map_io(void)
185{
186 ixp2000_map_io();
187
188 iotable_init(&ixdp2x00_io_desc, 1);
189}
190
191/*************************************************************************
192 * IXDP2x00-common PCI init
193 *
194 * The IXDP2[48]00 has a horrid PCI bus layout. Basically the board
195 * contains two NPUs (ingress and egress) connected over PCI, both running
196 * instances of the kernel. So far so good. Peers on the PCI bus running
197 * Linux is a common design in telecom systems. The problem is that instead
198 * of all the devices being controlled by a single host, different
199 * devices are controlles by different NPUs on the same bus, leading to
200 * multiple hosts on the bus. The exact bus layout looks like:
201 *
202 * Bus 0
203 * Master NPU <-------------------+-------------------> Slave NPU
204 * |
205 * |
206 * P2P
207 * |
208 *
209 * Bus 1 |
210 * <--+------+---------+---------+------+-->
211 * | | | | |
212 * | | | | |
213 * ... Dev PMC Media Eth0 Eth1 ...
214 *
215 * The master controlls all but Eth1, which is controlled by the
216 * slave. What this means is that the both the master and the slave
217 * have to scan the bus, but only one of them can enumerate the bus.
218 * In addition, after the bus is scanned, each kernel must remove
219 * the device(s) it does not control from the PCI dev list otherwise
220 * a driver on each NPU will try to manage it and we will have horrible
221 * conflicts. Oh..and the slave NPU needs to see the master NPU
222 * for Intel's drivers to work properly. Closed source drivers...
223 *
224 * The way we deal with this is fairly simple but ugly:
225 *
226 * 1) Let master scan and enumerate the bus completely.
227 * 2) Master deletes Eth1 from device list.
228 * 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave)
229 * from device list.
230 * 4) Find HW designers and LART them.
231 *
232 * The boards also do not do normal PCI IRQ routing, or any sort of
233 * sensical swizzling, so we just need to check where on the bus a
234 * device sits and figure out to which CPLD pin the interrupt is routed.
235 * See ixdp2[48]00.c files.
236 *
237 *************************************************************************/
238void ixdp2x00_slave_pci_postinit(void)
239{
240 struct pci_dev *dev;
241
242 /*
243 * Remove PMC device is there is one
244 */
245 if((dev = pci_find_slot(1, IXDP2X00_PMC_DEVFN)))
246 pci_remove_bus_device(dev);
247
248 dev = pci_find_slot(0, IXDP2X00_21555_DEVFN);
249 pci_remove_bus_device(dev);
250}
251
252/**************************************************************************
253 * IXDP2x00 Machine Setup
254 *************************************************************************/
255static struct flash_platform_data ixdp2x00_platform_data = {
256 .map_name = "cfi_probe",
257 .width = 1,
258};
259
260static struct ixp2000_flash_data ixdp2x00_flash_data = {
261 .platform_data = &ixdp2x00_platform_data,
262 .nr_banks = 1
263};
264
265static struct resource ixdp2x00_flash_resource = {
266 .start = 0xc4000000,
267 .end = 0xc4000000 + 0x00ffffff,
268 .flags = IORESOURCE_MEM,
269};
270
271static struct platform_device ixdp2x00_flash = {
272 .name = "IXP2000-Flash",
273 .id = 0,
274 .dev = {
275 .platform_data = &ixdp2x00_flash_data,
276 },
277 .num_resources = 1,
278 .resource = &ixdp2x00_flash_resource,
279};
280
281static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins = {
282 .sda_pin = IXDP2X00_GPIO_SDA,
283 .scl_pin = IXDP2X00_GPIO_SCL,
284};
285
286static struct platform_device ixdp2x00_i2c_controller = {
287 .name = "IXP2000-I2C",
288 .id = 0,
289 .dev = {
290 .platform_data = &ixdp2x00_i2c_gpio_pins,
291 },
292 .num_resources = 0
293};
294
295static struct platform_device *ixdp2x00_devices[] __initdata = {
296 &ixdp2x00_flash,
297 &ixdp2x00_i2c_controller
298};
299
300void __init ixdp2x00_init_machine(void)
301{
302 gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1);
303 gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);
304
305 platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));
28187f2c 306 ixp2000_uart_init();
1da177e4
LT		 307}
308
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