projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | if ARCH_IXP4XX |
| 2 | ||
| 3 | config ARCH_SUPPORTS_BIG_ENDIAN | |
| 4 | bool | |
| 5 | default y | |
| 6 | ||
| 7 | menu "Intel IXP4xx Implementation Options" | |
| 8 | ||
| 9 | comment "IXP4xx Platforms" | |
| 10 | ||
| a7918f39 AZ |
11 | config MACH_NSLU2 |
| 12 | bool | |
| e7fcdb79 | 13 | prompt "Linksys NSLU2" |
| a7918f39 AZ |
14 | help |
| 15 | Say 'Y' here if you want your kernel to support Linksys's | |
| 16 | NSLU2 NAS device. For more information on this platform, | |
| 17 | see http://www.nslu2-linux.org | |
| 18 | ||
| 1da177e4 LT |
19 | config ARCH_AVILA |
| 20 | bool "Avila" | |
| 21 | help | |
| 22 | Say 'Y' here if you want your kernel to support the Gateworks | |
| 23 | Avila Network Platform. For more information on this platform, | |
| 24 | see <file:Documentation/arm/IXP4xx>. | |
| 25 | ||
| 26 | config ARCH_ADI_COYOTE | |
| 27 | bool "Coyote" | |
| 28 | help | |
| 29 | Say 'Y' here if you want your kernel to support the ADI | |
| 30 | Engineering Coyote Gateway Reference Platform. For more | |
| 31 | information on this platform, see <file:Documentation/arm/IXP4xx>. | |
| 32 | ||
| 33 | config ARCH_IXDP425 | |
| 34 | bool "IXDP425" | |
| 35 | help | |
| 36 | Say 'Y' here if you want your kernel to support Intel's | |
| 37 | IXDP425 Development Platform (Also known as Richfield). | |
| 38 | For more information on this platform, see <file:Documentation/arm/IXP4xx>. | |
| 39 | ||
| 40 | config MACH_IXDPG425 | |
| 41 | bool "IXDPG425" | |
| 42 | help | |
| 43 | Say 'Y' here if you want your kernel to support Intel's | |
| 44 | IXDPG425 Development Platform (Also known as Montajade). | |
| 45 | For more information on this platform, see <file:Documentation/arm/IXP4xx>. | |
| 46 | ||
| 47 | config MACH_IXDP465 | |
| 48 | bool "IXDP465" | |
| 49 | help | |
| 50 | Say 'Y' here if you want your kernel to support Intel's | |
| 51 | IXDP465 Development Platform (Also known as BMP). | |
| 7aa52f51 | 52 | For more information on this platform, see <file:Documentation/arm/IXP4xx>. |
| 1da177e4 LT |
53 | |
| 54 | ||
| 55 | # | |
| 56 | # IXCDP1100 is the exact same HW as IXDP425, but with a different machine | |
| 57 | # number from the bootloader due to marketing monkeys, so we just enable it | |
| 58 | # by default if IXDP425 is enabled. | |
| 59 | # | |
| 60 | config ARCH_IXCDP1100 | |
| 61 | bool | |
| 62 | depends on ARCH_IXDP425 | |
| 63 | default y | |
| 64 | ||
| 65 | config ARCH_PRPMC1100 | |
| 66 | bool "PrPMC1100" | |
| 67 | help | |
| 68 | Say 'Y' here if you want your kernel to support the Motorola | |
| 69 | PrPCM1100 Processor Mezanine Module. For more information on | |
| 70 | this platform, see <file:Documentation/arm/IXP4xx>. | |
| 71 | ||
| 3145d8a6 RW |
72 | config MACH_NAS100D |
| 73 | bool | |
| 74 | prompt "NAS100D" | |
| 75 | help | |
| 76 | Say 'Y' here if you want your kernel to support Iomega's | |
| 77 | NAS 100d device. For more information on this platform, | |
| 78 | see http://www.nslu2-linux.org/wiki/NAS100d/HomePage | |
| 79 | ||
| 1da177e4 LT |
80 | # |
| 81 | # Avila and IXDP share the same source for now. Will change in future | |
| 82 | # | |
| 83 | config ARCH_IXDP4XX | |
| 84 | bool | |
| 85 | depends on ARCH_IXDP425 || ARCH_AVILA || MACH_IXDP465 | |
| 86 | default y | |
| 87 | ||
| 88 | # | |
| 89 | # Certain registers and IRQs are only enabled if supporting IXP465 CPUs | |
| 90 | # | |
| 91 | config CPU_IXP46X | |
| 92 | bool | |
| 93 | depends on MACH_IXDP465 | |
| 94 | default y | |
| 95 | ||
| 96 | config MACH_GTWX5715 | |
| 97 | bool "Gemtek WX5715 (Linksys WRV54G)" | |
| 98 | depends on ARCH_IXP4XX | |
| 99 | help | |
| 100 | This board is currently inside the Linksys WRV54G Gateways. | |
| 101 | ||
| 102 | IXP425 - 266mhz | |
| 103 | 32mb SDRAM | |
| 104 | 8mb Flash | |
| 105 | miniPCI slot 0 does not have a card connector soldered to the board | |
| 106 | miniPCI slot 1 has an ISL3880 802.11g card (Prism54) | |
| 107 | npe0 is connected to a Kendin KS8995M Switch (4 ports) | |
| 108 | npe1 is the "wan" port | |
| 109 | "Console" UART is available on J11 as console | |
| 110 | "High Speed" UART is n/c (as far as I can tell) | |
| 111 | 20 Pin ARM/Xscale JTAG interface on J2 | |
| 112 | ||
| 113 | ||
| 114 | comment "IXP4xx Options" | |
| 115 | ||
| 116 | config IXP4XX_INDIRECT_PCI | |
| 117 | bool "Use indirect PCI memory access" | |
| 118 | help | |
| 119 | IXP4xx provides two methods of accessing PCI memory space: | |
| 120 | ||
| 121 | 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB). | |
| 122 | To access PCI via this space, we simply ioremap() the BAR | |
| 123 | into the kernel and we can use the standard read[bwl]/write[bwl] | |
| 124 | macros. This is the preferred method due to speed but it | |
| 125 | limits the system to just 64MB of PCI memory. This can be | |
| 126 | problamatic if using video cards and other memory-heavy devices. | |
| 127 | ||
| 128 | 2) If > 64MB of memory space is required, the IXP4xx can be | |
| 129 | configured to use indirect registers to access PCI This allows | |
| 130 | for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. | |
| 131 | The disadvantadge of this is that every PCI access requires | |
| 132 | three local register accesses plus a spinlock, but in some | |
| 133 | cases the performance hit is acceptable. In addition, you cannot | |
| 134 | mmap() PCI devices in this case due to the indirect nature | |
| 135 | of the PCI window. | |
| 136 | ||
| 137 | By default, the direct method is used. Choose this option if you | |
| 138 | need to use the indirect method instead. If you don't know | |
| 139 | what you need, leave this option unselected. | |
| 140 | ||
| 141 | endmenu | |
| 142 | ||
| 143 | endif |