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0f185971 MLJ |
1 | /* |
2 | * arch/arm/mach-ixp4xx/avila-pci.c | |
3 | * | |
4 | * Gateworks Avila board-level PCI initialization | |
5 | * | |
6 | * Author: Michael-Luke Jones <mlj28@cam.ac.uk> | |
7 | * | |
8 | * Based on ixdp-pci.c | |
9 | * Copyright (C) 2002 Intel Corporation. | |
10 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | |
11 | * | |
12 | * Maintainer: Deepak Saxena <dsaxena@plexity.net> | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License version 2 as | |
16 | * published by the Free Software Foundation. | |
17 | * | |
18 | */ | |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/delay.h> | |
0f185971 MLJ |
25 | #include <asm/mach/pci.h> |
26 | #include <asm/irq.h> | |
a09e64fb | 27 | #include <mach/hardware.h> |
0f185971 MLJ |
28 | #include <asm/mach-types.h> |
29 | ||
8d3fdf31 KH |
30 | #define AVILA_MAX_DEV 4 |
31 | #define LOFT_MAX_DEV 6 | |
32 | #define IRQ_LINES 4 | |
ec669696 KH |
33 | |
34 | /* PCI controller GPIO to IRQ pin mappings */ | |
8d3fdf31 KH |
35 | #define INTA 11 |
36 | #define INTB 10 | |
37 | #define INTC 9 | |
38 | #define INTD 8 | |
ec669696 | 39 | |
0f185971 MLJ |
40 | void __init avila_pci_preinit(void) |
41 | { | |
6845664a TG |
42 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); |
43 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); | |
44 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); | |
45 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); | |
0f185971 MLJ |
46 | ixp4xx_pci_preinit(); |
47 | } | |
48 | ||
d5341942 | 49 | static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
0f185971 | 50 | { |
8d3fdf31 KH |
51 | static int pci_irq_table[IRQ_LINES] = { |
52 | IXP4XX_GPIO_IRQ(INTA), | |
53 | IXP4XX_GPIO_IRQ(INTB), | |
54 | IXP4XX_GPIO_IRQ(INTC), | |
55 | IXP4XX_GPIO_IRQ(INTD) | |
0f185971 MLJ |
56 | }; |
57 | ||
0f185971 | 58 | if (slot >= 1 && |
8d3fdf31 KH |
59 | slot <= (machine_is_loft() ? LOFT_MAX_DEV : AVILA_MAX_DEV) && |
60 | pin >= 1 && pin <= IRQ_LINES) | |
61 | return pci_irq_table[(slot + pin - 2) % 4]; | |
0f185971 | 62 | |
8d3fdf31 | 63 | return -1; |
0f185971 MLJ |
64 | } |
65 | ||
66 | struct hw_pci avila_pci __initdata = { | |
67 | .nr_controllers = 1, | |
c23bfc38 | 68 | .ops = &ixp4xx_ops, |
0f185971 | 69 | .preinit = avila_pci_preinit, |
0f185971 | 70 | .setup = ixp4xx_setup, |
0f185971 MLJ |
71 | .map_irq = avila_map_irq, |
72 | }; | |
73 | ||
74 | int __init avila_pci_init(void) | |
75 | { | |
76 | if (machine_is_avila() || machine_is_loft()) | |
77 | pci_common_init(&avila_pci); | |
78 | return 0; | |
79 | } | |
80 | ||
81 | subsys_initcall(avila_pci_init); |